CN112684647A - Local erasing voltage control method and system for liquid crystal writing device - Google Patents

Local erasing voltage control method and system for liquid crystal writing device Download PDF

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CN112684647A
CN112684647A CN202110130333.6A CN202110130333A CN112684647A CN 112684647 A CN112684647 A CN 112684647A CN 202110130333 A CN202110130333 A CN 202110130333A CN 112684647 A CN112684647 A CN 112684647A
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erasing
voltage
conductive
erase
liquid crystal
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CN112684647B (en
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李清波
杨猛训
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Shandong Lanbeisite Educational Equipment Group Co ltd
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Abstract

The invention discloses a method and a system for controlling local erasing voltage of a liquid crystal writing device, wherein the control method comprises the following steps: defining the process of the erasing device from entering the writing area to leaving the writing area as an erasing period; defining the voltage value loaded by each conductive area on the two conductive layers in the erasing preparation state; the voltage value can enable an electric field formed between the two conductive layers to be smaller than an erasing electric field; in an erasing period, controlling the voltage value applied on the two conductive layers to return to an erasing preparation state every time an erasing action is executed; and when the next erasing action is executed, controlling the voltage value to be changed from the erasing preparation state to the set voltage value required for realizing the local erasing. Compared with the prior art that the voltage applied by the two conductive layers is reduced to zero after each erasing action is executed, the scheme of the invention greatly shortens the time required by each erasing action and improves the erasing efficiency.

Description

Local erasing voltage control method and system for liquid crystal writing device
Technical Field
The invention relates to the technical field of local erasing of liquid crystal writing devices, in particular to a local erasing voltage control method and system of a liquid crystal writing device.
Background
The liquid crystal writing film on the market at present has the working principle that the bistable characteristic of liquid crystal is utilized to display and/or erase the writing content on the liquid crystal writing board. For example, cholesteric liquid crystal is used as a writing film, the liquid crystal state is changed by pressure acting on a liquid crystal writing board to present the track of a writing pen, and then corresponding writing contents are displayed; the cholesteric liquid crystal structure is changed by applying an electric field, so that the writing pressure track on the liquid crystal writing board disappears to realize erasing.
In the prior art, when local erasing is realized, a conductive layer is generally divided into a plurality of conductive areas, and voltage required for realizing the local erasing is directly applied to a set conductive area to realize the local erasing; after the partial erasing function is completed, the voltage applied between the two conductive layers needs to be reduced to zero, so that the purpose of writing again can be achieved. However, due to the influence of the capacitance effect of the liquid crystal writing film, the voltage applied to the voltage boosting circuit hardly reaches the set target voltage value in a short time, and thus the whole of the strip-shaped conductive region covering the region to be erased may be shallow or disappear during the erasing process.
In order to solve the above problems, the prior art discloses a local erase voltage control method with step-by-step voltage boosting and step-by-step voltage reducing, so that the voltage is stably boosted to a target voltage value, the influence of the capacitance effect of the liquid crystal writing film can be reduced, the requirements on the quality and the processing technology of the liquid crystal writing film are reduced, and the yield of the liquid crystal writing film is improved; however, each time the method executes an erasing action, the method needs to go through a complete boosting process and a voltage reduction process, and finally, the voltages applied by the two conductive layers are reduced to zero; this makes the execution time of one-time erasing action very long, influences the efficiency of erasing, is unfavorable for promoting user's use experience.
Disclosure of Invention
In order to solve the problems, the invention provides a method and a system for controlling local erasing voltage of a liquid crystal writing device, which define an erasing preparation state and voltage values applied to two conducting layers in the state, after the erasing device enters a writing area, the applied voltage is stably increased to the set voltage value by adopting a step-by-step boosting mode, after an erasing action is executed for one time, the voltage value is controlled to return to the erasing preparation state, and when the next erasing action is executed, the voltage values applied to the two conducting layers are directly increased to the set voltage value from the voltage value applied in the erasing preparation state; the voltage is reduced to zero only after the erasing device leaves the writing area; therefore, the time required by executing the erasing action each time is greatly shortened, and the erasing efficiency is improved.
In order to achieve the above purpose, in some embodiments, the following technical solutions are adopted:
a liquid crystal writing device local erasing voltage control method, the said liquid crystal writing device includes the first conducting layer, bistable liquid crystal layer and second conducting layer, the first conducting layer and second conducting layer are divided into two or more conductive areas separately; the control method comprises the following steps:
defining the process of the erasing device from entering the writing area to leaving the writing area as an erasing period;
defining the voltage value loaded by each conductive area on the two conductive layers in the erasing preparation state; the voltage value can enable an electric field formed between the two conductive layers to be smaller than an erasing electric field;
in an erasing period, controlling the voltage value applied on the two conductive layers to return to an erasing preparation state every time an erasing action is executed; and when the next erasing action is executed, controlling the voltage value to be changed from the erasing preparation state to the set voltage value required for realizing the local erasing.
In an erasing period, when the first erasing action is executed, voltages applied to the set conductive areas on the two conductive layers are respectively loaded to an erasing preparation state, and then the erasing preparation state is changed to a set voltage value required for realizing partial erasing.
After the erasing period is finished, the voltage applied to the set conductive areas on the two conductive layers is controlled to be zero from the erasing preparation state.
After the erasing period is executed for the set times, the voltage values applied to the first conductive layer and the second conductive layer are exchanged to prevent the liquid crystal and the insulating layer from generating ion aggregation.
In other embodiments, the following technical solutions are adopted:
a voltage driving controller of a liquid crystal writing device loads and executes the local erasing voltage control method of the liquid crystal writing device.
In other embodiments, the following technical solutions are adopted:
a liquid crystal writing device comprises the voltage driving controller; or, the local erasing voltage control method is adopted to realize the local erasing.
Compared with the prior art, the invention has the beneficial effects that:
in each erasing period, after one erasing action is executed, the applied voltage value is controlled to return to an erasing preparation state, and when the next erasing action is executed, the voltage applied in the erasing preparation state is directly increased to a set voltage value; compared with the prior art that the voltage applied to the two conductive layers is reduced to zero after each erasing action is executed, the scheme of the invention greatly shortens the time required for executing the erasing action each time and improves the erasing efficiency.
The applied voltage can also be increased or decreased step by step to a target voltage value required for realizing local erasing or decreased to zero; the influence of the capacitance effect of the liquid crystal writing film is reduced, the influence on the handwriting of the area outside the local erasing area in the boosting process is avoided, and the local erasing can be better realized; meanwhile, the requirements on the quality and the processing precision of the liquid crystal writing film are reduced, and the yield of the liquid crystal writing film is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the application and, together with the description, serve to explain the application and are not intended to limit the application.
FIG. 1 is a diagram illustrating a control process during erase in an embodiment of the present invention;
FIG. 2 is a schematic diagram of voltages applied to two conductive layers in an erase preparation state according to the embodiment of the present invention;
FIG. 3 is a schematic diagram of a voltage control process for performing an erase operation for the first time during an erase period according to an embodiment of the present invention;
FIG. 4(a) is a schematic diagram of another voltage control process for performing an erase operation for the first time during an erase period according to an embodiment of the present invention;
FIG. 4(b) is a schematic diagram of a voltage control process for performing an erase operation for the first time during the next erase period according to an embodiment of the present invention;
FIG. 5(a) is a schematic diagram of a voltage control process after an erase operation is performed within an erase period according to an embodiment of the present invention;
FIG. 5(b) is a schematic diagram of a voltage control process when an erase operation is performed again during an erase period according to an embodiment of the present invention;
fig. 6(a) - (b) are schematic diagrams of two voltage control processes after the end of one erase period disclosed in the embodiment of the present invention.
Detailed Description
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
Example one
According to an embodiment of the invention, an embodiment of a method for controlling a local erase voltage of a liquid crystal writing device is disclosed.
The liquid crystal writing device comprises a first conducting layer, a bistable liquid crystal layer and a second conducting layer which are sequentially arranged, wherein the first conducting layer and the second conducting layer are respectively divided into two or more conducting areas;
in this embodiment, the first conductive layer is divided into two or more transverse conductive regions insulated from each other, and the second conductive layer is divided into two or more longitudinal conductive regions insulated from each other; the conductive regions on the first conductive layer are spatially vertically interleaved with the conductive regions on the second conductive layer. The whole writing area is divided into a grid-shaped structure by dividing the conductive layer, and each grid is an erasing area which can be erased independently.
Of course, the local erasing voltage application control method of the present embodiment can be applied to other divided liquid crystal writing apparatuses, such as: in the liquid crystal writing device divided into the irregular-size grid shape, those skilled in the art can control the local erasing voltage of the liquid crystal writing device in different division forms according to the design idea of the embodiment.
Referring to fig. 1, the boost process control method disclosed in the present embodiment specifically includes:
defining the process of the erasing device from entering the writing area to leaving the writing area as an erasing period; during an erase period, the erase device may perform multiple partial erase operations; such as: after erasing one writing, erasing the writing at another position; or after erasing a part of handwriting, continuously erasing the residual handwriting.
Defining an erasing preparation state and a voltage value loaded on each conductive area on the two conductive layers in the erasing preparation state; the voltage value can enable an electric field formed between the two conductive layers to be smaller than an erasing electric field of the liquid crystal, and the electric field can not cause the handwriting of the corresponding area to disappear or become shallow.
In an erasing period, controlling the voltage value applied on the two conductive layers to return to an erasing preparation state every time an erasing action is executed; and when the next erasing action is executed, controlling the voltage value to be changed from the erasing preparation state to the set voltage value required for realizing the local erasing.
In an erasing period, when the first erasing action is executed, the voltages applied to the set conductive areas on the two conductive layers are respectively loaded to an erasing preparation state in a step boosting mode, and then the erasing preparation state is changed to a set voltage value required by realizing local erasing.
After the erasing period is finished, namely the erasing device moves out of the writing area, the voltage applied to the set conductive areas on the two conductive layers is controlled to be changed from the erasing preparation state to zero.
After the erasing period is executed for the set times, the voltages applied to the first conductive layer and the second conductive layer are exchanged to prevent the liquid crystal and the insulating layer from generating ion aggregation.
The process realizes the stable loading of the voltage by adopting a step-by-step voltage boosting and step-by-step voltage reducing mode in an erasing period, and eliminates the influence of the capacitance effect of the upper conducting layer and the lower conducting layer of the liquid crystal writing device; meanwhile, after each erasing action is finished, the voltage is not directly reduced to zero, but reduced to an erasing preparation state; when the next erasing action is continuously executed, directly adjusting the voltage from the erasing preparation state to the voltage required by realizing the local erasing; therefore, the time required by erasing can be greatly shortened, the erasing efficiency is improved, and the use experience of a user is improved.
In this embodiment, the erase preparation state specifically includes:
the same or similar first voltage is applied to the conductive areas arranged on the first conductive layer, and the same or similar second voltage is applied to the conductive areas arranged on the second conductive layer;
wherein | the second voltage — the first voltage | is smaller than an erase voltage of the liquid crystal.
It should be noted that, for convenience of voltage driving control, voltages applied to different conductive regions on the first conductive layer or the second conductive layer may be the same; however, as will be readily appreciated by those skilled in the art, the voltages applied to the different conductive regions on each conductive layer may also be similar in value, and slight numerical changes will not affect the overall control method.
Based on this, the voltages applied to the two conductive layers to set the conductive regions are respectively applied to the erase preparation state, and two schemes can be included:
firstly, voltages applied to the set conductive areas on the two conductive layers are directly loaded to an erasing preparation state from zero respectively;
and secondly, loading the voltages applied to the set conductive areas on the two conductive layers to the same or similar first voltage from zero respectively, and then loading the voltages applied to the set conductive areas on the second conductive layer to the same or similar second voltage.
In both schemes, boosting is realized by adopting a step-by-step boosting idea, and only the boosting process is slightly different.
As a specific implementation, the relationship that the first voltage and the second voltage satisfy is specifically:
second voltage t1First voltage, wherein t1In the range of [ 1.6-2.4 ]]Taking values in between.
In a more specific embodiment, the first voltage is selected as an erase start voltage Va of the liquid crystal, and the second voltage is 2 × Va, i.e., t is taken12; at this time, the voltage applied in the erase ready state is shown in fig. 2(a), where the voltage applied to each set conductive region on the first conductive layer is Va, and the voltage applied to each set conductive region on the second conductive layer is 2 Va; the voltage difference between the two conductive layers is Va, and Va is smaller than the erasing voltage of the liquid crystal, so that the disappearance or the lightening of the written handwriting can not be caused.
FIG. 3 shows the voltage control of two conductive layers during the first erase operation during an erase cycle; referring to fig. 3, on the first conductive layer and the second conductive layer, an initial voltage of each conductive region is zero; assuming that each grid of the nine-square grid is an erasing area on the writing device, the middle grid is an area to be erased, and the rest grids are peripheral areas, wherein the size of the peripheral areas can be set according to needs, and can be the whole writing area or a set partial area;
the specific boost control process of the local erasing voltage comprises the following steps:
(1) respectively applying a set voltage Va to each conductive area on the two conductive layers, so that the voltage difference of all the erasing areas in the graph is 0; the voltage difference of each erasing area is equal at this time, and all the writing can not be erased.
(2) Increasing the voltage value of each conductive area on the second conductive layer from Va to 2Va, so that the voltage difference of all the erasing areas in the graph is Va; wherein Va > 0, and Va is less than the erase voltage; the voltage difference between the erased areas is equal, and all the writing can not be erased.
(3) Adjusting the voltage of the conductive area covering the local erasing area on the first conductive layer to be 0, and adjusting the voltage of the conductive area covering the local erasing area on the second conductive layer to be 3Va, so that the voltage difference between the conductive areas covering the local erasing areas on the two conductive layers is 3Va, and the erasing voltage is achieved; while the voltage difference between the set conductive regions outside the partially erased region is maintained at Va and is not affected by the erase voltage.
Of course, in the above process, the voltage on the second conductive layer is increased from 0 to Va, and then from Va to 2 Va; in other embodiments, the voltage on the second conductive layer can also be increased from 0 to 2Va directly, and referring to fig. 4(a), the erase effect is not affected during the step-up process.
It should be noted that the above-mentioned adjustment of the voltage of the conductive region covering the local erase region on the second conductive layer to be 3Va is only an exemplary illustration, and a person skilled in the art can select the voltage according to actual needs, for example: can be randomly selected from [2.4Va to 3.6Va ].
It can be seen that, in the step-by-step boosting mode of the present embodiment, the electric fields formed between the conductive regions are kept the same and smaller than the erase electric field, except that the electric field in the local erase region is finally raised to the erase electric field during the boosting process. Therefore, in the whole boosting process, only the handwriting of the local erasing area is erased, and the handwriting of other areas is not influenced; therefore, the influence of the capacitance effect on the local erasing effect in the boosting process is overcome.
FIG. 5(a) shows the voltage control process for two conductive layers after one erase operation is performed during one erase period; the method specifically comprises the following steps: it is only necessary to adjust the voltage of the conductive region on the first conductive layer covering the partial erase region from 0 to 2Va and the voltage of the conductive region on the second conductive layer covering the partial erase region from 3Va to Va, at which time the voltage driving values on both conductive layers are returned to the erase ready state.
FIG. 5(b) shows the voltage control process of two conductive layers when erasing is performed again during one erasing period; the method specifically comprises the following steps: on the basis of the erase preparation state, the voltage of the conductive area covering the partial erase area on the first conductive layer is adjusted to be 0, and the voltage of the conductive area covering the partial erase area on the second conductive layer is adjusted to be 3 Va.
FIGS. 6(a) - (b) show the voltage control process for two conductive layers after one erase period; after the applied voltage returns to the erase ready state, with reference to fig. 6 (a):
(1) reducing the voltage of each set conductive region on the second conductive layer from 2Va to Va;
(2) reducing the voltage of all conductive areas on the first conductive layer and the second conductive layer from Va to zero;
or,
after the applied voltage returns to the erase ready state, with reference to fig. 6 (b):
the voltage of all conductive areas on the first conductive layer and the second conductive layer will be directly zero.
It can be seen that in the step-down process, the voltage difference between the conductive areas on the two conductive layers is the same, so that no visual change is caused, and the influence of the capacitance effect on the local erasing effect is overcome.
In practical applications, after the erasing period is performed for a set number of times, voltages applied to the first conductive layer and the second conductive layer are interchanged, so that the electric fields formed on the entire liquid crystal writing device have the same magnitude but opposite directions; the set times are set according to actual needs, such as:
fig. 2(a) shows a schematic diagram of a voltage application manner in an erase ready state, and fig. 4(a) shows an example of a voltage application process when an erase operation is performed for the first time in an erase period based on the erase normal state;
fig. 2(b) shows a schematic diagram of a voltage application manner in the erase ready state after voltage switching, and fig. 4(b) shows an example of a voltage application process when the erase operation is performed for the first time in the erase period based on the erase normal state.
The switching of the voltage applied to the upper and lower conductive layers can avoid the ion aggregation of the liquid crystal and the insulating layer caused by applying an electric field in the same direction to the liquid crystal writing film for a long time.
In this embodiment, a voltage application process during the erase period in the erase preparation state shown in fig. 2(a) is mainly described, and the voltage application process after the voltage exchange on the two conductive layers is the same as the foregoing principle, and is not described again.
Example two
According to an embodiment of the present invention, an embodiment of a voltage driving controller of a liquid crystal writing device is disclosed, which loads and executes the local erasing voltage control method of the liquid crystal writing device described in the first embodiment.
EXAMPLE III
According to an embodiment of the present invention, an embodiment of a liquid crystal writing apparatus is disclosed, which includes the voltage driving controller of the second embodiment; alternatively, the local erase voltage control method described in the first embodiment is adopted to implement local erase.
The liquid crystal writing device of the embodiment can be a writing board, a drawing board or a blackboard;
specifically, the local erasing voltage loading control method of the present invention can be applied to a light energy writing board, a light energy liquid crystal writing board, a light energy large liquid crystal writing blackboard, a light energy dust-free writing board, a light energy portable blackboard, an electronic drawing board, an lcd electronic writing board, an electronic notepad, a doodle board, a child writing board, a child doodle drawing board, an erasing function sketch board, a liquid crystal electronic drawing board, a color liquid crystal writing board, or other related products known by those skilled in the art, so as to implement the local erasing function of the above products.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A liquid crystal writing device local erasing voltage control method, the said liquid crystal writing device includes the first conducting layer, bistable liquid crystal layer and second conducting layer, the first conducting layer and second conducting layer are divided into two or more conductive areas separately; the control method is characterized by comprising the following steps:
defining the process of the erasing device from entering the writing area to leaving the writing area as an erasing period;
defining the voltage value loaded by each conductive area on the two conductive layers in the erasing preparation state; the voltage value can enable an electric field formed between the two conductive layers to be smaller than an erasing electric field;
in an erasing period, controlling the voltage value applied on the two conductive layers to return to an erasing preparation state every time an erasing action is executed; and when the next erasing action is executed, controlling the voltage value to be changed from the erasing preparation state to the set voltage value required for realizing the local erasing.
2. The method as claimed in claim 1, wherein during an erase period, when performing a first erase operation, the voltages applied to the conductive regions of the conductive layers are applied to the erase ready state, and then the erase ready state is changed to the set voltages required for performing the partial erase.
3. The method of claim 2, wherein the erase preparation state is specifically:
the same or similar first voltage is applied to the conductive areas arranged on the first conductive layer, and the same or similar second voltage is applied to the conductive areas arranged on the second conductive layer;
wherein | the second voltage — the first voltage | is smaller than an erase voltage of the liquid crystal.
4. The method of claim 2, wherein applying voltages to the conductive areas defined on the two conductive layers to the erase ready state respectively comprises:
respectively and directly loading voltages applied by the set conductive areas on the two conductive layers from zero to an erasing preparation state;
or,
the voltages applied to the set conductive areas on the two conductive layers are respectively loaded to the same or similar first voltages from zero, and then the voltages applied to the set conductive areas on the second conductive layer are loaded to the same or similar second voltages.
5. The liquid crystal writing apparatus local erasing voltage controlling method of claim 3 or 4, wherein the second voltage t1First voltage, t1In the range of [ 1.6-2.4 ]]Taking values in between.
6. The method as claimed in claim 3 or 4, wherein said first voltage is an erase start voltage Va of the liquid crystal, and said second voltage is 2 × Va.
7. The method as claimed in claim 1, wherein after the erasing period is finished, the voltage applied to the set conductive regions on the two conductive layers is controlled to change from the erase ready state to zero.
8. The method of claim 1, wherein voltages applied to the first conductive layer and the second conductive layer are interchanged after a set number of erase periods.
9. A liquid crystal writing instrument voltage driving controller, characterized in that the controller loads and executes the liquid crystal writing instrument local erasing voltage control method according to any one of claims 1 to 8.
10. A liquid crystal writing apparatus comprising the voltage drive controller of claim 9; alternatively, the local erase is implemented using the local erase voltage control method of any one of claims 1-8.
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CN113406822A (en) * 2021-08-19 2021-09-17 山东蓝贝思特教装集团股份有限公司 Method and system for controlling illumination erasing voltage of liquid crystal writing device
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