CN112634971A - Method and device for determining NAND flash memory reading voltage - Google Patents

Method and device for determining NAND flash memory reading voltage Download PDF

Info

Publication number
CN112634971A
CN112634971A CN202011581255.3A CN202011581255A CN112634971A CN 112634971 A CN112634971 A CN 112634971A CN 202011581255 A CN202011581255 A CN 202011581255A CN 112634971 A CN112634971 A CN 112634971A
Authority
CN
China
Prior art keywords
voltage
reading
page
read
voltage group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202011581255.3A
Other languages
Chinese (zh)
Other versions
CN112634971B (en
Inventor
吴莉莉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei Datang Storage Technology Co ltd
Original Assignee
Hefei Datang Storage Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hefei Datang Storage Technology Co ltd filed Critical Hefei Datang Storage Technology Co ltd
Priority to CN202011581255.3A priority Critical patent/CN112634971B/en
Publication of CN112634971A publication Critical patent/CN112634971A/en
Application granted granted Critical
Publication of CN112634971B publication Critical patent/CN112634971B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/12Programming voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3404Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)

Abstract

The application provides a method and a device for determining a read voltage of a NAND flash memory, wherein the method comprises the following steps: determining a decoding-failed page contained by a sample incompletely programmed block, wherein the sample incompletely programmed block is a block in a NAND flash memory containing an unprogrammed page; determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages; at least one voltage group is selected as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group. According to the technical scheme, the reading voltage group for reading the incompletely programmed block can be determined, and the re-reading efficiency can be improved by re-reading the page of the incompletely programmed block, which fails in decoding, through the reading voltage group, so that the reading efficiency of the NAND flash memory can be improved.

Description

Method and device for determining NAND flash memory reading voltage
Technical Field
The present application relates to, but not limited to, the field of computers, and more particularly, to a method and apparatus for determining a read voltage of a NAND flash memory.
Background
Data bits stored in a NAND Flash memory (NAND Flash) are inverted due to the influence of a manufacturing process or electrical characteristics of hardware. In current products using the NAND flash memory, the NAND flash memory is decoded by a decoding module, and when the amount of data which is inverted is large and exceeds the error correction capability of a hardware error correction module, data loss may occur.
A Block in a NAND flash memory may include two states, one state being the presence of pages (pages) in the Block (Block) that are not programmed (Program), which is called an Open Block, and the other state being the presence of all pages in the Block that are programmed, which is called a fully programmed Block (Close Block).
Currently, when a read voltage is selected to read data from the Nand flash memory, the type of the block is not generally distinguished, and the same reading method is adopted when all the pages with block decoding failure (ECC Fail) are re-read. But the rereading effect is not ideal because of the great difference between the Open Block and the Close Block.
Disclosure of Invention
The technology to be solved by the application is to provide a method and a device for determining a read voltage of a NAND flash memory, which can determine a read voltage group for reading an incompletely programmed block, thereby improving the read efficiency of the NAND flash memory.
In order to solve the above technical problem, the present application provides a method for determining a read voltage of a NAND flash memory, including:
determining a decoding-failed page contained by a sample incompletely programmed block, wherein the sample incompletely programmed block is a block in a NAND flash memory containing an unprogrammed page;
determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages;
at least one voltage group is selected as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group.
In one illustrative example, selecting at least one voltage group as a read voltage group for reading an incompletely programmed block based on the number of pages of the successfully recovered page corresponding to each voltage group includes:
and selecting at least one voltage group as a reading voltage group for reading the incompletely programmed block according to the sequence of the page number of the successfully recovered page corresponding to each voltage group from high to low.
In one illustrative example, the method further comprises:
when re-reading a page that fails decoding contained in a non-fully programmed block, the set of read voltages used to read the non-fully programmed block is used to re-read the page that failed decoding.
In one illustrative example, after the selecting at least one voltage set as a read voltage set for reading the incompletely programmed block, the method further comprises:
when more than two voltage groups are selected as the reading voltage groups for reading the incompletely programmed blocks, setting the priority of each voltage group according to the page number of the successfully returned page corresponding to each selected voltage group, wherein the priority is positively correlated with the page number of the successfully returned page.
In one illustrative example, the method further comprises:
when a page which fails to be decoded and is included in the incompletely programmed block is re-read, the page which fails to be decoded is re-read using the read voltage groups for reading the incompletely programmed block in order of the priority of the voltage groups from high to low.
The present application further provides an apparatus for determining a read voltage of a NAND flash memory, the apparatus comprising: a memory and a processor;
the memory is used for storing a program for determining the reading voltage of the NAND flash memory;
the processor is used for reading and executing the program for determining the reading voltage of the NAND flash memory, and the following operations are executed:
determining a decoding-failed page contained by a sample incompletely programmed block, wherein the sample incompletely programmed block is a block in a NAND flash memory containing an unprogrammed page;
determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages;
at least one voltage group is selected as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group.
In one illustrative example, selecting at least one voltage group as a read voltage group for reading an incompletely programmed block based on the number of pages of the successfully recovered page corresponding to each voltage group includes:
and selecting at least one voltage group as a reading voltage group for reading the incompletely programmed block according to the sequence of the page number of the successfully recovered page corresponding to each voltage group from high to low.
In one illustrative example, the processor, configured to read and execute the program for determining a NAND flash read voltage, further performs the following operations:
after selecting at least one voltage group as a reading voltage group for reading the incomplete programming block, when more than two voltage groups are selected as the reading voltage groups for reading the incomplete programming block, setting the priority of each voltage group according to the number of pages of successfully returned pages corresponding to each selected voltage group, wherein the priority is positively correlated with the number of pages of the successfully returned pages.
In one illustrative example, the processor, configured to read and execute the program for determining a NAND flash read voltage, further performs the following operations:
when a page which fails to be decoded and is included in the incompletely programmed block is re-read, the page which fails to be decoded is re-read using the read voltage groups for reading the incompletely programmed block in order of the priority of the voltage groups from high to low.
The present application further provides a computer storage medium having a computer program stored therein, wherein the computer program is configured to execute any of the methods for determining a read voltage of a NAND flash memory described above when running.
The application provides a method and a device for determining a read voltage of a NAND flash memory, wherein the method comprises the following steps: determining a decoding-failed page contained by a sample incompletely programmed block, wherein the sample incompletely programmed block is a block in a NAND flash memory containing an unprogrammed page; determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages; at least one voltage group is selected as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group. According to the technical scheme, the reading voltage group for reading the incompletely programmed block can be determined, and the re-reading efficiency can be improved by re-reading the page of the incompletely programmed block, which fails in decoding, through the reading voltage group, so that the reading efficiency of the NAND flash memory can be improved.
Drawings
The accompanying drawings are included to provide an understanding of the present disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.
FIG. 1 is a flowchart illustrating a method for determining a read voltage of a NAND flash memory according to a first embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of an apparatus for determining a read voltage of a NAND flash memory according to a first embodiment of the present application.
Detailed Description
The present application describes embodiments, but the description is illustrative rather than limiting and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or instead of any other feature or element in any other embodiment, unless expressly limited otherwise.
The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in this application may also be combined with any conventional features or elements to form a unique inventive concept as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive aspects to form yet another unique inventive aspect, as defined by the claims. Thus, it should be understood that any of the features shown and/or discussed in this application may be implemented alone or in any suitable combination. Accordingly, the embodiments are not limited except as by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
Further, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other orders of steps are possible as will be understood by those of ordinary skill in the art. Therefore, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Further, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.
Example one
As shown in fig. 1, the present embodiment provides a method for determining a read voltage of a NAND flash memory, including:
step S101, determining a page which fails to be decoded and is contained in a sample incompletely programmed block, wherein the sample incompletely programmed block is a block which contains an unprogrammed page in a NAND flash memory;
step S102, determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages;
step S103, selecting at least one voltage group as a reading voltage group for reading the incomplete programming block according to the page number of the page which is successfully solved and corresponds to each voltage group.
In this embodiment, the sample incompletely programmed blocks are incompletely programmed blocks for use as samples, one or more of the incompletely programmed blocks may be selected in advance, the incompletely programmed blocks may be used as sample incompletely programmed blocks, and then the read voltage set for reading the incompletely programmed blocks may be determined by the sample incompletely programmed blocks.
In this embodiment, the decoding means to decode the error data in the page that fails to be decoded, and when a certain voltage group is used to re-read a page that fails to be decoded, the error data in the page may be decoded, or the error data in the page may not be decoded. The successfully decoded page is a page in which the error data in the page that failed to be decoded is successfully decoded. The solution in this embodiment is to correct the error data. According to the technical scheme, the reading voltage group for reading the incompletely programmed block can be determined, and the success rate of decoding the page with the decoding failure can be improved by re-reading the page with the decoding failure of the incompletely programmed block through the reading voltage group, so that the re-reading efficiency is improved, and the reading efficiency of the NAND flash memory can be improved.
In one illustrative example, the number of sample incompletely programmed blocks is plural;
determining the number of pages successfully decoded back when re-reading the page failed to be decoded by using each voltage group according to the acquired plurality of voltage groups corresponding to the NAND flash memory, wherein the determining comprises the following steps:
according to the obtained multiple voltage groups corresponding to the NAND flash memory, re-reading all decoding failed pages contained in the sample incomplete programming blocks by using each voltage group in the multiple voltage groups;
counting the page number of the page successfully decoded back when each voltage group rereads the page failed in decoding;
selecting at least one voltage group as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group, comprising:
and selecting at least one voltage group as a reading voltage group for reading the incompletely programmed block according to the sequence of the page number of the successfully recovered page corresponding to each voltage group from high to low.
In one illustrative example, the method further comprises:
when re-reading a page that fails decoding contained in a non-fully programmed block, the set of read voltages used to read the non-fully programmed block is used to re-read the page that failed decoding.
In this embodiment, the incomplete coding block is a block in the NAND flash memory containing an un-programmed page, and the incomplete coding block may be a sample incomplete coding block, or an incomplete coding block other than the sample incomplete coding block, that is, after determining that a read voltage group for reading the incomplete programming block rereads the page which fails to be decoded, any page which fails to be decoded contained in the incomplete programming block may be reread by the read voltage group. In addition, the set of read voltages used to read the incompletely programmed blocks can also be updated through constant learning, thereby continuously optimizing the set of read voltages used to read the incompletely programmed blocks.
In one illustrative example, after incompletely programming a block said selecting at least one voltage set as a read voltage set for reading said incompletely programmed block, the method further comprises:
when more than two voltage groups are selected as the reading voltage groups for reading the incompletely programmed blocks, setting the priority of each voltage group according to the page number of the successfully returned page corresponding to each selected voltage group, wherein the priority is positively correlated with the page number of the successfully returned page.
In one illustrative example, the method further comprises:
when the page which fails to be decoded and is contained in the incomplete programming block is re-read, the page which fails to be decoded is re-read by using the read voltage group for reading the incomplete programming block according to the sequence that the priority of the voltage group is from high to low.
In this embodiment, when the read voltage group for reading the incompletely programmed block includes a plurality of voltage groups, a priority may be set for each voltage group, when a page included in the incompletely programmed block that fails to be decoded is re-read, the page that fails to be decoded is re-read using the voltage group with the highest priority first, if the page that fails to be decoded can be completely decoded back, other voltage groups may not be used, and if there are pages that have not been decoded back, the remaining page that fails to be decoded is re-read using the voltage group with the second priority.
As shown in fig. 2, the present embodiment also provides an apparatus for determining a read voltage of a NAND flash memory, the apparatus comprising: a memory 10 and a processor 11;
the memory 10 is used for storing a program for determining the reading voltage of the NAND flash memory;
the processor 11 is configured to read and execute the program for determining the NAND flash read voltage, and perform the following operations:
determining a decoding-failed page contained by a sample incompletely programmed block, wherein the sample incompletely programmed block is a block in a NAND flash memory containing an unprogrammed page;
determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages;
at least one voltage group is selected as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group.
In one illustrative example, the number of sample incompletely programmed blocks is plural;
determining the number of pages successfully decoded back when re-reading the page failed to be decoded by using each voltage group according to the acquired plurality of voltage groups corresponding to the NAND flash memory, wherein the determining comprises the following steps:
according to the obtained multiple voltage groups corresponding to the NAND flash memory, re-reading all decoding failed pages contained in the sample incomplete programming blocks by using each voltage group in the multiple voltage groups;
counting the page number of the page successfully decoded back when each voltage group rereads the page failed in decoding;
selecting at least one voltage group as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group, comprising:
and selecting at least one voltage group as a reading voltage group for reading the incompletely programmed block according to the sequence of the page number of the successfully recovered page corresponding to each voltage group from high to low.
In an exemplary embodiment, the processor 11 is configured to read and execute the program for determining the NAND flash read voltage, and further configured to:
when re-reading a page including a decoding failure of a non-fully programmed block, re-reading the page including the decoding failure using the set of read voltages for reading the non-fully programmed block
In an exemplary embodiment, the processor 11 is configured to read and execute the program for determining the NAND flash read voltage, and further configured to:
after selecting at least one voltage group as a reading voltage group for reading the incomplete programming block, when more than two voltage groups are selected as the reading voltage groups for reading the incomplete programming block, setting the priority of each voltage group according to the number of pages of successfully returned pages corresponding to each selected voltage group, wherein the priority is positively correlated with the number of pages of the successfully returned pages.
In an exemplary embodiment, the processor 11 is configured to read and execute the program for determining the NAND flash read voltage, and further configured to:
when the page which fails to be decoded and is contained in the incomplete programming block is re-read, the page which fails to be decoded is re-read by using the read voltage group for reading the incomplete programming block according to the sequence that the priority of the voltage group is from high to low.
The present embodiment also provides a computer storage medium having a computer program stored therein, wherein the computer program is configured to execute any one of the methods for determining a read voltage of a NAND flash memory described above when the computer program is executed.
Example 1
The method of determining the read voltage of the NAND flash memory of the present application is further explained by way of example below.
In this example, a certain type of NAND flash memory is selected, and a plurality of incompletely programmed blocks Open Block in the NAND flash memory are used as sample Open blocks.
Step one, determining valid pages contained in each sample incomplete programming block, reading each valid page by using a default voltage, and determining pages with decoding failure (ECC Fail);
assume that 5 samples Open Block are taken, including Block 1, Block 2, Block 3, Block 4, and Block 5.
Wherein, block 1 comprises 100 pages, 91 of which are programmed, and the remaining 9 pages are not programmed, and then the 91 programmed pages are valid pages, and the page where ECC Fail occurs has 8 pages;
block 2 includes 100 pages, 90 of which are programmed and the remaining 10 pages are not programmed, then the 90 programmed pages are valid pages and the page where ECC Fail occurs is 18 pages;
block 3 includes 100 pages, 89 of which are programmed, the remaining 11 pages are not programmed, then the 89 programmed pages are valid pages, and the page where ECC Fail occurs is 7 pages;
block 4 includes 100 pages, of which 99 pages are programmed and the remaining 1 page is not programmed, then the 99 programmed pages are valid pages and the page where ECC Fail occurs is 16 pages;
block 5 includes 100 pages, 95 of which are programmed and the remaining 5 pages are not programmed, then the 95 programmed pages are valid pages and 17 pages are pages where ECC Fail occurs.
In this example, the default voltage generally refers to a read value of 0 offset, and the valid data refers to data sent by a host and written in the Nand flash memory, or data used as a mark and written, which are data that need to be used later, so such data is referred to as valid data.
Valid data is data that is written full of the whole block sometimes because of the characteristics of Nand flash memory, and if the rest of pages do not have data that needs to be written, random data or data 0 is written in the rest of pages, so that the data is written full of the whole block, and the data has no other role, so that the data is called invalid data.
Determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory;
in this example, a rereading table provided by a NAND flash manufacturer may be obtained in advance, and a plurality of voltage groups are recorded in the rereading table. In addition, the rereading table provided by the manufacturer can be modified and updated, for example, one or more reading voltages in the voltage group in the rereading table provided by the manufacturer can be modified, and a customized voltage group can be added in the rereading table provided by the manufacturer.
Assume that the following five voltage groups are included in the current rereading table, each voltage group including 7 read voltages, as shown below:
a first set {0xFF, 0x05,0x06,0xFA,0x10,0x03,0xFB }, a second set {0xFF, 0x05,0x06,0x FA }, a third set {0x 10,0x03,0x FB }, a fourth set {0x 06,
a second set {0xFC, 0x00,0x01,0xFE,0x03,0x03,0xFC }, a second set of,
A third group {0xFA, 0x01,0x06,0xFB,0x15,0x07,0xFC }),
A fourth group {0xFF, 0x00,0x01,0xFF,0x03,0x04,0xFC }),
A fifth group {0xEF, 0x00,0x03,0xFD,0x00,0x03,0xFA }.
In this example, the pages of ECC Fail contained in each of the 5 sample Open blocks may be summed together, that is, a total of 8+18+7+16+17 ═ 66 pages. The 66 pages of ECC Fail are then re-read using five voltage groups, respectively.
Assume that the first set of corresponding pages of successfully reread ECC Fail is 30 pages;
the second set of pages corresponding to ECC Fail that was successfully reread is 45 pages;
the third group of pages corresponding to the ECC Fail that is successfully reread is 21 pages;
the fourth group of pages corresponding to ECC Fail to be read again is 50 pages;
the fifth set corresponds to a page of ECC Fail being 61 pages.
Selecting at least one voltage group as a reading voltage group for reading Open Block according to the sequence of the page number of the successfully-solved page corresponding to each voltage group from high to low;
in this example, one voltage group may be selected, or a plurality of voltage groups may be selected.
If one voltage group is selected, the voltage group with the largest number of pages of the page of the ECC Fail that is successfully reread is selected, and if the above assumption is taken as an example, the fifth group is selected and used as the read voltage group for reading the Open Block. When a page of ECC Fail subsequently occurs in any Open Block in use, the page of ECC Fail is re-read using the fifth set.
If a plurality of voltage groups are selected, the selection is performed in order of the number of pages of the ECC Fail successfully reread from high to low, and if 2 voltage groups are selected, the fifth group and the fourth group are selected. When a page of ECC Fail is subsequently present in any Open Block in use, the page of ECC Fail is re-read using the fifth and fourth sets. When the fifth group and the fourth group are used to re-read the page of the ECC Fail, the fifth group may be used first, or the fourth group may be used first.
Further, when a plurality of voltage groups are selected, the priority of each voltage group may also be set. For example, taking the above-described selection of the fifth group and the fourth group as an example, since the fifth group corresponds to 61 pages and the fourth group corresponds to 50 pages, the priority of the fifth group is set higher than that of the fourth group. When the page of the ECC Fail appears in any Open Block in subsequent use, the page of the ECC Fail is re-read by using the fifth group according to the priority order of the fifth group and the fourth group, and if the page of the ECC Fail still exists after the re-reading of the fifth group, the page of the ECC Fail is re-read by using the fourth group.
By the technical scheme, the reading voltage group of the incompletely programmed Block can be optimized, the optimized reading voltage group is used when the ECC Fail page appears in the Open Block, the success rate of page resolution of decoding failure can be improved, repeated reading caused by inaccurate reading voltage selection is avoided, the reading efficiency of the Open Block is improved, and the reading performance and stability of a product are improved.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the components may be implemented as software executed by a processor, such as a digital signal processor or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.

Claims (10)

1. A method of determining a NAND flash read voltage, comprising:
determining a decoding-failed page contained by a sample incompletely programmed block, wherein the sample incompletely programmed block is a block in a NAND flash memory containing an unprogrammed page;
determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages;
at least one voltage group is selected as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group.
2. The method of claim 1, wherein:
selecting at least one voltage group as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group, comprising:
and selecting at least one voltage group as a reading voltage group for reading the incompletely programmed block according to the sequence of the page number of the successfully recovered page corresponding to each voltage group from high to low.
3. The method of claim 1 or 2, wherein the method further comprises:
when re-reading a page that fails decoding contained in a non-fully programmed block, the set of read voltages used to read the non-fully programmed block is used to re-read the page that failed decoding.
4. The method of claim 2, wherein after the selecting at least one voltage group as a read voltage group for reading the incompletely programmed block, the method further comprises:
when more than two voltage groups are selected as the reading voltage groups for reading the incompletely programmed blocks, setting the priority of each voltage group according to the page number of the successfully returned page corresponding to each selected voltage group, wherein the priority is positively correlated with the page number of the successfully returned page.
5. The method of claim 4, wherein the method further comprises:
when a page which fails to be decoded and is included in the incompletely programmed block is re-read, the page which fails to be decoded is re-read using the read voltage groups for reading the incompletely programmed block in order of the priority of the voltage groups from high to low.
6. An apparatus to determine a NAND flash read voltage, the apparatus comprising: a memory and a processor; the method is characterized in that:
the memory is used for storing a program for determining the reading voltage of the NAND flash memory;
the processor is used for reading and executing the program for determining the reading voltage of the NAND flash memory, and the following operations are executed:
determining a decoding-failed page contained by a sample incompletely programmed block, wherein the sample incompletely programmed block is a block in a NAND flash memory containing an unprogrammed page;
determining the page number of the page successfully decoded back when each voltage group is used for re-reading the page failed in decoding according to the acquired multiple voltage groups corresponding to the NAND flash memory; wherein each voltage combination comprises a plurality of read voltages;
at least one voltage group is selected as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group.
7. The apparatus of claim 6, wherein:
selecting at least one voltage group as a read voltage group for reading the incompletely programmed blocks according to the number of pages of the successfully recovered pages corresponding to each voltage group, comprising:
and selecting at least one voltage group as a reading voltage group for reading the incompletely programmed block according to the sequence of the page number of the successfully recovered page corresponding to each voltage group from high to low.
8. The apparatus of claim 6, wherein the processor, configured to read execute the program for determining the NAND flash read voltage, further configured to:
after selecting at least one voltage group as a reading voltage group for reading the incomplete programming block, when more than two voltage groups are selected as the reading voltage groups for reading the incomplete programming block, setting the priority of each voltage group according to the number of pages of successfully returned pages corresponding to each selected voltage group, wherein the priority is positively correlated with the number of pages of the successfully returned pages.
9. The apparatus of claim 8, wherein the processor, configured to read execute the program for determining a NAND flash read voltage, further configured to:
when a page which fails to be decoded and is included in the incompletely programmed block is re-read, the page which fails to be decoded is re-read using the read voltage groups for reading the incompletely programmed block in order of the priority of the voltage groups from high to low.
10. A computer storage medium, in which a computer program is stored, wherein the computer program is arranged to perform the method of determining a NAND flash read voltage of any of claims 1 to 5 when executed.
CN202011581255.3A 2020-12-28 2020-12-28 Method and device for determining NAND flash memory read voltage Active CN112634971B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011581255.3A CN112634971B (en) 2020-12-28 2020-12-28 Method and device for determining NAND flash memory read voltage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011581255.3A CN112634971B (en) 2020-12-28 2020-12-28 Method and device for determining NAND flash memory read voltage

Publications (2)

Publication Number Publication Date
CN112634971A true CN112634971A (en) 2021-04-09
CN112634971B CN112634971B (en) 2024-10-11

Family

ID=75325631

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011581255.3A Active CN112634971B (en) 2020-12-28 2020-12-28 Method and device for determining NAND flash memory read voltage

Country Status (1)

Country Link
CN (1) CN112634971B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101221813A (en) * 2006-10-20 2008-07-16 三星电子株式会社 Methods of restoring data in flash memory devices and related flash memory device memory systems
CN107799150A (en) * 2016-09-06 2018-03-13 西部数据技术公司 The error mitigation of 3D nand flash memories
US20180246782A1 (en) * 2015-11-30 2018-08-30 Huawei Technologies Co., Ltd. Flash Memory Error Correction Method and Apparatus
CN108717385A (en) * 2018-05-23 2018-10-30 中国科学院微电子研究所 Data recovery method and system for flash memory
CN110797068A (en) * 2019-08-06 2020-02-14 广州妙存科技有限公司 Method for quickly searching optimal rereading voltage of NAND flash memory

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101221813A (en) * 2006-10-20 2008-07-16 三星电子株式会社 Methods of restoring data in flash memory devices and related flash memory device memory systems
US20180246782A1 (en) * 2015-11-30 2018-08-30 Huawei Technologies Co., Ltd. Flash Memory Error Correction Method and Apparatus
CN107799150A (en) * 2016-09-06 2018-03-13 西部数据技术公司 The error mitigation of 3D nand flash memories
CN108717385A (en) * 2018-05-23 2018-10-30 中国科学院微电子研究所 Data recovery method and system for flash memory
CN110797068A (en) * 2019-08-06 2020-02-14 广州妙存科技有限公司 Method for quickly searching optimal rereading voltage of NAND flash memory

Also Published As

Publication number Publication date
CN112634971B (en) 2024-10-11

Similar Documents

Publication Publication Date Title
US9842023B2 (en) Generating soft read values using multiple reads and/or bins
CN101763903B (en) Flash memory controller, error correction code controller therein, and the methods and systems thereof
US9639462B2 (en) Device for selecting a level for at least one read voltage
CN114296645B (en) Rereading method in Nand flash memory and solid state disk
CN111863097B (en) Reading control method and device of flash memory
US10049007B2 (en) Non-volatile memory device and read method thereof
CN112562766A (en) Rereading management method, solid state disk controller and solid state disk
CN114333951A (en) Method and device for re-reading flash memory
CN113223583A (en) Method for rereading data in NAND Flash bad block, electronic equipment and storage medium
CN111381775A (en) System and method for quality of service assurance for multi-stream scenarios in hard disk drives
US11269704B2 (en) Memory system and control method thereof
JP2010079486A (en) Semiconductor recording device
US9390002B1 (en) Efficient bin labeling schemes for tracking cells in solid state storage devices
CN115458019A (en) Method and system for adaptively adjusting voltage of solid state disk at high and low temperatures
CN112466378A (en) Solid state disk operation error correction method and device and related components
JP3170123B2 (en) Error correction circuit
US7936609B2 (en) Memory controller, memory system, recording and reproducing method for memory system, and recording apparatus
CN112634971B (en) Method and device for determining NAND flash memory read voltage
CN115454710B (en) Flash memory data reading method and device, electronic equipment and storage medium
CN114078560B (en) Error correction decoding method of NAND flash memory chip, storage medium and SSD device
CN116467225A (en) Bad block management method of flash memory, storage medium, electronic device and solid state disk
CN113094307B (en) Mapping information management method, memory storage device and memory controller
US10997019B1 (en) System and method for facilitating high-capacity system memory adaptive to high-error-rate and low-endurance media
CN111813471B (en) Skin changing method, terminal and storage medium
US20230409428A1 (en) Boot data reading system, boot data reading method, and processor circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information

Address after: 230088 floor 7, block C, building J2, phase II, innovation industrial park, high tech Zone, Hefei, Anhui Province

Applicant after: HEFEI DATANG STORAGE TECHNOLOGY Co.,Ltd.

Address before: 100094 No. 6 Yongjia North Road, Beijing, Haidian District

Applicant before: HEFEI DATANG STORAGE TECHNOLOGY Co.,Ltd.

CB02 Change of applicant information
GR01 Patent grant
GR01 Patent grant