CN1126158C - Semiconductor wafer device and its making method - Google Patents
Semiconductor wafer device and its making method Download PDFInfo
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- CN1126158C CN1126158C CN 99108529 CN99108529A CN1126158C CN 1126158 C CN1126158 C CN 1126158C CN 99108529 CN99108529 CN 99108529 CN 99108529 A CN99108529 A CN 99108529A CN 1126158 C CN1126158 C CN 1126158C
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- contact
- adhesive pad
- circuit board
- conductive contact
- insulating cement
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Abstract
The present invention relates to a method for making a semiconductor wafer device. The present invention provides a semiconductor wafer provided with an adhering pad mounting surface formed with a plurality of adhering pads. An insulating tape layer provided with a first adhering surface and a second adhering surface is provided. The first adhering surface of the insulating tape layer is glued with the adhering pad mounting surface. The insulating tape layer is formed with a plurality of through holes. Contact containing space is formed between each adhering pad and the hole wall of the through hole. A current conducting contact is formed in each contact containing space. A circuit implantation surface provided with a circuit graph is glued with the second adhering surface of the insulating tape layer. The current conducting contacts are glued with the circuit graph corresponding to a circuit board. Therefore, the production cost is reduced, and the production yield rate is enhanced.
Description
(1) technical field
The present invention relates to a kind of semiconductor chip device and manufacture method thereof.
(2) background technology
As shown in Figure 1, 2, a kind of semiconductor chip device 1 in the past comprises semiconductor wafer 10, an insulating cement belt 2 and a printed circuit board (PCB) 3.
Semiconductor wafer 10 has one in order to the adhesive pad installation surface 12 of several adhesive pad 11 to be installed.
Insulating cement belt 2 has one and adheres to the perforation 20 that the adhesive surface 21 of adhesive pad installation surface 12 of semiconductor wafer 10 and several are used to expose the corresponding adhesive pad 11 of semiconductor wafer 10, and insulating cement belt 2 has a lead installation surface 22 relative with this adhesive surface 21, on this lead installation surface 22, be provided with several leads of crossing over corresponding perforation 20 23, it partly is that processing (shown in the arrow among Fig. 1) by wire bonder (figure does not show) comes the adhesive pad 11 that exposed with perforation 20 bonding that each lead 23 is crossed over perforations 20, and several tin balls 24 are to be arranged on the corresponding lead 23 in the past mode.
One circuit of printed circuit board (PCB) 3 is laid surface 30 and is laid the circuitous pattern of being scheduled to corresponding to several tin balls 24 31, these tin balls 24 are the circuitous patterns 31 that are bonded to printed circuit board (PCB) 3 in mode in the past, circuitous pattern 31 is constituted with adhesive pad 11 with lead 23 via tin ball 24 be electrically connected, as shown in Figure 2.
Above-mentioned semiconductor chip device 1 in the past has shortcoming as described below:
1. lead 23 must be reached with expensive wire bonder with the bonding of adhesive pad 11, and therefore, manufacturing cost is very high.In addition, the routing step also can't reach hundred-percent perfection, even in the routing process, if broken, can't mend line, makes qualification rate be subjected to influence.
2. oxidation takes place because of water in air part in lead 23 easily, produces corrosion phenomenon, so reliability is low.
3. the circuitous pattern 31 of printed circuit board (PCB) 3 is to reach by tin ball 24 with being connected of semiconductor wafer 10, so the tin ball has and comes off or the generation of loose contact phenomenon can influence qualification rate.
4. only being connected of printed circuit board (PCB) 3 and semiconductor wafer 10 reaches by tin ball 24, and both contacts area are little and printed circuit board (PCB) 3 is broken away from from semiconductor wafer 10.
(3) summary of the invention
The object of the present invention is to provide a kind of semiconductor chip device and manufacture method thereof that can reduce production costs and improve the production qualification rate.
In order to realize above-mentioned goal of the invention, the manufacture method of semiconductor chip device of the present invention, it comprises following steps: semiconductor wafer is provided, and this semiconductor wafer has an adhesive pad installation surface that is formed with several adhesive pad; The one insulating cement belt with first and second adhesive surface is provided, first adhesive surface of this insulating cement belt and the adhesive pad installation surface of described semiconductor wafer are bonding, the adhesive pad place of insulating cement belt conjunction with semiconductors wafer is formed with several perforations that is used to expose corresponding adhesive pad, formation one contact accommodation space between each adhesive pad and the hole wall that forms the perforation that exposes corresponding adhesive pad; In each contact accommodation space, form a conductive contact; It is bonding in the heat treated mode circuit of the laying circuitous pattern of one printed circuit board (PCB) to be laid surperficial second gluing of surfaces with described insulating cement belt, and it is these conductive contacts are bonding with the corresponding circuitous pattern of circuit board, the viscose glue of second gluing of surfaces has the low-melting fusing point than conductive contact, before the circuitous pattern of these conductive contact welding printed circuit board (PCB)s, the viscose glue circuit of this printed circuit board (PCB) of welding is laid the surface, and seals these conductive contacts in the accommodation space of contact.
The manufacture method of above-mentioned semiconductor chip device, wherein, in the step of the insulating cement belt that provides, first adhesive surface of insulating cement belt is the adhesive pad installation surface that the viscose glue of first adhesive surface is welded to wafer in the heat treated mode.
The manufacture method of above-mentioned semiconductor chip device, wherein, in the step of the conductive contact that forms, each contact accommodation space is implanted a tin ball as conductive contact.
The manufacture method of above-mentioned semiconductor chip device, wherein, in the step of the conductive contact that forms, each contact holding space for holding conducting resinl is as conductive contact.
The manufacture method of above-mentioned semiconductor chip device, wherein, in the step of the conductive contact that forms, ccontaining conductive metallic material in each contact accommodation space forms conductive contact in the electroless plating mode more earlier.
In order to realize above-mentioned goal of the invention, the present invention, a kind of semiconductor chip device, it comprises an insulating cement belt and the printed circuit board (PCB) that semiconductor wafer, has first and second adhesive surface, and first adhesive surface of described insulating cement belt has viscose glue.Described semiconductor wafer has an adhesive pad installation surface that is formed with several adhesive pad; First adhesive surface of described insulating cement belt and the adhesive pad installation surface of semiconductor wafer are bonding, the adhesive pad place of insulating cement belt conjunction with semiconductors wafer forms several perforations that is used to expose corresponding adhesive pad, form a contact accommodation space between the hole wall of each adhesive pad and the perforation that form to expose corresponding adhesive pad, each contact holding space for holding has a conductive contact; Described printed circuit board (PCB), has a circuit laying surface of laying corresponding to the circuitous pattern of these conductive contacts, printed circuit board (PCB) is bonding and these conductive contacts are also bonding with the circuitous pattern of heat treated mode and this printed circuit board (PCB) with second gluing of surfaces of heat treated mode and insulating cement belt, the viscose glue fusing point of second gluing of surfaces is lower than the fusing point of conductive contact, before the circuitous pattern of these conductive contact welding printed circuit board (PCB)s, the viscose glue circuit of welding printed circuit board (PCB) is laid the surface and is sealed these conductive contacts in the accommodation space of contact.
Above-mentioned semiconductor chip device, wherein, the viscose glue of first adhesive surface of insulating cement belt makes it be welded to the adhesive pad installation surface of wafer in the heat treated mode.
Above-mentioned semiconductor chip device, wherein, conductive contact is to be implanted and formed by the tin ball.
Above-mentioned semiconductor chip device, wherein, conductive contact is to be formed by conducting resinl.
Above-mentioned semiconductor chip device, wherein, conductive contact is with electroless plating mode ccontaining conductive metallic material in each contact accommodation space.
(4) description of drawings
Owing to adopted above-mentioned technical solution, semiconductor chip device of the present invention and manufacture method thereof have following advantage:
1. need not wire bonder, so manufacturing cost reduces, and, the production qualification rate of semiconductor chip device can not influenced because of the qualification rate problem of routing.
2. each conductive contact is all sealed after circuit board and insulating cement belt are bonding, therefore can avoid oxidative phenomena to take place and causes short circuit between two adhesive pad because of humidity.
3. being connected between circuit board and insulating barrier is not to utilize the tin ball to reach, but circuit board directly engages with insulating barrier, makes contact area increase, therefore, circuit board just can not be easy to from this insulating tape pull-up from.
4. the present invention utilizes conductive contact design, so qualification rate can be not influenced because of the problem of in the past tin ball.
(5) embodiment
The present invention is described in detail below in conjunction with drawings and Examples.
Fig. 1 is the decomposition side view of semiconductor chip device in the past;
Fig. 2 is the combination schematic diagram of semiconductor chip device in the past;
Fig. 3, Fig. 4, Fig. 5 are the schematic side view of preferred embodiment of the present invention;
Fig. 6 is the schematic side view of the another kind of conductive contact of preferred embodiment of the present invention;
Fig. 7, Fig. 8 are the schematic side view of another conductive contact of preferred embodiment of the present invention.
As Fig. 3, Fig. 4, shown in Figure 5, semiconductor chip device 4 of the present invention comprises semiconductor wafer 40, an insulating cement belt 5 and a printed circuit board (PCB) 6.
Insulating cement belt 5 has first and second adhesive surfaces 50,51 that are relative, and this first adhesive surface 50 is the adhesive pad installation surface 42 that adhere to semiconductor wafer 40 in the heat treated mode.Insulating cement belt 5 is that the position according to the adhesive pad 41 of semiconductor wafer 40 is provided with several perforations 52 with laser mode, makes each perforation 52 expose the adhesive pad 41 of a correspondence.
In each adhesive pad 41 and form to expose formation one contact accommodation space between the hole wall 53 of perforation 52 of corresponding adhesive pad 41.This contact accommodation space is the conductive contact 54 that is formed by conductive metallic material in order to ccontaining, and in the present embodiment, a tin ball is implanted in this contact accommodation space as conductive contact 54.
Printed circuit board (PCB) 6 is laid the predetermined circuitous pattern of laying on the surface 60 corresponding to these conductive contacts 54 61 at its circuit.Circuit board 6 and these conductive contacts 54 are the circuitous patterns 61 that adhere to the correspondence of second adhesive surface 51 of insulating barrier 5 and circuit board 6 under heat treated respectively.In the present embodiment, because the viscose glue 55 of second adhesive surface 51 has the fusing point lower than conductive contact 54, therefore, when heat treated, before conductive contact 54 fusings, the viscose glue 55 of second adhesive surface 51 has been welded to the circuit of printed circuit board (PCB) 6 and has laid surface 60, so that the conductive contact 54 in each contact accommodation space all can be sealed in this contact accommodation space when fusing, does not contact and can not overflow with adjacent conductive contact 54.
As shown in Figure 6, the present invention also can be placed in the conducting resinl as conductive silver glue in the accommodation space of contact as conductive contact 54 '.
Shown in Fig. 7,8, the present invention also can be with a conductive metallic material 56, and for example gold or aluminium ball are placed in earlier in the accommodation space of contact, then, form conductive contact 57 in the electroless plating mode again.
In accompanying drawing of the present invention, only describe semiconductor wafer on a printed circuit board (PCB), and in use, on the printed circuit board (PCB) two or more semiconductor wafers can be set optionally.
Claims (10)
1. the manufacture method of a semiconductor chip device is characterized in that, it comprises following steps:
Semiconductor wafer is provided, and this semiconductor wafer has an adhesive pad installation surface that is formed with several adhesive pad;
The one insulating cement belt with first and second adhesive surface is provided, first adhesive surface of this insulating cement belt and the adhesive pad installation surface of described semiconductor wafer are bonding, the adhesive pad place of insulating cement belt conjunction with semiconductors wafer is formed with several perforations that is used to expose corresponding adhesive pad, formation one contact accommodation space between each adhesive pad and the hole wall that forms the perforation that exposes corresponding adhesive pad;
In each contact accommodation space, form a conductive contact;
It is bonding in the heat treated mode circuit of the laying circuitous pattern of one printed circuit board (PCB) to be laid surperficial second gluing of surfaces with described insulating cement belt, and it is these conductive contacts are bonding with the corresponding circuitous pattern of circuit board, the viscose glue of second gluing of surfaces has the low-melting fusing point than conductive contact, before the circuitous pattern of these conductive contact welding printed circuit board (PCB)s, the viscose glue circuit of this printed circuit board (PCB) of welding is laid the surface, and seals these conductive contacts in the accommodation space of contact.
2. the manufacture method of a kind of semiconductor chip device as claimed in claim 1, it is characterized in that: in the step that described insulating cement belt is provided, first adhesive surface of insulating cement belt is the adhesive pad installation surface that the viscose glue of first adhesive surface is welded to wafer in the heat treated mode.
3. the manufacture method of a kind of semiconductor chip device as claimed in claim 1 is characterized in that: in the step that forms described conductive contact, each contact accommodation space is implanted a tin ball as conductive contact.
4. the manufacture method of a kind of semiconductor chip device as claimed in claim 1 is characterized in that: in the step that forms described conductive contact, each contact holding space for holding conducting resinl is as conductive contact.
5. the manufacture method of a kind of semiconductor chip device as claimed in claim 1 is characterized in that: in the step that forms described conductive contact, ccontaining conductive metallic material in each contact accommodation space forms conductive contact in the electroless plating mode more earlier.
6. semiconductor chip device, it is characterized in that: it comprises an insulating cement belt and the printed circuit board (PCB) that semiconductor wafer, has first and second adhesive surface, and first adhesive surface of described insulating cement belt has viscose glue,
Described semiconductor wafer has an adhesive pad installation surface that is formed with several adhesive pad;
First adhesive surface of described insulating cement belt and the adhesive pad installation surface of semiconductor wafer are bonding, the adhesive pad place of insulating cement belt conjunction with semiconductors wafer forms several perforations that is used to expose corresponding adhesive pad, form a contact accommodation space between the hole wall of each adhesive pad and the perforation that form to expose corresponding adhesive pad, each contact holding space for holding has a conductive contact;
Described printed circuit board (PCB), has a circuit laying surface of laying corresponding to the circuitous pattern of these conductive contacts, printed circuit board (PCB) is bonding and these conductive contacts are also bonding with the circuitous pattern of heat treated mode and this printed circuit board (PCB) with second gluing of surfaces of heat treated mode and insulating cement belt, the viscose glue fusing point of second gluing of surfaces is lower than the fusing point of conductive contact, before the circuitous pattern of these conductive contact welding printed circuit board (PCB)s, the viscose glue circuit of welding printed circuit board (PCB) is laid the surface and is sealed these conductive contacts in the accommodation space of contact.
7. a kind of semiconductor chip device as claimed in claim 6 is characterized in that: the viscose glue of first adhesive surface of insulating cement belt makes it be welded to the adhesive pad installation surface of wafer in the heat treated mode.
8. a kind of semiconductor chip device as claimed in claim 6 is characterized in that: described conductive contact is to be implanted and formed by the tin ball.
9. a kind of semiconductor chip device as claimed in claim 6 is characterized in that: described conductive contact is to be formed by conducting resinl.
10. a kind of semiconductor chip device as claimed in claim 6 is characterized in that: described conductive contact is with electroless plating mode ccontaining conductive metallic material in each contact accommodation space.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99108529 CN1126158C (en) | 1999-06-23 | 1999-06-23 | Semiconductor wafer device and its making method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 99108529 CN1126158C (en) | 1999-06-23 | 1999-06-23 | Semiconductor wafer device and its making method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1279507A CN1279507A (en) | 2001-01-10 |
| CN1126158C true CN1126158C (en) | 2003-10-29 |
Family
ID=5273347
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 99108529 Expired - Fee Related CN1126158C (en) | 1999-06-23 | 1999-06-23 | Semiconductor wafer device and its making method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN1126158C (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4123998B2 (en) * | 2003-03-24 | 2008-07-23 | 松下電器産業株式会社 | Electronic circuit device and manufacturing method thereof |
| JP4973686B2 (en) * | 2009-04-17 | 2012-07-11 | パナソニック株式会社 | Electronic component mounting apparatus and electronic component mounting method |
-
1999
- 1999-06-23 CN CN 99108529 patent/CN1126158C/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN1279507A (en) | 2001-01-10 |
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