CN112615590A - TSM-PI frequency tripler based on double-balanced frequency mixing - Google Patents
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Abstract
The invention belongs to the wireless communication technology, relates to a frequency multiplier in a radio frequency transceiving system, and particularly provides a TSM-PI frequency tripler based on double-balanced frequency mixing, which is used for solving the problems of low conversion efficiency, narrow bandwidth, poor harmonic suppression degree, large chip occupation area, high power consumption and the like of the conventional self-mixing frequency tripler. The frequency tripler mainly comprises a frequency doubling stage, a frequency mixing stage and a TSM-PI transformer, wherein a Push-Push frequency doubler is used as the frequency doubling stage, a double-balanced mixer is used as the frequency mixing stage, and the harmonic suppression degree of the frequency tripler can be improved; by adopting the TSM-PI transformer structure, the conversion gain of the frequency tripler can be improved, the working frequency bandwidth of the frequency tripler can be expanded, and the performance of the device can be further improved. In conclusion, the TSM-PI frequency tripling based on double-balanced frequency mixing can improve the suppression degree of the device on each subharmonic, enable the device to work at higher frequency and wider bandwidth, and effectively improve the conversion gain of the device, reduce the power consumption of the device and reduce the chip area.
Description
Technical Field
The invention belongs to the wireless communication technology, relates to a frequency multiplier in a radio frequency transceiving system, and particularly provides a TSM-PI (Transformer-based dielectric-dispersive-decoupling peak inductor, Transformer self-mixing frequency with peaking inductor) frequency tripler based on double-balanced mixing.
Background
With the rapid development of the internet of things and wireless communication technology, people put forward a series of requirements on a radio Frequency transceiving system, such as higher Frequency, smaller size, lower power consumption, higher reliability, etc., and as one of the cores in a radio Frequency transceiving module, the performance of a Frequency Multiplier (Frequency Multiplier) directly affects the accuracy of signal transmission and reception, so the Frequency Multiplier faces great demands and challenges. As the frequency multiplication number increases, the Conversion Gain (CG) of the frequency multiplier device decreases, thereby narrowing the output frequency bandwidth of the frequency multiplier and deteriorating the suppression of harmonics.
At present, the two most commonly used techniques for achieving frequency tripling are: an Injection-locked frequency multiplier (ILFM) and a self-mixing frequency tripler; the ILFM has narrower bandwidth and higher circuit complexity compared with a self-mixing frequency multiplier; therefore, the self-mixing frequency tripler is more widely applied. A conventional self-mixing frequency multiplier is shown in fig. 1, in which transistors M1n and M1p form a Push-Push frequency doubler generating the second harmonic, transistors M2n and M2p form a single balanced mixer mixing the fundamental and second harmonic signals to generate the third harmonic, and RL is the load impedance. Due to the influence of parasitic capacitance of the transistor, along with the increase of frequency, the conversion gain of the traditional self-mixing frequency tripling frequency can be obviously reduced, and further the working frequency bandwidth of the device is greatly limited; the drain current contains a direct current term, and the direct current part can deteriorate the direct current operating point of the mixer along with the increase of input power, so that the performance of the whole circuit is reduced; in addition, the traditional self-mixing frequency tripling has low suppression degree on fundamental waves when the frequency is high, and a large amount of fundamental wave signals are generated at an output port, wherein one part of the fundamental waves are from leakage of the fundamental waves from a grid electrode to a drain electrode of a mixing stage, and the other part of the fundamental waves are from lower sideband components generated by mixing.
In order to eliminate the lower sideband component of the traditional self-mixing frequency multiplier and better improve the harmonic suppression degree of the frequency mixer, a frequency tripler based on a quadrature frequency mixer is proposed by researchers, and the frequency tripler based on the quadrature frequency mixer comprises I, Q paths; the circuit structure of the Q-path is shown in fig. 2, and similar to the basic structure of a conventional mixer, the transistors M1n and M1p form a Push-Push frequency doubler to generate a second harmonic, the transistors M2n and M2p form a single balanced mixer to mix fundamental wave and second harmonic signals to generate a third harmonic, and RL is load impedance. Compared with the traditional self-mixing frequency multiplier, the input signal of the self-mixing frequency multiplier is divided into two paths, namely an I path differential input signal, a Q path differential input signal, and the phase difference between the I path differential signal and the Q path differential signal is 90 degrees; similarly, the I path needs a similar circuit structure, and the outputs of the I path and the Q path are combined together to form a required third harmonic signal.
In summary, the conventional self-mixing frequency tripler has the problems of low conversion efficiency, narrow bandwidth, poor harmonic suppression degree, and the like, while the frequency tripler based on the quadrature mixer can overcome the problems of the conventional self-mixing frequency tripler to a certain extent, but the structure also brings the problems of large chip occupation area and high power consumption.
Disclosure of Invention
The invention aims to provide a TSM-PI frequency tripler based on double-balanced frequency mixing, aiming at the problems of low conversion efficiency, narrow bandwidth, poor harmonic suppression degree, large chip occupation area, high power consumption and the like of the existing self-mixing frequency tripler; the invention adopts a TSM-PI frequency tripling structure of double-balanced frequency mixing, effectively improves the inhibition degree of fundamental waves, and simultaneously, the TSM-PI structure can improve the conversion gain of the device and expand the working bandwidth of the device; in addition, compared with a frequency tripler based on an orthogonal mixer, the frequency tripler based on the orthogonal mixer has the advantages that the power consumption and the occupied area of a chip can be effectively reduced through reasonable layout design.
In order to achieve the purpose, the invention adopts the technical scheme that:
a double balanced mixing based TSM-PI frequency tripler, comprising: an input transformer balun L1, a frequency doubling stage, a double-balanced mixing stage, a TSM-PI transformer and an output transformer balun L2; it is characterized in that the preparation method is characterized in that,
the TSM-PI transformer is composed of a primary coil LD, a secondary coil LS, a peaking inductor LP1 and a peaking inductor LP2, wherein the primary coil LD and the secondary coil LS are coupled with each other, and a center tap of the secondary coil LS is grounded;
the frequency doubling stage is composed of a transistor M1n and a transistor M1p, wherein the transistor M1n is connected with the source of the transistor M1p and is grounded, the transistor M1n is connected with the drain of the transistor M1p and is connected with a primary coil LD, and the other end of the primary coil LD is connected with a voltage power supply VDD;
the double balanced mixing stage is composed of a transistor M2n, a transistor M2p, a transistor M3n and a transistor M3p, wherein the transistor M2n is connected with the source of the transistor M2p and is connected with one end of the secondary coil LS, and the transistor M3n is connected with the source of the transistor M3p and is connected with the other end of the secondary coil LS; the drain electrode of the transistor M2p is connected to the drain electrode of the transistor M3n and to the peaking inductor LP1, and the other end of the peaking inductor LP1 is connected to one end of the primary winding of the output transformer balun L2; the drain electrode of the transistor M3p is connected to the drain electrode of the transistor M2n and to the peaking inductor LP2, and the other end of the peaking inductor LP2 is connected to the other end of the primary winding of the output transformer balun L2; the transistor M2p is connected to the gate of the transistor M3p and to the gate of the transistor M1p, the transistor M2n is connected to the gate of the transistor M3n and to the gate of the transistor M1 n;
one end of a primary coil of the input transformer balun L1 is used as a device input end, the other end of the primary coil is grounded, a center tap of a secondary coil is connected with a bias voltage Vg, one end of a secondary coil of the transformer balun L1 is connected with a grid electrode of the transistor M1n, a grid electrode of the transistor M2n and a grid electrode of the transistor M3n, and the other end of the secondary coil is connected with a grid electrode of the transistor M1p, a grid electrode of the transistor M2p and a grid electrode of the transistor M3 p;
one end of a primary coil of the output transformer balun L2 is connected with the peaking inductor LP1, one end of the primary coil is connected with the peaking inductor LP2, and one end of a secondary coil is used as a device output end, and the other end of the secondary coil is grounded.
Further, the frequency tripler further comprises an inductor LG1, an inductor LG2, a capacitor Ct, a capacitor Cp1 and a capacitor Cp 2; wherein the content of the first and second substances,
the inductor LG1, the inductor LG2, the capacitor Ct and the transformer balun L1 form an input impedance matching network, wherein the inductor LG1 is connected between a secondary coil of the input transformer balun and a gate of the transistor M1n in series, the inductor LG2 is connected between the secondary coil of the input transformer balun and a gate of the transistor M1p in series, one end of the capacitor Ct is connected with the gate of the transistor M1n, and the other end of the capacitor Ct is connected with the gate of the transistor M1 p;
the capacitor Cp1, the capacitor Cp2 and the transformer balun L2 form an output impedance matching network, the capacitor Cp1 is connected in parallel to two ends of a primary coil of the output transformer balun, and the capacitor Cp2 is connected in parallel to two ends of a secondary coil of the output transformer balun.
The invention has the beneficial effects that:
the invention provides a TSM-PI frequency tripler based on double-balanced frequency mixing, which mainly comprises a frequency doubling stage, a frequency mixing stage and a TSM-PI transformer; firstly, a Push-Push frequency doubler is used as a frequency doubler, odd harmonic signals can be well inhibited by utilizing the differential characteristic of the Push-Push frequency doubler, and the inhibition degree of fundamental harmonics is improved; secondly, a double-balanced mixer is used as a mixing stage, so that fundamental wave signals from a grid can be effectively inhibited, and the harmonic suppression degree of the frequency tripler is further improved; finally, a TSM-PI (transformer with peaking inductance) transformer structure is adopted, a direct current path of a frequency doubler and a direct current path of a double-balanced frequency mixer can be separated, the problem that the performance of the frequency doubler is influenced by a direct current item in the traditional self-mixing frequency tripling frequency is further avoided, in addition, the transformer and the inductance in the TSM-PI structure can offset the influence of parasitic capacitance generated by a transistor in a circuit, the conversion gain of the frequency tripling frequency is improved, the working frequency bandwidth of the frequency tripling frequency is expanded, and the performance of a device is further improved.
In summary, the novel TSM-PI triple frequency multiplication based on double balanced frequency mixing provided by the invention can not only improve the suppression degree of the device to each harmonic, but also enable the device to work at higher frequency and wider bandwidth, and simultaneously, effectively improve the conversion gain of the device, reduce the power consumption of the device, and reduce the chip area.
Drawings
Fig. 1 is a schematic diagram of a conventional self-mixing frequency multiplier circuit.
Fig. 2 is a schematic circuit diagram of a conventional quadrature mixer-based frequency tripler.
Fig. 3 is a schematic circuit diagram of a TSM-PI frequency tripler based on a double balanced mixer according to the present invention.
FIG. 4 shows harmonic components of the TSM-PI frequency tripled output of the single balanced mixer according to an embodiment of the present invention.
FIG. 5 is a diagram illustrating harmonic components of the TSM-PI frequency tripled output of the double balanced mixer according to an embodiment of the present invention.
Fig. 6 is a layout design of a TSM-PI tripler based on a double balanced mixer in the embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
This embodiment provides a novel TSM-PI tripler based on double-balanced mixing, and this structure has not only improved the degree of suppression to each subharmonic, can work in higher frequency, wideer bandwidth moreover, and simultaneously, conversion gain has compared in traditional from the frequency mixing frequency multiplier and has had higher promotion to the consumption has been reduced and chip area.
The circuit structure of the novel double-balanced mixing based TSM-PI frequency tripler is shown in FIG. 3, and includes: the device comprises an input impedance matching network, a frequency doubling stage, a double balanced mixing stage, a TSM-PI transformer and an output matching network; wherein the content of the first and second substances,
the TSM-PI transformer is composed of a primary coil LD, a secondary coil LS, a peaking inductor LP1 and a peaking inductor LP2, wherein the primary coil LD and the secondary coil LS are coupled with each other, and a center tap of the secondary coil LS is grounded;
the frequency doubling stage is composed of a transistor M1n and a transistor M1p, wherein the transistor M1n is connected with the source of the transistor M1p and is grounded, the transistor M1n is connected with the drain of the transistor M1p and is connected with one end of a primary coil LD, and the other end of the primary coil LD is connected with a voltage power supply VDD;
the double-balanced mixing stage is composed of a transistor M2n, a transistor M2p, a transistor M3n and a transistor M3p, wherein the transistor M2n is connected with the source of a transistor M2p and one end of the secondary coil LS, and the transistor M3n is connected with the source of a transistor M3p and the other end of the secondary coil LS; the drain electrode of the transistor M2p is connected to the drain electrode of the transistor M3n and to the peaking inductor LP1, and the other end of the peaking inductor LP1 is connected to the primary winding of the output transformer balun L2; the drain electrode of the transistor M3p is connected with the drain electrode of the transistor M2n and is connected with the peaking inductor LP2, and the other end of the peaking inductor LP2 is connected with the primary coil of the output transformer balun L2; the transistor M2p is connected to the gate of the transistor M3p and to the gate of the transistor M1p, the transistor M2n is connected to the gate of the transistor M3n and to the gate of the transistor M1 n;
the input impedance matching network is composed of an input transformer balun L1, an inductor LG1, an inductor LG2 and a capacitor Ct, wherein the inductor LG1 is connected between a secondary coil of the input transformer balun and a gate of a transistor M1n in series, the inductor LG2 is connected between the secondary coil of the input transformer balun and a gate of a transistor M1p in series, one end of the capacitor Ct is connected with the gate of the transistor M1n, and the other end of the capacitor Ct is connected with the gate of the transistor M1 p; one end of a primary coil of the input transformer balun L1 is used as an input end of the device, the other end of the primary coil is grounded, a center tap of a secondary coil is connected with a bias voltage Vg, after passing through an input impedance matching network, a secondary coil of the transformer balun L1 is connected with a gate of the transistor M1n, a gate of the transistor M2n and a gate of the transistor M3n at one end, and is connected with a gate of the transistor M1p, a gate of the transistor M2p and a gate of the transistor M3p at the other end;
the output matching network is composed of an output transformer balun L2, a capacitor Cp1 and a capacitor Cp2, wherein the capacitor Cp1 is connected in parallel with two ends of a primary coil of the output transformer balun, and the capacitor Cp2 is connected in parallel with two ends of a secondary coil of the output transformer balun; one end of a primary coil of the output transformer balun L2 is connected with the peaking inductor LP1, one end of the primary coil is connected with the peaking inductor LP2, and one end of a secondary coil is used as a device output end, and the other end of the secondary coil is grounded.
In terms of working principle:
the invention provides a novel TSM-PI frequency tripler based on double-balanced frequency mixing, wherein an input signal is input through a GSG three-port PAD, converted into a differential signal through an input transformer balun L1, and is input into a Push-Push double-frequency and double-balanced frequency mixing structure through an input matching network, a second harmonic generated by Push-Push double-frequency is mixed with a fundamental wave signal in the double-balanced frequency mixing structure through a differential signal converted by a transformer balun formed by LD and LS to obtain a third harmonic signal, and the third harmonic signal is output through the GSG three-port PAD through an output matching network, so that the function of triple frequency is finally realized. More specifically:
(1) Push-Push frequency doubling structure
In the invention, the frequency doubling stage adopts a double-frequency structure of Push-Push and a Push-Push double-frequency structure consisting of MOS tubes M1n and M1p, as shown in FIG. 3; among them, M1n and M1p operate in a nonlinear region to generate second harmonics, and odd harmonic signals can be well suppressed by using the difference characteristics, thereby improving the suppression degree of fundamental harmonics.
(2) TSM-PI structure
The invention adopts a TSM-PI (transformer with peaking inductance) structure, which comprises two parts, wherein one part is a transformer consisting of LD and LS, and the other part is a peaking inductance LP, wherein the transformer consisting of LD and LS is arranged between a double-frequency and double-balanced mixer, and the peaking inductance LP is connected in series with the drain part of the double-balanced mixer; the direct current paths of the double-frequency and double-balanced mixers can be separated by adopting the TSM-PI structure, so that the direct current terms in the traditional self-mixing triple frequency multiplier are prevented from influencing the performance of the frequency multiplier. In addition, a transformer and an inductor in the TSM-PI structure can offset the influence of parasitic capacitance generated by an MOS tube in the circuit, thereby improving the conversion gain of triple frequency and expanding the frequency bandwidth, and further improving the circuit performance.
(3) Double balanced mixer
The mixing stage of the invention adopts a double-balanced mixer, which can effectively inhibit the fundamental wave signal from the grid and improve the harmonic suppression degree of the frequency tripler.
When the TSM-PI triple frequency of the single-balanced mixer is adopted, under the condition that output impedance is not completely matched, each subharmonic component can be obtained when FFT inverse transformation is carried out on the waveform of an output signal of the single-balanced mixer, as shown in figure 4, wherein the fundamental harmonic component is-3.7 dBm, and the third harmonic component is-7.66 dBm; when the TSM-PI triple frequency of the double-balanced mixer is adopted, the size rules of all the devices are kept consistent with the TSM-PI triple frequency of the single-balanced mixer, and similarly, when the waveform of an output signal is subjected to FFT inverse transformation, harmonic components of each order can be obtained, as shown in figure 5, wherein the fundamental harmonic component is-14.7 dBm, and the third harmonic component is-8.2 dBm; therefore, by adopting the double-balanced mixer, the fundamental wave signal at the output end can be improved by about 10dB under the condition that the tube parameter is kept unchanged, namely, the rejection of the fundamental wave can be effectively improved by the double-balanced mixer.
Meanwhile, the double-balanced mixer is adopted, so that compared with the traditional IQ quadrature mixing frequency tripler, the frequency tripler has the advantages of simpler structure, lower power consumption and smaller chip occupation area; furthermore, by adopting the layout design shown in fig. 6, the occupied area of the chip can be further reduced, and good layout symmetry can be ensured.
While the invention has been described with reference to specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise; all of the disclosed features, or all of the method or process steps, may be combined in any combination, except mutually exclusive features and/or steps.
Claims (2)
1. A double balanced mixing based TSM-PI frequency tripler, comprising: an input transformer balun L1, a frequency doubling stage, a double-balanced mixing stage, a TSM-PI transformer and an output transformer balun L2; it is characterized in that the preparation method is characterized in that,
the TSM-PI transformer is composed of a primary coil LD, a secondary coil LS, a peaking inductor LP1 and a peaking inductor LP2, wherein the primary coil LD and the secondary coil LS are coupled with each other, and a center tap of the secondary coil LS is grounded;
the frequency doubling stage is composed of a transistor M1n and a transistor M1p, wherein the transistor M1n is connected with the source of the transistor M1p and is grounded, the transistor M1n is connected with the drain of the transistor M1p and is connected with a primary coil LD, and the other end of the primary coil LD is connected with a voltage power supply VDD;
the double balanced mixing stage is composed of a transistor M2n, a transistor M2p, a transistor M3n and a transistor M3p, wherein the transistor M2n is connected with the source of the transistor M2p and is connected with one end of the secondary coil LS, and the transistor M3n is connected with the source of the transistor M3p and is connected with the other end of the secondary coil LS; the drain electrode of the transistor M2p is connected to the drain electrode of the transistor M3n and to the peaking inductor LP1, and the other end of the peaking inductor LP1 is connected to one end of the primary winding of the output transformer balun L2; the drain electrode of the transistor M3p is connected to the drain electrode of the transistor M2n and to the peaking inductor LP2, and the other end of the peaking inductor LP2 is connected to the other end of the primary winding of the output transformer balun L2; the transistor M2p is connected to the gate of the transistor M3p and to the gate of the transistor M1p, the transistor M2n is connected to the gate of the transistor M3n and to the gate of the transistor M1 n;
one end of a primary coil of the input transformer balun L1 is used as an input end of the device, the other end of the primary coil is grounded, a center tap of a secondary coil is connected with a bias voltage Vg, one end of a secondary coil of the transformer balun L1 is connected with a gate of the transistor M1n, a gate of the transistor M2n and a gate of the transistor M3n, and the other end of the secondary coil is connected with a gate of the transistor M1p, a gate of the transistor M2p and a gate of the transistor M3 p;
one end of a secondary coil of the output transformer balun L2 is used as an output end of the device, and the other end of the secondary coil is grounded.
2. The double balanced mixing based TSM-PI frequency tripler of claim 1 further comprising an inductor LG1, an inductor LG2, a capacitor Ct, a capacitor Cp1 and a capacitor Cp 2; wherein the content of the first and second substances,
the inductor LG1, the inductor LG2, the capacitor Ct and the transformer balun L1 form an input impedance matching network, wherein the inductor LG1 is connected between a secondary coil of the input transformer balun and a gate of the transistor M1n in series, the inductor LG2 is connected between the secondary coil of the input transformer balun and a gate of the transistor M1p in series, one end of the capacitor Ct is connected with the gate of the transistor M1n, and the other end of the capacitor Ct is connected with the gate of the transistor M1 p;
the capacitor Cp1, the capacitor Cp2 and the transformer balun L2 form an output impedance matching network, the capacitor Cp1 is connected in parallel to two ends of a primary coil of the output transformer balun, and the capacitor Cp2 is connected in parallel to two ends of a secondary coil of the output transformer balun.
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Cited By (7)
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| CN116488587A (en) * | 2023-06-21 | 2023-07-25 | 成都通量科技有限公司 | Double-frequency multiplier based on half-wave rectification superposition |
| CN116488587B (en) * | 2023-06-21 | 2023-08-29 | 成都通量科技有限公司 | Double-frequency multiplier based on half-wave rectification superposition |
| CN117559916A (en) * | 2023-10-30 | 2024-02-13 | 隔空微电子(深圳)有限公司 | Frequency multiplier circuit, frequency multiplier, communication system and frequency multiplier circuit arrangement structure |
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Application publication date: 20210406 |