CN107896091A - A kind of low-power consumption broadband varactor doubler circuit - Google Patents
A kind of low-power consumption broadband varactor doubler circuit Download PDFInfo
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- CN107896091A CN107896091A CN201711404326.0A CN201711404326A CN107896091A CN 107896091 A CN107896091 A CN 107896091A CN 201711404326 A CN201711404326 A CN 201711404326A CN 107896091 A CN107896091 A CN 107896091A
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- hbt
- pipes
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- filter capacitor
- frequency
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
- H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
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Abstract
The present invention relates to a kind of low-power consumption broadband varactor doubler circuit.Its application in RF communication system than lower limit of existing frequency source frequency, the method that frequency multiplier is cascaded by voltage controlled oscillator realize high-frequency frequency source.The present invention includes a push push structure, input balun, two matching networks；Push push structures are made up of two HBT triodes, and input balun is realized by way of double layer of metal levels are coupled, and two matching networks include input matching network and output matching network.The present invention realizes the performance of wider frequency operating range and low-power consumption.
Description
Technical field
The invention belongs to microelectronics technology, is related to a kind of low-power consumption broadband varactor doubler circuit.
Background technology
Recently as the fast development of Millimeter-wave Wireless Communication System, millimeter wave frequency source is in imaging, medical treatment, military affairs etc.
The application in field is increasingly popularized, application band also more and more higher, also more and more urgent to the needs of mm-wave signal source.But
The high-frequency frequency source directly obtained can not reach the requirement of communication system in frequency stability and phase noise etc., thus
Need to design broad-band SHG device to realize high-frequency frequency source to meet the requirement of communication system.As most base in high-frequency frequency source
The frequency upgrading of voltage controlled oscillator to higher frequency range is played act enough by this composition module, frequency multiplier to the performance of frequency source
The effect of weight.Frequency multiplier should have wider frequency coverage on the premise of power consumption is ensured, to meet the need of different application
Will.
The conventional structure of frequency multiplier has single tube frequency multiplier, push-push frequency multipliers and injection locked frequency multiplier etc..Single tube times
Frequency device is simple in construction because using single transistor, is easy to implement.But its inhibition level to fundamental wave is poor, limit it
Application in RF communication system.Traditional injection locked frequency multiplier is non-linear using transistor, and harmonic oscillator can produce
The each harmonic signal of incoming frequency, then these harmonic signals injection oscillator, when oscillator resonant frequency input believe
At n times of number frequency, nth harmonic obtains maximum loop gain, so as to realize the function of n frequencys multiplication.This kind of frequency multiplier working band
Scope is narrower, is of limited application and complicated, realizes difficult.Therefore how frequency multiplier is improved under low-power consumption requirement
Bandwidth of operation turns into the key issue of frequency multiplier circuit design.
The A of Chinese patent CN 102270964, it is proposed that a kind of that there is phase difference by responding generation to input signal
N number of signal phase-splitter road then realize N frequencys multiplication by way of mixing.Phase-splitter and frequency mixer mainly are make use of, is lacked
Point is complicated, and application band is not high.
A kind of A of Chinese patent CN 104079242, it is proposed that 3 frequencys multiplication with Lange couplers and two transistor arrangements
Device, it mainly make use of Lange couplers.Shortcoming is that two Lange coupler design complexity are time-consuming, passive device in circuit structure
Too much, chip area is larger.
The content of the invention
It is an object of the present invention to provide a kind of low-power consumption is wide band, suitable for InP HBT, (HBT refers to heterojunction bipolar
Transistor) technique varactor doubler circuit.
The present invention includes a push-push structure, an input balun, two matching networks；Push-push structures by
Two HBT pipes are formed, and input balun is realized by way of double layer of metal levels are coupled, and two matching networks include
Input matching network and output matching network.
First HBT manages (T1) and the 2nd HBT pipes (T2) form push-push structures, wherein the current collection of the first HBT pipes (T1)
The colelctor electrode that pole manages (T2) with the 2nd HBT is connected, as output end (Vout).The emitter-base bandgap grading of first HBT pipes (T1) and the 2nd HBT pipes
(T2) emitter-base bandgap grading is connected, and is then grounded.In-phase output end (B2P) phase of base stage and balun (TR1) secondary of first HBT pipes (T1)
Even, the base stage of the 2nd HBT pipes (T2) reversed-phase output (B2N) secondary with balun is connected.
Input matching capacitance (C1) one end is connected with input signal, the in-phase input end (B1P) of the other end and balun primary
It is connected.Primary reverse input end (B1N) ground connection of balun.Output matching electric capacity (C2) one end and the output of push-push structures
(Vout) is held to be connected, output end of the other end as whole circuit.First matching inductance (L1) one terminates the first HBT pipes (T1)
Colelctor electrode, the other end are connected with the second filter capacitor (C4) one end and are followed by bias voltage Vcc.Second matching inductance (L2) one terminates
The colelctor electrode of 2nd HBT pipes (T2), the other end are connected with the 4th filter capacitor (C6) one end and are followed by bias voltage Vcc.First is inclined
The base stage that resistance (R1) one terminates the first HBT pipes (T1) is put, the other end is connected with the first filter capacitor (C3) one end and is followed by biasing
Voltage Vb.Second biasing resistor (R2) one terminates the base stage of the 2nd HBT pipes (T2), the other end and the 3rd filter capacitor (C5) one end
Connection is followed by bias voltage Vb.
First filter capacitor (C3) other end, the second filter capacitor (C4) other end, the 3rd filter capacitor (C5) other end,
4th filter capacitor (C6) other end is grounded.
The beneficial effects of the invention are as follows：
Push-push frequency multipliers of the present invention can overcome the deviation of process bands because of the symmetry of its circuit, and right
The inhibition level of fundamental wave is good, and working band wider range (130~200GHz), required power consumption is relatively low, only 10.8mW.
The present invention is compared to prior art, and passive device is few, simple in construction, and application band is high, and chip area is smaller.
Brief description of the drawings
Fig. 1 is the integrated circuit figure of the present invention.
Embodiment
The circuit structure of the present invention is described in further detail below in conjunction with the accompanying drawings.In order to illustrate the effect of the present invention,
Flow checking is designed using 0.5um InP HBT techniques.
As shown in figure 1, a kind of low-power consumption broadband varactor doubler circuit includes a push-push structure, an input
Balun, two matching networks；
First HBT manages (T1) and the 2nd HBT pipes (T2) form push-push structures, wherein the current collection of the first HBT pipes (T1)
The colelctor electrode that pole manages (T2) with the 2nd HBT is connected, as output end (Vout).The emitter-base bandgap grading of first HBT pipes (T1) and the 2nd HBT pipes
(T2) emitter-base bandgap grading is connected, and is then grounded.The base stage of first HBT pipes (T1) in-phase output end (B2P) secondary with balun is connected, the
The base stage of two HBT pipes (T2) reversed-phase output (B2N) secondary with balun is connected.
Input matching capacitance (C1) one end is connected with input signal, the in-phase input end (B1P) of the other end and balun primary
It is connected.Primary reverse input end (B1N) ground connection of balun.Output matching electric capacity (C2) one end and the output of push-push structures
(Vout) is held to be connected, output end of the other end as whole circuit.First matching inductance (L1) one terminates the first HBT pipes (T1)
Colelctor electrode, the other end are connected with the second filter capacitor (C4) one end and are followed by bias voltage Vcc.Second matching inductance (L2) one terminates
The colelctor electrode of 2nd HBT pipes (T2), the other end are connected with the 4th filter capacitor (C6) one end and are followed by bias voltage Vcc.First is inclined
The base stage that resistance (R1) one terminates the first HBT pipes (T1) is put, the other end is connected with the first filter capacitor (C3) one end and is followed by biasing
Voltage Vb.Second biasing resistor (R2) one terminates the base stage of the 2nd HBT pipes (T2), the other end and the 3rd filter capacitor (C5) one end
Connection is followed by bias voltage Vb.
First filter capacitor (C3) other end, the second filter capacitor (C4) other end, the 3rd filter capacitor (C5) other end,
4th filter capacitor (C6) other end is grounded.
Input signal can be expressed as Vin=Vicos (ω t), and wherein Vi is amplitude, and ω is angular frequency.According to non-linear
The model of device, output signal can be expressed as with Taylor series：
Vin=Vicos (ω t) is substituted into formula (1), can be obtained by four before abbreviation：
Electric current includes DC terms and higher hamonic wave item in formula (2), by the filtering that suitable frequency range is added after frequency multiplier
With circuit, make the harmonic wave required for integrated circuit output, while suppress the output of other harmonic waves.
The present invention is a varactor doubler for being operated in 140GHz, and using active balancing formula topological structure, input passes through
Single-ended signal is changed into differential signal by one passive balun (TR1).So-called differential signal refers to that amplitude is identical, opposite in phase
A pair of signals.The colelctor electrode of transistor connects together for being superimposed all even-order harmonics, while fundamental wave and other odds is humorous
Ripple eliminates.It is so relatively good to the inhibition of fundamental wave.Input matching is made up of passive balun, so input bandwidth can be with
Accomplish very wide, i.e., working band can be very wide.Output matching be matching in the frequency range of second harmonic, therefore other four times, six times it is humorous
The even-order harmonics such as ripple obtain very big suppression.Whole circuit only has 2 transistors and some passive devices to form, so power consumption
Only as caused by the two transistors, only there was only 10.8mW by the way that power consumption is calculated.
Claims (1)
1. a kind of low-power consumption broadband varactor doubler circuit, it is characterised in that including a push-push structure, an input bar
Human relations, two matching networks；
First HBT manage (T1) and the 2nd HBT pipe (T2) form push-push structures, wherein the first HBT pipe (T1) colelctor electrode and
The colelctor electrode connection of 2nd HBT pipes (T2), as output end (Vout)；The emitter-base bandgap grading of first HBT pipes (T1) and the 2nd HBT pipes (T2)
Emitter-base bandgap grading be connected, be then grounded；The base stage of first HBT pipes (T1) in-phase output end (B2P) secondary with balun (TR1) is connected,
The base stage of 2nd HBT pipes (T2) reversed-phase output (B2N) secondary with balun is connected；
Input matching capacitance (C1) one end is connected with input signal, and the other end in-phase input end (B1P) primary with balun is connected；
Primary reverse input end (B1N) ground connection of balun；Output matching electric capacity (C2) one end and the output end of push-push structures
(Vout) it is connected, output end of the other end as whole circuit；First matching inductance (L1) one terminates the collection of the first HBT pipes (T1)
Electrode, the other end are connected with the second filter capacitor (C4) one end and are followed by bias voltage Vcc；The termination of second matching inductance (L2) one the
The colelctor electrode of two HBT pipes (T2), the other end are connected with the 4th filter capacitor (C6) one end and are followed by bias voltage Vcc；First biasing
Resistance (R1) one terminates the base stage of the first HBT pipes (T1), and the other end is connected with the first filter capacitor (C3) one end and is followed by biased electrical
Press Vb；Second biasing resistor (R2) one terminates the base stage of the 2nd HBT pipes (T2), and the other end and the 3rd filter capacitor (C5) one end connect
Connect and be followed by bias voltage Vb；
First filter capacitor (C3) other end, the second filter capacitor (C4) other end, the 3rd filter capacitor (C5) other end, the 4th
Filter capacitor (C6) other end is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711404326.0A CN107896091A (en) | 2017-12-22 | 2017-12-22 | A kind of low-power consumption broadband varactor doubler circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711404326.0A CN107896091A (en) | 2017-12-22 | 2017-12-22 | A kind of low-power consumption broadband varactor doubler circuit |
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| CN107896091A true CN107896091A (en) | 2018-04-10 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112671346A (en) * | 2020-12-18 | 2021-04-16 | 电子科技大学 | Broadband frequency multiplier with transconductance enhancement technology and double LC matching networks |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080015343A (en) * | 2006-08-14 | 2008-02-19 | 엘지이노텍 주식회사 | Double balance mixer |
| CN106656069A (en) * | 2016-09-13 | 2017-05-10 | 锐迪科微电子（上海）有限公司 | Multi-frequency output matching network applied to GSM (Global System for Mobile Communications) radio-frequency power amplifier |
-
2017
- 2017-12-22 CN CN201711404326.0A patent/CN107896091A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080015343A (en) * | 2006-08-14 | 2008-02-19 | 엘지이노텍 주식회사 | Double balance mixer |
| CN106656069A (en) * | 2016-09-13 | 2017-05-10 | 锐迪科微电子（上海）有限公司 | Multi-frequency output matching network applied to GSM (Global System for Mobile Communications) radio-frequency power amplifier |
Non-Patent Citations (2)
| Title |
|---|
| CHRISTOPHER COEN: "《A Highly-Efficient 138–170 GHz SiGe HBT Frequency Doubler for Power-Constrained Applications》", 2016 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM (RFIC), pages 23 - 26 * |
| YAOMING SUN: "《An Integrated Harmonic Transmitter Front-End for 122 GHz FMCW/CW Radar Sensor》", 2011 6TH EUROPEAN MICROWAVE INTEGRATED CIRCUIT CONFERENCE, pages 97 - 100 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112671346A (en) * | 2020-12-18 | 2021-04-16 | 电子科技大学 | Broadband frequency multiplier with transconductance enhancement technology and double LC matching networks |
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