CN112596683B

CN112596683B - Advance and retreat low-power-consumption flow acceleration method and device, computer equipment and storage medium

Info

Publication number: CN112596683B
Application number: CN202011580027.4A
Authority: CN
Inventors: 徐攀; 冯元元; 余桉
Original assignee: Shenzhen Union Memory Information System Co Ltd
Current assignee: Shenzhen Union Memory Information System Co Ltd
Priority date: 2020-12-28
Filing date: 2020-12-28
Publication date: 2023-02-10
Anticipated expiration: 2040-12-28
Also published as: CN112596683A

Abstract

The invention relates to a method, a device, computer equipment and a storage medium for accelerating a low-power-consumption process, wherein the method comprises the steps of acquiring a low-power-consumption processing request; judging whether the low-power consumption processing request is a command for quitting low power consumption or not; if the low-power consumption processing request is a command for quitting low power consumption, judging whether the data of the RAID stripe on the write-in point is complete; if the data of the RAID stripe on the write-in point is incomplete, generating parity check bit data of the RAID stripe; user data is written. When the command for quitting the low power consumption is obtained, the data integrity of the RAID strip at the write point is judged, the effective data is read from the incomplete data, the parity check bit data of the RAID strip is generated at the rear end of the SSD, and then the user data is written, so that the speed of the SSD entering the low power consumption process and the speed of the SSD quitting the low power consumption process are accelerated, the corresponding time is shortened, and the overall power consumption of the solid state disk is effectively reduced.

Description

Advance and retreat low-power-consumption flow acceleration method and device, computer equipment and storage medium

Technical Field

The invention relates to a solid state disk, in particular to a low-power-consumption process accelerating method, a low-power-consumption process accelerating device, a computer device and a storage medium.

Background

At present, a mainstream SSD (Solid State Disk) supports data protection capability improvement by RAID (Redundant array of Independent Disks), data protection is performed by using a mode of 31 user data +1 parity bit, data in the first 31 blocks is valid data, and data in the last 1 block is parity bit data generated by xor of the user data, where any data in the first 31 groups of data is lost and can be recovered by the parity bit data, thereby improving data reliability. When user data is written in, parity bit data is updated in real time, after 31 user data are all written in Nand Flash, the last updated parity bit data is also written in Nand Flash, the RAID stripe data is complete at the moment, otherwise, the RAID stripe data is called as incomplete, and for RAID stripes with incomplete data, the parity bit data is not written in the Nand Flash.

The current advance and retreat low-power consumption process is used for processing incomplete RAID stripes: after the SSD receives the command of entering the low power consumption, the main control can firstly complete the storage of the management information, then check whether the effective data of all RAID stripes are complete, if the effective data of the RAID stripes are incomplete, fill invalid data into the unwritten part of the RAID stripes, then send a write command to the back end, and after the back end completes all the commands, the CPU enters the low power consumption mode. Thus, when the SSD receives the command of quitting low power consumption or other IO commands, the master control completes the action of quitting low power consumption according to the normal flow of quitting low power consumption. However, when the low power consumption is performed, data supplement is performed on the incomplete RAID stripe, so that the time for entering the low power consumption is prolonged due to extra addition of invalid data, and the overall power consumption of the SSD is relatively high.

Therefore, it is necessary to design a new method to accelerate the speed of entering and exiting the low power consumption process of the SSD, shorten the corresponding time, and effectively reduce the overall power consumption of the solid state disk.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provides a method, a device, a computer device and a storage medium for accelerating a low-power-consumption process.

In order to achieve the purpose, the invention adopts the following technical scheme: the advance and retreat low-power consumption flow accelerating method comprises the following steps:

acquiring a low-power consumption processing request;

judging whether the low-power-consumption processing request is a command for quitting low power consumption or not;

if the low-power consumption processing request is a command for quitting low power consumption, judging whether the data of the RAID stripe on the write-in point is complete;

if the data of the RAID strip on the write-in point is incomplete, generating parity check bit data of the RAID strip;

user data is written.

The further technical scheme is as follows: after the step of judging whether the low-power processing request is a command for quitting low power consumption, the method further comprises the following steps:

and if the low-power consumption processing request is not a command for exiting low power consumption, entering a low-power consumption mode.

The further technical scheme is as follows: the generating parity data for the RAID stripe includes:

reading valid data;

the valid data is exclusive-ORed to generate parity bit data for the RAID stripe.

The further technical scheme is as follows: after judging whether the data of the RAID stripe on the write in point is complete, the method further includes:

and if the data of the RAID strip on the write-in point is complete, executing the write-in user data.

The further technical scheme is as follows: the reading of the valid data includes:

and reading the effective data from the NandFlash.

The further technical scheme is as follows: the exclusive-or operation of the valid data to generate parity bit data of the RAID stripe includes:

and carrying out exclusive OR operation on the effective data by the solid state disk to generate parity bit data of the RAID stripe.

The invention also provides a forward and backward low-power consumption process accelerating device, which comprises:

a request acquisition unit configured to acquire a low-power-consumption processing request;

a command judgment unit for judging whether the low power consumption processing request is a command for exiting low power consumption;

the integrity judgment unit is used for judging whether the data of the RAID stripe on the write-in point is complete or not if the low-power consumption processing request is a command for quitting low power consumption;

the parity generating unit is used for generating parity data of the RAID stripe if the data of the RAID stripe on the write-in point is incomplete;

and the data writing unit is used for writing user data.

The further technical scheme is as follows: further comprising:

and the mode entering unit is used for entering a low power consumption mode if the low power consumption processing request is not a command for exiting low power consumption.

The invention also provides a computer device, which comprises a memory and a processor, wherein the memory is stored with a computer program, and the processor executes the computer program to realize the method.

The invention also provides a storage medium storing a computer program which, when executed by a processor, is operable to carry out the method as described above.

Compared with the prior art, the invention has the beneficial effects that: the method directly enters the low power consumption stage when the command for entering the low power consumption is obtained, judges the data integrity of the RAID strip at the write point when the command for exiting the low power consumption is obtained, reads effective data from incomplete data, writes user data after parity check bit data of the RAID strip is generated at the rear end of the SSD, and directly adopts a processing mode of writing the user data to the complete data, so that the speed of entering the low power consumption flow and exiting the low power consumption flow of the SSD is accelerated, the corresponding time is shortened, and the overall power consumption of the solid state disk is effectively reduced.

The invention is further described below with reference to the accompanying drawings and specific embodiments.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic flow chart of a low power consumption flow accelerating method according to an embodiment of the present invention;

FIG. 2 is a sub-flow diagram of a low power consumption flow accelerating method according to an embodiment of the present invention;

FIG. 3 is a schematic block diagram of a low power flow acceleration apparatus according to an embodiment of the present invention;

FIG. 4 is a schematic block diagram of a check bit generation unit of the low power flow acceleration apparatus according to an embodiment of the present invention;

FIG. 5 is a schematic block diagram of a computer device provided by an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.

Referring to fig. 1, fig. 1 is a schematic flow chart of a low power consumption flow accelerating method according to an embodiment of the invention. The advancing and retreating low-power-consumption flow accelerating method is applied to the solid state disk. And the solid state disk performs data interaction with the server, acquires a corresponding request from the server and performs low-power-consumption entering and exiting operations.

Fig. 1 is a schematic flow chart of a low power consumption flow accelerating method according to an embodiment of the present invention. As shown in fig. 1, the method includes the following steps S110 to S160.

And S110, acquiring a low-power consumption processing request.

In this embodiment, the low power consumption processing request is a command issued by the server to the solid state disk to enter the low power consumption flow or exit the low power consumption flow.

S120, judging whether the low-power-consumption processing request is a command for quitting low power consumption or not;

s130, if the low-power consumption processing request is not a command for exiting low power consumption, entering a low-power consumption mode.

The low-power consumption processing request comprises two requests of entering a low-power consumption process or exiting the low-power consumption process, and when the low-power consumption processing request is judged not to be a command of exiting the low power consumption, the low-power consumption processing request is a command of entering the low power consumption; when the solid state disk enters a low power consumption stage, the integrity of RAID strip data is not judged any more, and data supplement and a rear-end write command are not carried out on an incomplete RAID strip any more, so that the speed of the solid state disk entering the low power consumption is effectively improved, meanwhile, the writing-in of useless data is reduced, and the write amplification is reduced.

S140, if the low-power consumption processing request is a command for quitting low power consumption, judging whether the data of the RAID stripe on the write-in point is complete.

In this embodiment, the main step of determining whether the data of the RAID stripe at the write point is complete is determining whether the user data of the RAID stripe at the write point is complete. And when 31 user data are completely written into the Nand Flash, writing the last updated parity bit data into the Nand Flash, wherein the RAID stripe data are complete, otherwise, the RAID stripe data are called as incomplete, for the RAID stripe with the incomplete data, the parity bit data are not written into the Nand Flash, and only the user data are written into the Nand Flash.

S150, if the data of the RAID stripe on the write-in point is incomplete, generating parity bit data of the RAID stripe.

In an embodiment, referring to fig. 2, the step S150 may include steps S151 to S152.

And S151, reading the valid data.

In this embodiment, the valid data is read from NandFlash.

S152, carrying out exclusive OR operation on the effective data to generate parity bit data of the RAID stripe.

In this embodiment, the valid data is xored by the solid state disk to generate parity data for the RAID stripe.

Specifically, the SSD sends a command to read the valid data of the RAID stripe to the SSD back end; reading the effective data stored in the NandFlash by the SSD rear end; the SSD internally sends a command for carrying out XOR operation on the read effective data to the SSD rear end, the SSD rear end is enabled to complete the XOR operation on the RAID stripe effective data, and after receiving the command, the SSD rear end carries out XOR operation to obtain parity check bit data of the RAID stripe. The parity bit data of the incomplete stripe is generated by not performing exclusive-or operation by the CPU, but by sending a command to the SSD back end, the SSD back end performs exclusive-or operation to obtain the parity bit data.

And S160, writing user data.

In the stage of exiting the low power consumption, only when user data needs to be written in, the integrity of effective data of the RAID strip on the write-in point is judged, if the effective data is incomplete, the effective data is read, and the effective data is subjected to XOR operation to generate parity check bit data of the strip, and because the reading performance and the XOR operation speed cannot influence the time for normally exiting the low power consumption, the scheme can accelerate the completion of the low power consumption process of advancing and retreating the solid state disk, thereby reducing the overall power consumption of the solid state disk.

If the data of the RAID stripe at the write point is complete, the step S160 is executed.

Specifically, after receiving the command to enter the low power consumption mode, the SSD does not perform the determination of the integrity of the RAID stripe data any longer after completing the storage of the management information, but directly enters the low power consumption mode. After the SSD receives the command of quitting low power consumption, in the process of carrying out initialization operation, the completeness of the RAID stripe data of the write-in point is judged, if the RAID stripe data of the write-in point is complete, user data are directly written in, if the RAID stripe data of the write-in point is incomplete, a command of reading effective data of the RAID stripe is sent to the rear end of the SSD, the rear end of the SSD reads the effective data from NandFlash, and then a command of carrying out XOR operation on the effective data is sent to the rear end of the SSD, so that the rear end of the SSD completes generation of parity check bit data of the RAID stripe. In the low power consumption stage, supplementary data of an incomplete RAID strip and writing supplementary data into NandFlash are not carried out any more, so that the writing amplification is reduced, and the process of entering low power consumption is accelerated. When the low power consumption is exited, only the read operation and the exclusive-or operation completed by the back-end hardware generate the parity bit data, and the read operation and the exclusive-or operation performed by the back-end hardware do not affect the normal exiting low power consumption process. Therefore, the low-power-consumption speed of the SSD can be accelerated, and the overall power consumption of the SSD is effectively reduced.

According to the method for accelerating the forward and backward low-power-consumption flow, the low-power-consumption stage is directly entered when the command for entering the low power consumption is obtained, when the command for exiting the low power consumption is obtained, the data integrity of the RAID strip at the writing point is judged firstly, the effective data is read from the incomplete data, the user data is written after the parity check bit data of the RAID strip is generated at the rear end of the SSD, and the processing mode of writing the user data is directly adopted for the complete data, so that the speed of entering the low-power-consumption flow and exiting the low-power-consumption flow of the SSD is accelerated, the corresponding time is shortened, and the overall power consumption of the solid state disk is effectively reduced.

Fig. 3 is a schematic block diagram of an apparatus 300 for accelerating a low power flow according to an embodiment of the present invention. As shown in fig. 3, the present invention further provides a forward/backward low power consumption flow accelerating device 300 corresponding to the above forward/backward low power consumption flow accelerating method. The advanced and retreated low-power flow acceleration device 300 includes a unit for executing the advanced and retreated low-power flow acceleration method, and the device can be configured in an apparatus with a solid-state hard disk. Specifically, referring to fig. 3, the advanced/retreated low-power flow accelerating apparatus 300 includes a request acquiring unit 301, a command determining unit 302, an integrity determining unit 303, a check bit generating unit 304, and a data writing unit 305.

A request acquisition unit 301 configured to acquire a low-power processing request; a command determination unit 302, configured to determine whether the low power processing request is a command to exit low power consumption; an integrity judgment unit 303, configured to judge whether data of a RAID stripe on a write-in point is complete if the low-power processing request is a command to exit low power consumption; if the data of the RAID strip on the write-in point is complete, executing the write-in user data; a parity generation unit 304, configured to generate parity data of the RAID stripe if data of the RAID stripe on the write point is incomplete; a data writing unit 305 for writing user data.

In an embodiment, referring to fig. 3, the forward/backward low power flow accelerating apparatus 300 further includes a mode entering unit 306.

A mode entering unit 306, configured to enter a low power consumption mode if the low power consumption processing request is not a command to exit low power consumption.

In one embodiment, as shown in fig. 4, the parity bit generating unit 304 includes a reading subunit 3041 and an operation subunit 3042.

A read subunit 3041 for reading valid data; an operation subunit 3042, configured to perform an exclusive or operation on the valid data to generate parity data of the RAID stripe.

In an embodiment, the reading subunit 3041 is configured to read the valid data from NandFlash.

In an embodiment, the operation subunit 3042 is configured to perform an exclusive or operation on the valid data by the solid state disk to generate parity data of the RAID stripe.

It should be noted that, as can be clearly understood by those skilled in the art, the detailed implementation process of the forward/backward low-power flow accelerating device 300 and each unit may refer to the corresponding description in the foregoing method embodiment, and for convenience and brevity of description, no further description is provided herein.

The aforementioned advanced and retreated low-power flow accelerating means 300 can be implemented in the form of a computer program that can be run on a computer device as shown in fig. 5.

Referring to fig. 5, fig. 5 is a schematic block diagram of a computer device according to an embodiment of the present application. The computer device 500 may be a server, wherein the server may be an independent server or a server cluster composed of a plurality of servers.

Referring to fig. 5, the computer device 500 includes a processor 502, memory, and a network interface 505 connected by a system bus 501, where the memory may include a non-volatile storage medium 503 and an internal memory 504.

The non-volatile storage medium 503 may store an operating system 5031 and computer programs 5032. The computer programs 5032 include program instructions that, when executed, cause the processor 502 to perform a method for accelerating a low power flow.

The processor 502 is used to provide computing and control capabilities to support the operation of the overall computer device 500.

The internal memory 504 provides an environment for the operation of the computer program 5032 in the non-volatile storage medium 503, and when the computer program 5032 is executed by the processor 502, the processor 502 can execute a low power flow acceleration method.

The network interface 505 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 5 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer device 500 to which the present application may be applied, and that a particular computer device 500 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

Wherein the processor 502 is configured to run the computer program 5032 stored in the memory to implement the following steps:

acquiring a low-power consumption processing request; judging whether the low-power consumption processing request is a command for quitting low power consumption or not; if the low-power consumption processing request is a command for quitting low power consumption, judging whether the data of the RAID stripe on the write-in point is complete; if the data of the RAID stripe on the write-in point is incomplete, generating parity check bit data of the RAID stripe; user data is written.

In an embodiment, after implementing the step of determining whether the low power processing request is a command to exit low power, the processor 502 further implements the following steps:

In an embodiment, when the processor 502 implements the step of generating parity data of the RAID stripe, the following steps are specifically implemented:

reading valid data; the valid data is exclusive-ORed to generate parity data for the RAID stripe.

In an embodiment, after implementing the step of determining whether the data of the RAID stripe at the write point is complete, the processor 502 further implements the following steps:

In an embodiment, when the processor 502 implements the step of reading the valid data, the following steps are specifically implemented:

and reading the effective data from the NandFlash.

In an embodiment, when the processor 502 implements the step of performing the xor operation on the valid data to generate the parity data of the RAID stripe, the following steps are specifically implemented:

It should be understood that in the embodiment of the present Application, the Processor 502 may be a Central Processing Unit (CPU), and the Processor 502 may also be other general-purpose processors, digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.

It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program includes program instructions, and the computer program may be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above.

Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program, when executed by a processor, causes the processor to perform the steps of:

acquiring a low-power consumption processing request; judging whether the low-power consumption processing request is a command for quitting low power consumption or not; if the low-power-consumption processing request is a command for quitting low power consumption, judging whether the data of the RAID stripe on the write-in point is complete; if the data of the RAID stripe on the write-in point is incomplete, generating parity check bit data of the RAID stripe; user data is written.

In one embodiment, after the step of executing the computer program to implement the command of determining whether the low power consumption processing request is to exit low power consumption, the processor further implements the steps of:

In an embodiment, when the processor executes the computer program to implement the step of generating parity data of the RAID stripe, the following steps are specifically implemented:

In an embodiment, after the step of determining whether the data of the RAID stripe at the write point is complete is implemented by the processor executing the computer program, the following steps are further implemented:

In an embodiment, when the processor executes the computer program to implement the step of reading the valid data, the following steps are specifically implemented:

and reading the effective data from the NandFlash.

In an embodiment, when the processor executes the computer program to implement the step of performing an exclusive or operation on the valid data to generate parity data of the RAID stripe, the following steps are specifically implemented:

The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.

Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the technical solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.

In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.

The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.

While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for accelerating a low-power-consumption process, comprising:

acquiring a low-power consumption processing request;

judging whether the low-power consumption processing request is a command for quitting low power consumption or not;

if the low-power-consumption processing request is a command for quitting low power consumption, judging whether the data of the RAID stripe on the write-in point is complete;

if the data of the RAID stripe on the write-in point is incomplete, generating parity check bit data of the RAID stripe;

writing user data;

the generating parity data for the RAID stripe includes:

reading valid data;

performing exclusive-or operation on the valid data to generate parity bit data of the RAID stripe;

the exclusive-or operation of the valid data to generate parity bit data of the RAID stripe includes:

carrying out XOR operation on the effective data by the solid state disk to generate parity bit data of the RAID stripe;

the SSD internally sends a command for reading the effective data of the RAID stripe to the rear end of the SSD; the SSD back end reads the effective data stored in the NandFlash; the SSD internally sends a command for carrying out XOR operation on the read effective data to the SSD rear end, so that the SSD rear end finishes the XOR operation on the effective data of the RAID stripe, and after receiving the command, the SSD rear end carries out XOR operation to obtain parity check bit data of the RAID stripe; the parity bit data of the incomplete strip is generated by not performing exclusive-or operation by the CPU, but by sending a command to the rear end of the SSD, the rear end of the SSD performs exclusive-or operation to obtain the parity bit data; after the determining whether the low power consumption processing request is a command to exit low power consumption, the method further includes:

and if the low-power consumption processing request is not a command for exiting low power consumption, directly entering a low-power consumption mode.

2. The method of claim 1, wherein after determining whether the data of the RAID stripe at the write point is complete, the method further comprises:

3. The method of claim 1, wherein reading valid data comprises:

and reading the effective data from the NandFlash.

4. Advance and retreat low-power consumption flow accelerating device which characterized in that includes:

a data writing unit for writing user data;

the check bit generating unit comprises a reading subunit and an operation subunit;

a reading subunit, configured to read valid data; the arithmetic subunit is used for carrying out XOR operation on the effective data to generate parity check bit data of the RAID stripe; the arithmetic subunit is used for carrying out XOR operation on the effective data by the solid state disk so as to generate parity check bit data of the RAID stripe;

further comprising:

a mode entering unit, configured to directly enter a low power consumption mode if the low power consumption processing request is not a command to exit low power consumption;

the SSD internally sends a command for reading the effective data of the RAID stripe to the rear end of the SSD; reading the effective data stored in the NandFlash by the SSD rear end; the SSD internally sends a command for carrying out XOR operation on the read effective data to the SSD rear end, so that the SSD rear end finishes the XOR operation on the effective data of the RAID stripe, and after receiving the command, the SSD rear end carries out XOR operation to obtain parity check bit data of the RAID stripe; the parity bit data of the incomplete strip is generated by the XOR operation of the CPU, and the parity bit data is obtained by the XOR operation of the SSD rear end by sending a command to the SSD rear end.

5. A computer device, characterized in that it comprises a memory, on which a computer program is stored, and a processor, which when executing the computer program, implements the method according to any one of claims 1 to 3.

6. A storage medium, characterized in that the storage medium stores a computer program which, when executed by a processor, implements the method according to any one of claims 1 to 3.