CN115878041A

CN115878041A - Method and device for improving writing performance of RAID (redundant array of independent disks) of solid state disk and computer equipment

Info

Publication number: CN115878041A
Application number: CN202211642519.0A
Authority: CN
Inventors: 徐攀; 程曼; 臧鑫
Original assignee: Suzhou Yilian Information System Co Ltd
Current assignee: Suzhou Yilian Information System Co Ltd
Priority date: 2022-12-20
Filing date: 2022-12-20
Publication date: 2023-03-31

Abstract

The application relates to a method and a device for improving writing performance of a solid state disk RAID, a computer device and a storage medium, wherein the method comprises the following steps: if the command is the write Parity command, submitting the write Parity command to the NFC hardware, and judging whether the XOR operation times are consistent with the expected times contained in the write Parity command or not inside the NFC hardware; if the data are consistent, directly writing the Parity data into Nand Flash; if the command is inconsistent with the write Parity command, temporarily storing the write Parity command into an internal Buffer of the NFC hardware and continuously executing other commands; monitoring the times of XOR operation in the hardware, and immediately executing the writing of the Parity data to the Nand Flash once the XOR operation times are recorded to be consistent with the expected times contained in the Parity writing command; and after the Parity command is written, carrying out zero clearing treatment on the XOR operation times corresponding to the strips. The invention can effectively improve the writing performance of the RAID of the solid state disk.

Description

Method and device for improving writing performance of RAID (redundant array of independent disks) of solid state disk and computer equipment

Technical Field

The invention relates to the technical field of solid state disks, in particular to a method and a device for improving writing performance of a solid state disk RAID, a computer device and a storage medium.

Background

At present, the mainstream SSD supports the Data protection capability improvement through RAID, data protection is carried out in a mode of 31User Data +1parity, data in the first 31 blocks are effective Data, data in the last 1 Block are Parity Data generated by XOR of User Data, and any Data in the first 31 groups of Data can be recovered through the Parity Data when lost, so that the Data reliability is improved. When the User Data is written, the Parity Data is updated in real time, and after 31 groups of User Data are all written into the Nand Flash, the latest updated Parity Data is also written into the Nand Flash.

In the existing processing method for writing RAID stripes, a SSD (solid State disk) receives a write User Data command, software sends the write command with XOR (orthogonal frequency division multiplexing) operation to NFC (near field communication) hardware, and when the NFC hardware executes the command, the NFC hardware writes the User Data into Nand Flash while performing XOR operation on the User Data, and then the software is responsible for checking the execution state of the current write operation command. After receiving the write Parity command at the rear end, the software judges whether User Data corresponding to the strip is written into Nand Flash, if the software judges that the User Data write operation is not completely completed, the write operation for writing the Parity Data is waited for, and the write command is issued until all the write operations of the User Data are completely completed, so that the NFC hardware writes the Parity Data into the Nand Flash. Therefore, when the software issues a command for writing the partition Data, the Nand Flash under the bank can be operated only in a Single Plane mode, but the Nand Flash can not be operated in a Multi-Plane mode with the adjacent bank for writing the User Data, so that the RAID writing performance is reduced. Meanwhile, the bank writing the Parity Data is waiting for the completion of the bank writing operation of other write User Data, so that the subsequent writing operation command of the bank cannot be processed by software, and the RAID writing performance is further reduced.

Disclosure of Invention

Therefore, in order to solve the above technical problems, it is necessary to provide a method and an apparatus for implementing write performance improvement of a solid state disk RAID, a computer device, and a storage medium.

A method for improving writing performance of a solid state disk RAID (redundant array of independent disks) comprises the following steps:

acquiring a write command issued by a host, and judging whether the write command is a write Parity command;

if the command is the write Parity command, submitting the write Parity command to NFC hardware, and judging whether the XOR operation times are consistent with the expected times contained in the write Parity command or not inside the NFC hardware;

if the data are consistent, directly writing the Parity data into Nand Flash; if the command is inconsistent with the write Parity command, temporarily storing the write Parity command into an internal Buffer of the NFC hardware and continuously executing other commands;

monitoring the times of XOR operation in the hardware, and immediately executing the write Parity data to the Nand Flash once the XOR operation times are consistent with the expected times contained in the write Parity command;

and after the Parity command is written, carrying out zero clearing on the XOR operation times corresponding to the stripes.

In one embodiment, after the step of determining whether the write command is a write Parity command, the method further includes:

and if the command is not the write Parity command, submitting the write User Data command with the XOR operation to the NFC hardware, simultaneously carrying out the XOR operation and executing the command of writing the User Data to the Nand Flash in the NFC hardware, and adding 1 to the XOR operation frequency after the XOR operation is finished and recording the result.

In one embodiment, before the step of submitting the write Parity command to NFC hardware if the write Parity command is the write Parity command, and determining, by the NFC hardware internally, whether the number of XOR operations is consistent with the expected number of times included in the write Parity command, the method further includes:

judging whether the current write Parity command and a write User Data command form a Multi Plane operation or not;

and if so, the NFC hardware firstly carries out XOR operation on the User Data, and then judges whether the XOR finishing times of the current stripe are consistent with the times specified in the write Parity command or not.

In one embodiment, after the step of determining whether the number of completed XORs of the current stripe is consistent with the number specified in the write Parity command, the method further includes:

if the Data are consistent, writing the User Data and the Parity Data into Nand Flash in a Multi Plane mode; if the Data are inconsistent, temporarily storing the Multi Plane command in hardware and continuously executing other commands submitted by the software until the XOR times recorded in the hardware meet expectations, and immediately writing the User Data and the Parity Data into the Nand Flash in a Multi Plane mode;

and after the writing in the Multi Plane mode is completed, carrying out zero clearing treatment on the XOR operation times corresponding to the strips.

An implementation apparatus for improving write performance of a solid state disk RAID, the implementation apparatus for improving write performance of a solid state disk RAID comprising:

the first judgment module is used for acquiring a write command issued by a host and judging whether the write command is a write Parity command;

the second judgment module is used for submitting the write Parity command to NFC hardware if the write Parity command is the write Parity command, and the NFC hardware internally judges whether the times of XOR operation are consistent with the expected times contained in the write Parity command or not;

the first processing module is used for directly writing the Parity data into the Nand Flash if the Parity data is consistent with the Nand Flash; if the command is inconsistent with the write Parity command, temporarily storing the write Parity command into an internal Buffer of the NFC hardware and continuously executing other commands;

the number monitoring module is used for monitoring the number of times of XOR operation in the hardware, and once the number of times of XOR operation is recorded to be consistent with the expected number of times contained in the write Parity command, the write Parity data is immediately executed to the Nand Flash;

and the number zero clearing module is used for clearing the XOR operation number corresponding to the strip after the Parity command to be written is completed.

In one embodiment, the apparatus further comprises a second processing module configured to:

In one embodiment, the apparatus further includes a third determining module, where the third determining module is configured to:

In one embodiment, the apparatus further comprises a third processing module configured to:

A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of any of the above methods when executing the computer program.

A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of any of the methods described above.

After the method, the device, the computer equipment and the storage medium for improving the write performance of the RAID of the solid state disk receive a write Parity command, software does not judge whether User Data corresponding to the strip is written into Nand Flash or not, but directly sends the command to NFC hardware, when the hardware executes the command, the hardware judges whether the XOR completion frequency of the current strip is consistent with the frequency specified in the write Parity command or not, if so, the Data of the Parity is directly written into the Nand Flash, if not, the command is temporarily stored in the hardware and then other commands submitted by the software are continuously executed, meanwhile, the number of times of XOR operation in the hardware is continuously monitored, once the number of times of XOR operation recorded by the hardware is consistent with the frequency specified in the write Parity command, the command for writing the Data is immediately executed, and after the write Parity command is completed, the NFC hardware automatically clears the XOR frequency. The invention can effectively improve the writing performance of the RAID of the solid state disk.

Drawings

Fig. 1 is a schematic flowchart of a method for improving write performance of a solid state disk RAID in an embodiment;

fig. 2 is a schematic flowchart illustrating a method for improving write performance of a solid state disk RAID in another embodiment;

FIG. 3 is a flowchart illustrating a method for improving write performance of a solid state disk RAID according to yet another embodiment;

FIG. 4 is a flowchart illustrating a method for improving write performance of a solid state disk RAID in another embodiment;

FIG. 5 is a block diagram illustrating an apparatus for implementing write performance improvement of a solid state disk RAID in an embodiment;

FIG. 6 is a block diagram of an apparatus for implementing write performance improvement of a solid state disk RAID according to another embodiment;

FIG. 7 is a block diagram illustrating an apparatus for implementing write performance improvement in a solid state disk RAID in yet another embodiment;

FIG. 8 is a block diagram of an apparatus for implementing write performance enhancement of a solid state disk RAID in another embodiment;

FIG. 9 is a diagram illustrating an internal structure of a computer device according to an embodiment.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad application.

At present, in the existing processing method for writing a RAID stripe, an SSD rear end receives a write User Data command, software issues the write command with XOR operation to NFC hardware, and when the NFC hardware executes the command, the NFC hardware writes the User Data into Nand Flash while performing XOR operation on the User Data, and then the software is responsible for checking an execution state of the current write operation command. After the rear end receives the write Parity command, the software judges whether User Data corresponding to the strip is written into Nand Flash, if the software judges that the User Data write operation is not completely completed, the write operation for writing the Parity Data is waited for, and the write command is issued until all the write operations of the User Data are completely completed, so that the NFC hardware writes the Parity Data into the Nand Flash. Therefore, when the software issues a command for writing the partition Data, the Nand Flash under the bank can be operated only in a Single Plane mode, but the Nand Flash can not be operated in a Multi-Plane mode with the adjacent bank for writing the User Data, so that the RAID writing performance is reduced. Meanwhile, the bank writing the Parity Data waits for the completion of the bank writing operation of other write User Data all the time, so that the subsequent writing operation command of the bank cannot be processed by software, and the RAID writing performance is further reduced.

Based on this, the invention provides a method for improving the write performance of a solid state disk RAID, aiming at further improving the write performance of the RAID.

In an embodiment, as shown in fig. 1, a method for implementing write performance improvement of a solid state disk RAID is provided, where the method includes:

102, acquiring a write command issued by a host, and judging whether the write command is a write Parity command;

step 104, if the command is the write Parity command, submitting the write Parity command to the NFC hardware, and judging whether the XOR operation times are consistent with the expected times contained in the write Parity command or not inside the NFC hardware;

step 106, if the data are consistent, the Parity data is directly written into the Nand Flash; if the command is inconsistent with the command, temporarily storing the write Parity command into an internal Buffer of the NFC hardware and continuously executing other commands;

step 108, monitoring the times of XOR operation in the hardware, and immediately executing the writing of the Parity data to the Nand Flash once the XOR operation times are recorded to be consistent with the expected times contained in the Parity writing command;

and step 110, after the Parity command is written, carrying out zero clearing processing on the XOR operation times corresponding to the strips.

In this embodiment, a method for improving write performance of a solid state disk RAID is provided, and specifically, a write command issued by a host is first obtained, and whether the write command is a write Parity command is determined. After receiving the command of writing the Parity, the software does not judge whether the User Data corresponding to the strip is written into the Nand Flash, but directly delivers the command to the NFC hardware.

and if the command is not the write Parity command, submitting the write User Data command with the XOR operation to the NFC hardware, simultaneously carrying out the XOR operation inside the NFC hardware and executing the command of writing the User Data to the Nand Flash, and after the XOR operation is completed, adding 1 to the times of the XOR operation and recording the times.

Specifically, after receiving a write User Data command, the back end sends a write command with XOR operation to the NFC hardware, and the NFC hardware performs the command, and after completing the XOR operation, adds 1 to the XOR number of times that the current stripe is completed, and records the XOR number.

Then, when the hardware executes the command, whether the XOR completion times of the current stripe are consistent with the times specified in the write Parity command or not is judged, if yes, the Parity data is directly written into the Nand Flash, if not, the command is temporarily stored in the hardware and then other commands submitted by software are continuously executed, the times of XOR operation in the hardware is continuously monitored, and once the times of XOR operation recorded by the hardware are consistent with the times specified in the write Parity command, the command of writing the Parity data into the Nand Flash is immediately executed.

The hardware internal XOR times are values obtained by internally performing XOR operation when the NFC hardware executes write User Data, performing 1 addition operation on the XOR times completed by the current stripe after completing the XOR operation and recording, and automatically clearing the XOR times by the NFC hardware after executing the write Parity command.

In the above embodiment, after receiving the write Parity command, the software does not judge whether the User Data corresponding to the stripe has been written into Nand Flash, but directly gives the command to the NFC hardware, when executing the command, the hardware judges whether the number of times of completing XOR of the current stripe is consistent with the number of times specified in the write Parity command, if so, directly writes the Parity Data into Nand Flash, if not, temporarily stores the command in the hardware and then continuously executes other commands submitted by the software, and continuously monitors the number of times of performing XOR operation in the hardware, once the number of times of XOR operation recorded in the hardware is consistent with the number of times specified in the write Parity command, the command of writing the Parity Data is immediately executed, and after the write Parity command is completed, the NFC hardware automatically performs zero clearing operation on the number of times of XOR operation. The scheme can effectively improve the writing performance of the RAID of the solid state disk.

In an embodiment, as shown in fig. 2, a method for improving write performance of a solid state disk RAID is provided, where the method further includes, before the step of submitting a write Parity command to NFC hardware if the write Parity command is the write Parity command, and the NFC hardware internally determining whether the number of XOR operations is consistent with an expected number included in the write Parity command:

step 202, judging whether the current write Parity command and the write User Data command form a Multi Plane operation;

and step 204, if so, the NFC hardware firstly carries out XOR operation of User Data, and then judges whether the XOR finishing times of the current stripe are consistent with the times specified in the Parity writing command.

In an embodiment, as shown in fig. 3, a method for improving write performance of a solid state disk RAID is provided, where the method further includes, after the step of determining whether the number of times of completing XOR of a current stripe is consistent with the number of times specified in a write Parity command:

step 302, if the Data are consistent, writing the User Data and the Parity Data into Nand Flash in a Multi Plane mode;

step 304, if the Multi Plane command is inconsistent with the XOR frequency recorded in the hardware, continuing to execute other commands submitted by the software, and immediately writing User Data and Parity Data into Nand Flash in a Multi Plane mode after the XOR frequency recorded in the hardware meets the expectation;

and step 306, after the Multi Plane mode writing is completed, performing zero clearing processing on the XOR operation times corresponding to the stripes.

In one embodiment, referring to fig. 4, an implementation process of improving write performance of a specific solid state disk RAID is provided as follows:

4.1, the back end receives the write command sent by the Host.

4.2, judging whether the write command is in a write Parity command mode by software. If not, step 4.3 is entered. If it is a write Parity command, step 4.5 is entered.

And 4.3, submitting a write User Data command with XOR operation to the NFC hardware by software.

And 4.4, performing XOR operation and executing the command of writing User Data to Nand Flash simultaneously in the NFC hardware. After the XOR operation is completed, the number of XOR operations XOR _ CNT is added by 1 and recorded, and then the step 4.1 is returned to.

4.5, judging whether the current write Parity command and the write User Data command form a Multi Plane operation by software. If not, go to step 4.6; if so, go to step 4.9.

4.6, the software submits the write Parity command to the NFC hardware.

4.7, judging whether the XOR operation times are consistent with the expected times contained in the write Parity command or not inside the NFC hardware, if not, temporarily storing the command inside the hardware by the NFC to execute other commands submitted by the software, and judging the XOR times until the XOR times are consistent with the expected times.

And 4.8, writing the Parity data into Nand Flash by the NFC hardware, clearing the XOR _ CNT times corresponding to the strip, and ending the current RAID write operation.

And 4.9, the NFC hardware firstly carries out XOR operation on the User Data, and after the XOR operation is finished, the XOR operation frequency XOR _ CNT is added with 1 for operation and is recorded.

4.10, judging whether the XOR operation times are consistent with the expected times contained in the write Parity command or not inside the NFC hardware, if not, temporarily storing the Multi Plane command inside the hardware by the NFC to execute other commands submitted by software, and judging the XOR times until the XOR times are consistent with the expected times.

4.11, writing the User Data and the Parity Data into Nand Flash by the NFC hardware in a Multi Plane mode, clearing the XOR _ CNT times corresponding to the strip, and ending the current RAID writing operation.

In this embodiment, if the command for writing the part Data and the command for writing the User Data in the adjacent bank sent by the software are delivered to the NFC hardware in a Multi Plane manner, the NFC hardware first performs XOR operation on the User Data, then judges whether the number of times of completing XOR of the current band is consistent with the number of times specified in the command for writing the part, if so, writes the User Data and the part Data in a Nand Flash in the Multi Plane manner, otherwise, temporarily stores the Multi Plane command in the hardware and then continues to execute other commands submitted by the software, and immediately writes the User Data and the part Data in the Nand Flash in the Multi Plane manner until the number of times of XOR recorded in the hardware is consistent with the expectation.

Therefore, in the scheme, no matter whether the partition data is written into the Nand Flash in a Single Plane mode or a Multi Plane mode, the NFC hardware automatically carries out zero clearing processing on the XOR operation times corresponding to the strip. The software can send the command for writing the Parity and the command for writing the User Data by the adjacent bank to the NFC hardware in a Multi-Plane mode, namely the NFC hardware writes the User Data and the Parity Data into Nand Flash in the Multi-Plane Program mode, and the RAID writing performance is greatly improved.

It should be understood that although the various steps in the flow diagrams of fig. 1-4 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 1-4 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.

In one embodiment, as shown in fig. 5, an apparatus 500 for implementing write performance improvement of a solid state disk RAID is provided, the apparatus including:

a first determining module 501, configured to obtain a write command issued by a host, and determine whether the write command is a write Parity command;

a second determining module 502, configured to submit the write Parity command to NFC hardware if the write Parity command is, where the NFC hardware internally determines whether the number of XOR operations is consistent with an expected number included in the write Parity command;

a first processing module 503, configured to directly write the Parity data into the Nand Flash if the Parity data is consistent with the Nand Flash; if the command is inconsistent with the write Parity command, temporarily storing the write Parity command into an internal Buffer of the NFC hardware and continuously executing other commands;

the number monitoring module 504 is used for monitoring the number of times of XOR operation performed in the hardware, and once the number of times of XOR operation is recorded to be consistent with the expected number of times contained in the write Parity command, the write Parity data is immediately executed to the Nand Flash;

and a time clearing module 505, configured to clear the XOR operation times corresponding to the stripes after the Parity command to be written is completed.

In an embodiment, as shown in fig. 6, an apparatus 500 for implementing write performance improvement of a solid state disk RAID is provided, the apparatus further includes a second processing module 506, and the second processing module is configured to:

In an embodiment, as shown in fig. 7, an apparatus 500 for implementing write performance improvement of a solid state disk RAID is provided, the apparatus further includes a third determining module 507, the third determining module is configured to:

In an embodiment, as shown in fig. 8, an apparatus 500 for implementing write performance improvement of a solid state disk RAID is provided, the apparatus further includes a third processing module 508, and the third processing module is configured to:

if the Data are consistent, writing the User Data and the Parity Data into Nand Flash in a Multi Plane mode; if the Data are inconsistent, temporarily storing the Multi Plane command in hardware and then continuously executing other commands submitted by software until the XOR times recorded in the hardware meet the expectation, and immediately writing the User Data and the Party Data into Nand Flash in a Multi Plane mode;

For specific limitations of the implementation apparatus for improving write performance of the solid state disk RAID, reference may be made to the above limitations of the implementation method for improving write performance of the solid state disk RAID, and details are not described here again.

In one embodiment, a computer device is provided, the internal structure of which may be as shown in FIG. 9. The computer device includes a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to realize the method for improving the write performance of the solid state disk RAID.

Those skilled in the art will appreciate that the architecture shown in fig. 9 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.

In one embodiment, a computer device is provided, comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the above method embodiments when executing the computer program.

In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which computer program, when being executed by a processor, carries out the steps of the above respective method embodiments.

It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), rambus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

All possible combinations of the technical features in the above embodiments may not be described for the sake of brevity, but should be considered as being within the scope of the present disclosure as long as there is no contradiction between the combinations of the technical features.

The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. A method for improving write performance of a solid state disk RAID comprises the following steps:

if the command is the write Parity command, submitting the write Parity command to NFC hardware, and internally judging whether the XOR operation times are consistent with expected times contained in the write Parity command or not by the NFC hardware;

monitoring the times of XOR operation in the hardware, and immediately executing the writing of the Parity data to the Nand Flash once the XOR operation times are recorded to be consistent with the expected times contained in the Parity writing command;

and after the Parity command is written, carrying out zero clearing treatment on the XOR operation times corresponding to the strips.

2. The method for improving write performance of a solid state disk RAID according to claim 1, wherein after the step of determining whether the write command is a write Parity command, the method further includes:

3. The method for improving write performance of a solid state disk RAID according to claim 2, wherein before the step of submitting the write Parity command to NFC hardware if the write Parity command is the write Parity command, the step of internally judging whether the number of XOR operations is consistent with the expected number included in the write Parity command by the NFC hardware further includes:

4. The method for improving write performance of a solid state disk RAID according to claim 3, wherein after the step of determining whether the number of times of completing XOR of the current stripe is consistent with the number of times specified in the write Parity command, the method further includes:

if the Data are consistent, writing the User Data and the Party Data into Nand Flash in a Multi Plane mode; if the Data are inconsistent, temporarily storing the Multi Plane command in hardware and continuously executing other commands submitted by the software until the XOR times recorded in the hardware meet expectations, and immediately writing the User Data and the Parity Data into the Nand Flash in a Multi Plane mode;

5. The device for improving the writing performance of the RAID of the solid state disk is characterized by comprising the following steps:

the first judging module is used for acquiring a write command issued by a host and judging whether the write command is a write Parity command or not;

and the frequency zero clearing module is used for carrying out zero clearing processing on the XOR operation frequency corresponding to the strip after the Parity command to be written is completed.

6. The apparatus for implementing write performance improvement of a solid state disk RAID according to claim 5, wherein the apparatus further comprises a second processing module, the second processing module is configured to:

7. The apparatus for improving write performance of a solid state disk RAID according to claim 6, wherein the apparatus further comprises a third determining module, the third determining module is configured to:

judging whether the current write Parity command and the write User Data command form a Multi Plane operation;

if yes, the NFC hardware carries out XOR operation on the User Data, and then judges whether the XOR finishing times of the current stripe are consistent with the times specified in the write Parity command or not.

8. The apparatus for implementing write performance improvement of a solid state disk RAID according to claim 7, wherein the apparatus further comprises a third processing module, the third processing module is configured to: :

and after the Multi Plane mode is written, carrying out zero clearing treatment on the XOR operation times corresponding to the stripes.

9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 4 are implemented when the computer program is executed by the processor.

10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 4.