CN112567512B - 半导体结构及其形成方法 - Google Patents

半导体结构及其形成方法 Download PDF

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Publication number
CN112567512B
CN112567512B CN201880096617.4A CN201880096617A CN112567512B CN 112567512 B CN112567512 B CN 112567512B CN 201880096617 A CN201880096617 A CN 201880096617A CN 112567512 B CN112567512 B CN 112567512B
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layer
bonding
bonding layer
adhesion
adhesion layer
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CN112567512A (zh
Inventor
王新胜
张莉
张高升
万先进
华子群
王家文
丁滔滔
朱宏斌
程卫华
杨士宁
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Yangtze Memory Technologies Co Ltd
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Yangtze Memory Technologies Co Ltd
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Abstract

本发明涉及一种半导体结构及其形成方法，所述半导体结构包括：第一基底；位于所述第一基底表面的第一粘附层；位于所述第一粘附层表面的第一键合层，所述第一粘附层的致密度大于所述第一键合层的致密度。所述半导体结构的第一粘附层与所述第一基底以及第一键合层之间具有较高的粘附性，有利于提高半导体结构的性能。

Description

半导体结构及其形成方法
技术领域
本发明涉及半导体技术领域，尤其涉及一种半导体结构及其形成方法。
背景技术
在3D的芯片技术平台中，通常会将两片及以上形成有半导体器件的晶圆通过晶圆键合技术进行键合，以提高芯片的集成度。现有的晶圆键合技术，在晶圆键合面上形成键合薄膜，两层晶圆之间通过键合薄膜表面键合实现晶圆键合。
现有技术中，通常采用氧化硅和氮化硅薄膜作为键合薄膜，键合强度不够，导致工艺过程中容易出现缺陷，产品良率受到影响。
并且，键合薄膜内还形成有金属连接结构，在混合键合的过程中，所述金属连接结构容易在键合界面出现扩散现象，导致产品性能受到影响。
因此，如何提高晶圆键合的质量，是目前亟待解决的问题。
发明内容
本发明所要解决的技术问题是，提供一种半导体结构及其形成方法，以提高键合质量。
为解决上述问题，本发明提供一种半导体结构，包括：一种半导体结构，其特征在于，包括：第一基底；位于所述第一基底表面的第一粘附层；位于所述第一粘附层表面的第一键合层，所述第一粘附层的致密度大于所述第一键合层的致密度。
可选的，所述第一键合层的材料为包含C元素的介质材料。
可选的，所述第一键合层还包括Si和N。
可选的，所述第一粘附层的材料包括氮化硅、氮氧化硅以及氧化硅中的至少一种。
可选的，所述第一粘附层的厚度为
可选的，所述第一键合层中，C的原子浓度均匀分布，或者C的原子浓度随第一键合层厚度增加而增大。
可选的，还包括：第二基底，所述第二基底表面形成有第二粘附层和位于所述第二粘附层表面的第二键合层，所述第二粘附层的致密度大于所述第二键合层的致密度；所述第二键合层与所述第一键合层表面相对键合固定。
可选的，所述第二键合层与所述第一键合层的材料相同，所述第二粘附层与所述第一粘附层的材料相同。
可选的，所述第二粘附层的厚度为
可选的，还包括贯穿所述第一键合层和第一粘附层的第一键合垫；贯穿所述第二键合层和第二粘附层的第二键合垫；所述第一键合垫与第二键合垫相对键合连接。
为解决上述问题，本发明的技术方案还提供一种半导体结构的形成方法，包括：提供第一基底；在所述第一基底表面形成第一粘附层；对所述第一粘附层进行等离子体轰击，以提高致密度；在所述第一粘附层表面形成第一键合层，所述第一粘附层的致密度大于所述第一键合层的致密度。
进行所述等离子体轰击之前，所述第一粘附层含有H键；在所述等离子体轰击步骤中，采用含N等离子体进行轰击，以减少所述第一粘附层中的H键。
可选的，所述第一键合层的材料为包含C元素的介质材料。
可选的，所述第一键合层还包括Si和N。
可选的，所述第一粘附层的材料包括氮化硅、氮氧化硅以及氧化硅中的至少一种。
可选的，所述第一粘附层的厚度为
本发明的半导体结构的第一基底与第一键合层之间具有第一粘附层，所述第一粘附层的致密度大于第一键合层致密度，从而提高第一粘附层与第一键合层之间的粘附力。且所述第一键合层在键合后也能在键合表面具有较强的键合力，能够阻挡金属材料在键合界面的扩散，从而提高形成的半导体结构的性能。
附图说明
图1至图4为本发明一具体实施方式的半导体结构的形成过程的结构示意图；
图5为本发明一具体实施方式的半导体结构的结构示意图；
图6为本发明一具体实施方式的半导体结构的结构示意图。
具体实施方式
下面结合附图对本发明提供的半导体结构及其形成方法的具体实施方式做详细说明。
请参考图1至图4，为本发明一具体实施方式的半导体结构的形成过程的结构示意图。
请参考图1，提供第一基底100。
所述第一基底100包括第一半导体衬底101、形成于所述第一半导体衬底101表面的第一器件层102。
所述第一半导体衬底101可以为单晶硅衬底、Ge衬底、SiGe衬底、SOI或GOI等；根据器件的实际需求，可以选择合适的第一半导体衬底101，在此不作限定。该具体实施方式中，所述第一半导体衬底101为单晶硅晶圆。
所述第一器件层102包括形成于所述半导体衬底101上的半导体器件、连接所述半导体器件的金属互连结构、覆盖所述半导体器件以及金属互连结构的介质层等，所述介质层通常为氧化硅、氮化硅或氮氧化硅。所述第一器件层102可以为多层或单层结构。在一个具体实施方式中，所述第一器件层102包括介质层以及形成于介质层内的3D NAND结构。
请参考图2，在所述第一基底100表面形成第一粘附层202和位于所述第一粘附层202表面的第一键合层201。
可以分别采用化学气相沉积工艺，依次形成所述第一粘附层202和第一键合层201。该具体实施方式中，采用等离子体增强化学气相沉积工艺形成所述第一粘附层202和第一键合层201。
所述第一粘附层202的材料为致密度大于所述第一键合层201致密度的介质材料。所述第一粘附层202的材料可以为氮化硅、氮氧化硅以及氧化硅中的至少一种，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第一粘附层202内还可以掺杂有O、H、P、F等元素中的至少一种。
在一个具体实施方式中，所述第一粘附层202的材料为氮化硅，采用等离子体增强化学气相沉积工艺形成所述第一粘附层202，采用的反应气体包括SiH4和NH3，SiH4和NH3的流量比范围为(0.8～1.2):1，射频功率范围为150W～300W。可以通过调整所述沉积工艺中的工艺参数，形成具有较高致密度的第一粘附层202。
在其他具体实施方式中，所述第一粘附层202的形成方法包括：采用沉积工艺在所述第一基底100表面形成粘附材料层，然后对所述粘附材料层进行等离子体轰击，以减少粘附材料层中H的含量，从而提高形成的第一粘附层202的致密度。所述等离子体轰击可以采用含N气体，例如N2、NH3等。在一个具体实施方式中，所述等离子体轰击可以采用N2作为等离子体源，射频功率范围为300W～800W，轰击时间大于15s。通过所述等离子体轰击可以去除所述第一粘附层202内的H，从而使得所述第一粘附层202的单位面积内拥有更多可与相邻材料层连接的化学键，例如Si-、N-等，从而提高所述第一粘附层202与第一键合层201界面之间的粘附力。
所述第一键合层201的材料为包含C元素的介质材料，在一个具体实施方式中，所述第一键合层201主要包含Si、N和C。在其他具体实施方式中，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第一键合层201内还可以掺杂有Si、N、O、H、P、F等元素中的至少一种。所述第一键合层201的材料可以为掺碳氮化硅、掺碳氮氧化硅、掺氮碳氧化硅等。由于所述第一键合层201中含C元素，会导致第一键合层201的致密度较低，如果直接在所述第一基底表面形成所述第一键合层201，会导致与第一基底100表面之间的粘附力较弱。而本申请的具体实施方式中，在所述第一键合层201与第一基底100之间形成有致密度更高的第一粘附层202，可以提高各层之间的粘附力。
在一个具体实施方式中，采用等离子体增强化学气相沉积工艺形成所述第一键合层201，采用的反应气体包括：三甲基硅烷或四甲基硅烷中的一种以及NH3，三甲基硅烷或四甲基硅烷与NH3的流量比范围为(1.6～2.4):1，射频功率范围为500W～1100W。通过控制所述第一键合层201和第一粘附层202的形成工艺参数，可以调整所述第一键合层201和第一粘附层202内各组分的浓度，对材料层之间粘附力以及第一键合层200的介电系数进行调整。
所述第一键合层201中的C能够有效提高所述第一键合层201在键合过程中，与其他键合层之间的键合力。C浓度越高，与其他键合层之间进行键合时产生的键合力越大。在一个具体实施方式中，所述第一键合层201中，C的原子浓度大于0且小于50％；在另一具体实施方式中，所述第一键合层201中C的原子浓度大于35％。
由于不同材料层之间的粘附力与界面两侧的材料组分相关，材料组分越接近，粘附力越强。为了进一步增强所述第一粘附层202与所述第一器件层102之间的粘附力，可以在形成所述第一粘附层202的过程中，逐渐调整工艺参数，使得所述第一粘附层202内的组分浓度逐渐发生变化，使得所述第一器件层102与所述第一粘附层202界面两侧的材料组分接近。在一个具体实施方式中，在形成所述第一粘附层202的过程中，随着第一粘附层202厚度的增加，通过调整沉积工艺的参数，使得第一粘附层202内的Si的原子浓度随第一粘附层202厚度增加而逐渐改变。在其他具体实施方式中，根据所述第一器件层102表面材料的不同，也可以对所述第一粘附层202内的其他成分浓度进行调整。在其他具体实施方式中，也可以在形成所述第一粘附层202的过程中，保持沉积工艺参数不变，使得第一粘附层202内的各元素的原子浓度在不同厚度位置处保持稳定不变。
为了进一步增强所述第一粘附层202与所述第一键合层201之间的粘附力，可以在形成所述第一键合层201的过程中，逐渐调整工艺参数，使得所述第一键合层201内的组分浓度逐渐发生变化，使得所述第一键合层201与所述第一粘附层202界面两侧的材料组分接近。在一个具体实施方式中，在形成所述第一键合层201的过程中，随着第一键合层201厚度的增加，通过调整沉积工艺的参数，使得C的原子浓度随第一键合层201厚度增加而逐渐增大。在其他具体实施方式中，也可以使得C的原子浓度随第一键合层201厚度增加而逐渐减小或者先逐渐增大再逐渐减小。在其他具体实施方式中，在形成所述第一键合层201的过程中，保持沉积工艺参数不变，使得第一键合层201中各元素在不同厚度位置处保持一致。
为了保持所述第一粘附层202具有较高的致密性，在形成所述第一粘附层202的过程中，离子轰击过程中，能够尽可能多的减少所述第一粘附层202内的H，使所述第一粘附层202各厚度处的致密性均得到提高，所述第一粘附层202的厚度不能过大。在一个具体实施方式中，所述第一粘附层202的厚度为
所述第一键合层201的厚度大于所述第一粘附层202的厚度，以确保在将所述第一键合层201与其他键合层进行键合时，所述第一键合层201具有足够的键合厚度。所述第一键合层201的厚度大于
在其他具体实施方式中，所述第一键合层201还可以包括两层以上堆叠的子键合层。不同子键合层的材料可以相同也可以不同。
上述具体实施方式的半导体结构的第一基底与第一键合层之间具有第一粘附层，所述第一粘附层的致密度大于第一键合层致密度，从而提高第一粘附层与第一键合层之间的粘附力。且所述第一键合层在键合后也能在键合表面具有较强的键合力，能够阻挡金属材料在键合界面的扩散，从而提高形成的半导体结构的性能。
请参考图3，在另一具体实施方式中，还包括：提供第二基底300；在所述第二基底300表面形成第二粘附层402和位于所述第二粘附层402表面的第二键合层401。
所述第二基底300包括第二半导体衬底301以及位于所述第二半导体衬底201表面的第二器件层302。
所述第二粘附层402的材料为致密度大于所述第二键合层401致密度的介质材料。所述第一粘附层202的材料可以为氮化硅、氮氧化硅以及氧化硅中的至少一种，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第一粘附层202内还可以掺杂有O、H、P、F等元素中的至少一种。
所述第二键合层401的材料为包含C元素的介质材料，在一个具体实施方式中，所述第二键合层401主要包含Si、N和C。在其他具体实施方式中，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第二键合层401内还可以掺杂有Si、N、O、H、P、F等元素中的至少一种。
采用化学气相沉积工艺在所述第二器件层302表面依次形成所述第二粘附层402和第二粘附层401。所述第二粘附层402和所述第二键合层401的具体材料与结构请参考上述具体实施方式中的第一粘附层202和第一键合层201的描述，在此不再赘述。在一个具体实施方式中，所述第二键合层402与第一粘附层202的材料、结构相同；所述第二键合层401和第一键合层201的结构、材料均相同。所述第二粘附层402的厚度为所述第二键合层401的厚度大于/>
请参考图4，将所述第二键合层401所述第一键合层201表面相对键合固定。
所述第一子键合层401与第一键合层201内均含有C，部分C以-CH3的形式存在，-CH3更易被氧化为-OH，并在键合过程中形成Si-O键，使得在键合界面上能够形成更多的硅氧键，从而形成较强的键合力。在一个具体实施方式中，所述第一子键合层401与第一键合层201之间的键合力大于2J/M2。而现有技术中采用不含C的键合层进行键合，通常键合力小于1.5J/M2。
在一个具体实施方式中，所述第一基底100为形成有3D NAND存储结构的基底，而所述第二基底200为形成有外围电路的基底。
在其他具体实施方式中，还可以在基底的两侧表面均形成上述粘附层和键合层，以实现多层键合。
请参考图5，在另一具体实施方式中，还包括：形成贯穿所述第一键合层201和第一粘附层202的第一键合垫501；形成贯穿所述第二键合层401和第二粘附层402的第二键合垫502；在将所述第二键合层401表面与所述第一键合层201表面相对键合固定的同时，将所述第一键合垫501与第二键合垫502相对键合连接。
所述第一键合垫501和第二键合垫502可以分别连接至所述第一器件层102和第二器件层302内的半导体器件以及金属互连层。
所述第一键合垫501的形成方法包括：对所述第一键合层201和第一粘附层202进行图形化，形成贯穿所述第一键合层201和第一粘附层202的开口；在所述开口内填充金属材料，并进行平坦化，形成填充满所述开口的第一键合垫501。采用相同的方法在所述第二键合层401和第二粘附层402内形成所述第一键合垫502。将所述第一键合垫501与第二键合垫502键合连接，可以实现所述第一器件层102和第二器件层302内的半导体器件之间的电连接。
所述第一键合垫501和第二键合垫502的材料可以是Cu、W等金属材料。所述第一键合层201和第一子键合层401内含有C，能够有效阻挡所述第一键合垫501和第二键合垫502的材料在键合界面发生扩散，从而提高所述半导体结构的性能。
上述具体实施方式，在基底表面形成粘附层、在粘附层表面形成键合层，所述粘附层的致密度大于键合层致密度，从而提高粘附层与键合层之间的粘附力。且所述键合层在键合后也能在键合表面具有较强的键合力，能够阻挡金属材料在键合界面的扩散，从而提高形成的半导体结构的性能。
上述具体实施方式的半导体结构形成方法还用于多片基底键合。
请参考图6，在本发明一具体实施方式中，还包括提供第三基底600，在所述第三基底600的一侧表面依次形成第三粘附层702、第三键合层701，在另一侧相对表面上依次形成第四粘附层802、第四键合层801；将所述第三键合层701与第一键合层201表面相对键合固定，将所述第四键合层801与第二键合层401表面键合固定，形成三层键合结构。
所述第三粘附层702和第四粘附层802的形成方法，请参考上述具体实施方式中，第一粘附层202的形成方法，在此不再赘述。所述第三键合层701和第四键合层801的形成方法，请参考上述具体实施方式中，第一键合层201的形成方法，在此不再赘述。
该具体实施方式中，还包括形成贯穿所述第三键合层701、第三粘附层702的第三键合垫703，形成贯穿所述第四键合层801、第四粘附层802的第四键合垫803，将所述第三键合垫703与第一键合垫501键合连接，将所述第四键合垫803与第二键合垫502键合连接。
在其他具体实施方式中，还可以采用上述方法形成四层以上的键合结构。
需说明的是，在本发明的技术方案中，半导体结构中各个基底内的半导体器件类型并不应局限于所给实施例，除了3D NAND之外，其可以为CMOS电路、CIS电路、TFT电路等等。
本发明的具体实施方式还提供一种半导体结构。
请参考图2，为本发明一具体实施方式的半导体结构的结构示意图。
所述半导体结构，包括：第一基底100；位于所述第一基底100表面的第一粘附层202；位于所述第一粘附层202表面的第一键合层200。
所述第一基底100包括第一半导体衬底101、形成于所述第一半导体衬底101表面的第一器件层102。
所述第一半导体衬底101可以为单晶硅衬底、Ge衬底、SiGe衬底、SOI或GOI等；根据器件的实际需求，可以选择合适的第一半导体衬底101，在此不作限定。该具体实施方式中，所述第一半导体衬底101为单晶硅晶圆。
所述第一器件层102包括形成于所述半导体衬底101上的半导体器件、连接所述半导体器件的金属互连结构、覆盖所述半导体器件以及金属互连结构的介质层等。所述第一器件层102可以为多层或单层结构。在一个具体实施方式中，所述第一器件层102包括介质层以及形成于介质层内的3D NAND结构。
所述第一粘附层202的材料为致密度大于所述第一键合层201致密度的介质材料。所述第一粘附层202的材料可以为氮化硅、氮氧化硅以及氧化硅中的至少一种，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第一粘附层202内还可以掺杂有O、H、P、F等元素中的至少一种。在一个具体实施方式中，所述第一粘附层202为具有高致密度的SiN。
所述第一键合层201的材料为包含C元素的介质材料，在一个具体实施方式中，所述第一键合层201主要包含Si、N和C。在其他具体实施方式中，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第一键合层201内还可以掺杂有Si、N、O、H、P、F等元素中的至少一种。所述第一键合层201的材料可以为掺碳氮化硅、掺碳氮氧化硅、掺氮碳氧化硅等。由于所述第一键合层201中含C元素，会导致第一键合层201的致密度较低，如果直接在所述第一基底表面形成所述第一键合层201，会导致与第一基底100表面之间的粘附力较弱。而本申请的具体实施方式中，所述第一键合层201与第一基底100之间形成有致密度更高的第一粘附层202，可以提高各层之间的粘附力。
通过控制所述第一键合层201和第一粘附层202的形成工艺参数，可以调整所述第一键合层201和第一粘附层202内各组分的浓度，从而对材料层之间粘附力以及所述第一键合层200的介电系数进行调整。
所述第一键合层201中的C能够有效提高所述第一键合层201在键合过程中，与其他键合层之间的键合力。C浓度越高，与其他键合层之间进行键合时产生的键合力越大。在一个具体实施方式中，所述第一键合层201中，C的原子浓度大于0，小于50％。在另一具体实施方式中，所述C的原子浓度大于35％。
由于不同材料层之间的粘附力与界面两侧的材料组分相关，材料组分越接近，粘附力越强。为了进一步增强所述第一粘附层202与所述第一器件层102之间的粘附力，所述第一粘附层202内的组分浓度随厚度逐渐发生变化，使得所述第一器件层102与所述第一粘附层202界面两侧的材料组分接近。在一个具体实施方式中，所述第一粘附层202内的Si的原子浓度随第一粘附层202厚度增加而逐渐改变。在其他具体实施方式中，根据所述第一器件层102表面材料的不同，所述第一粘附层202内的其他成分浓度也可以随厚度进行变化。在其他具体实施方式中，也可以使得第一粘附层202内的各元素的原子浓度在不同厚度位置处保持稳定不变，具有均匀分布的原子浓度。
为了进一步增强所述第一粘附层202与所述第一键合层201之间的粘附力，所述第一子键合层201内的组分浓度也可以随厚度逐渐变化，使得所述第一键合层201与所述第一粘附层202界面两侧的材料组分接近。在一个具体实施方式中，随着第一键合层201厚度的增加，第一键合层201内的C原子浓度随第一键合层201厚度增加而逐渐增大。在其他具体实施方式中，第一键合层201内的C的原子浓度随第一键合层201厚度增加而逐渐减小或者先逐渐增大再逐渐减小。在其他具体实施方式中，所述第一键合层201中各元素在不同厚度位置处保持稳定不变，具有均匀分布的原子浓度。
为了使得所述第一粘附层202整体具有较高的致密度，所述第一粘附层202的厚度不能过大。在一个具体实施方式中，所述第一粘附层202的厚度为
所述第一键合层201的厚度大于所述第一粘附层202的厚度，以确保在将所述第一键合层201与其他键合层进行键合时，所述第一键合层201具有足够的键合厚度。在一个具体实施方式中，所述第一键合层201的厚度大于
在其他具体实施方式中，所述第一键合层201还可以包括两层以上堆叠的子键合层，不同子键合层之间的材料可以相同也可以不同。
请参考图4，为本发明另一具体实施方式的半导体结构的示意图。
该具体实施方式中，所述半导体结构还包括：第二基底300，所述第二基底300表面形成有第二粘附层402和位于所述第二粘附层402表面的第二键合层401；所述第二键合层401与所述第一键合层201表面相对键合固定。
所述第二基底300包括第二半导体衬底301以及位于所述第二半导体衬底201表面的第二器件层302。
所述第二粘附层402的材料为致密度大于所述第二键合层401致密度的介质材料。所述第二粘附层402的材料可以为氮化硅、氮氧化硅以及氧化硅中的至少一种，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第二粘附层402内还可以掺杂有O、H、P、F等元素中的至少一种。
所述第二键合层401的材料为包含C元素的介质材料，在一个具体实施方式中，所述第二键合层401主要包含Si、N和C。在其他具体实施方式中，基于化学气相沉积工艺中采用的反应气体，以及具体产品的需求，所述第二键合层401内还可以掺杂有Si、N、O、H、P、F等元素中的至少一种。
所述第二粘附层402和所述第二键合层401的具体材料与结构请参考上述具体实施方式中的第一粘附层202和第一键合层201的描述，在此不再赘述。在一个具体实施方式中，所述第二粘附层402与第一粘附层202的材料、结构相同；所述第二键合层401和第一键合层201的结构、材料均相同。在一个具体实施方式中，所述第二粘附层402的厚度为第二键合层401的厚度大于/>
所述第二子键合层401与第一键合层201内均含有C，使得在键合界面上形成较多的硅氧键，具有较强的键合力。在一个具体实施方式中，所述第二子键合层401与第一键合层201之间的键合力大于1.7J/M2。
在其他具体实施方式中，所述半导体结构可以包括三个以上的基底，相邻基底之间均通过本发明具体实施方式中的粘附层和键合层进行键合。
请参考图5，为发明另一具体实施方式的半导体结构的结构示意图。
该具体实施方式中，所述半导体结构还包括：贯穿所述第一键合层201和第一粘附层202的第一键合垫501；贯穿所述第二键合层401和第二粘附层402的第二键合垫502；所述第二键合层401表面与所述第一键合层201表面相对键合固定且所述第一键合垫501与第二键合垫502相对键合连接。
所述第一键合垫501和第二键合垫502可以分别连接至所述第一器件层102和第二器件层302内的半导体器件以及金属互连层。
所述第一键合垫501和第二键合垫502的材料可以是Cu、W等金属材料。所述第一键合层201和第二键合层401内含有C，能够有效阻挡所述第一键合垫501和第二键合垫502的材料在键合界面发生扩散，从而提高所述半导体结构的性能。
请参考图6，在本发明一具体实施方式中，所述半导体结构还包括第三基底600，位于所述第三基底600的一侧表面的第三粘附层702、位于第三粘附层702表面的第三键合层701，位于第三基底600的另一侧相对表面的第四粘附层802、位于第四粘附层802表面的第四键合层801；所述第三键合层701与第一键合层201表面相对键合固定，所述第四键合层801与第二键合层401表面键合固定，构成三层键合结构。
所述第三粘附层702和第四粘附层802的材料和结构，请参考上述具体实施方式中，第一粘附层202的材料和结构，在此不再赘述。所述第三键合层701和第四键合层801的材料和结构，请参考上述具体实施方式中，第一键合层201的处理和结构，在此不再赘述。
该具体实施方式中，所述半导体结构还包括贯穿所述第三键合层701、第三粘附层702的第三键合垫703，贯穿所述第四键合层801、第四粘附层802的第四键合垫803，所述第三键合垫703与第一键合垫501键合连接，所述第四键合垫803与第二键合垫502键合连接。
在其他具体实施方式中，所述半导体结构还可以为四层以上的键合结构。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (11)

1.一种半导体结构，其特征在于，包括：
第一基底；
位于所述第一基底表面的第一粘附层；
位于所述第一粘附层表面的第一键合层，所述第一粘附层的致密度大于所述第一键合层的致密度，所述第一键合层的材料为包含C元素的介质材料，所述第一键合层中C的原子浓度随第一键合层厚度增加而增大，所述第一粘附层内的组分浓度随厚度逐渐变化，所述第一粘附层与所述第一基底界面两侧的材料组分接近；
第二基底，所述第二基底表面形成有第二粘附层和位于所述第二粘附层表面的第二键合层，所述第二粘附层的致密度大于所述第二键合层的致密度，所述第二键合层与所述第一键合层的材料相同，所述第二粘附层与所述第一粘附层的材料相同，所述第二键合层与所述第一键合层表面相对键合固定。
2.根据权利要求1所述的半导体结构，其特征在于，所述第一键合层还包括Si和N。
3.根据权利要求1所述的半导体结构，其特征在于，所述第一粘附层的材料包括氮化硅、氮氧化硅以及氧化硅中的至少一种。
4.根据权利要求1所述的半导体结构，其特征在于，所述第一粘附层的厚度为
5.根据权利要求1所述的半导体结构，其特征在于，所述第二粘附层的厚度为
6.根据权利要求1所述的半导体结构，其特征在于，还包括贯穿所述第一键合层和第一粘附层的第一键合垫；贯穿所述第二键合层和第二粘附层的第二键合垫；所述第一键合垫与第二键合垫相对键合连接。
7.一种半导体结构的形成方法，其特征在于，包括：
提供第一基底；
在所述第一基底表面形成第一粘附层；
对所述第一粘附层进行等离子体轰击，以提高致密度；
在所述第一粘附层表面形成第一键合层，所述第一粘附层的致密度大于所述第一键合层的致密度，所述第一键合层的材料为包含C元素的介质材料，所述第一键合层中C的原子浓度随第一键合层厚度增加而增大，所述第一粘附层内的组分浓度随厚度逐渐发生变化，使得所述第一粘附层与所述第一基底界面两侧的材料组分接近；
提供第二基底；
在所述第二基底表面形成第二粘附层和位于所述第二粘附层表面的第二键合层，所述第二粘附层的致密度大于所述第二键合层的致密度，所述第二键合层与所述第一键合层的材料相同，所述第二粘附层与所述第一粘附层的材料相同；
将所述第二键合层表面与所述第一键合层表面相对键合固定。
8.根据权利要求7所述的半导体结构的形成方法，其特征在于，进行所述等离子体轰击之前，所述第一粘附层含有H键；在所述等离子体轰击步骤中，采用含N等离子体进行轰击，以减少所述第一粘附层中的H键。
9.根据权利要求7所述的半导体结构的形成方法，其特征在于，所述第一键合层还包括Si和N。
10.根据权利要求7所述的半导体结构的形成方法，其特征在于，所述第一粘附层的材料包括氮化硅、氮氧化硅以及氧化硅中的至少一种。
11.根据权利要求7所述的半导体结构的形成方法，其特征在于，所述第一粘附层的厚度为
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