CN112557875B

CN112557875B - Test development method and device for selecting through AD conversion result

Info

Publication number: CN112557875B
Application number: CN202011421232.6A
Authority: CN
Inventors: 陈丽萍; 陈辉; 柳永胜; 胡峰; 白强; 唐瑜; 吴文英; 于洁
Original assignee: Suzhou Yingjiatong Semiconductor Co ltd
Current assignee: Suzhou Yingjiatong Semiconductor Co ltd
Priority date: 2020-12-08
Filing date: 2020-12-08
Publication date: 2023-02-17
Anticipated expiration: 2040-12-08
Also published as: CN112557875A

Abstract

The invention discloses a test development method and a device for selecting through an AD conversion result, which comprises a test machine for testing a chip to be tested, wherein the test machine comprises a voltage supply unit for supplying power to the chip to be tested, a measurement unit and a data processing unit, and the test unit is connected with the data processing unit; the voltage supply unit is connected with an ADC input port of the chip to be tested, and the test unit is connected with a test port of the chip to be tested. The invention effectively utilizes the characteristic that most of digital, analog or digital-analog mixed chips on the market have internal ADC modules and storage units, improves the development convenience of mass production test and reduces the mass production test cost.

Description

Test development method and device for selection through AD conversion result

Technical Field

The invention relates to a test development method and a test development device for selecting through an AD conversion result, and belongs to the technical field of chip mass production test.

Background

With the increasing scale of chip integrated circuits, more and more functions and parameters are required to be tested, and it is very important to reduce the time for mass production test and the difficulty of mass production test development as much as possible while ensuring the coverage rate of mass production test.

At present, in order to deal with the mass production Test of chips, the popular Design of chips is the Design of the Test mode of chips and the Design of inserting DFT (Design For Test), and the two modes can simplify the mass production Test development greatly, but the additionally added Design circuit can increase the Design area of chips greatly, improve the manufacturing cost of chips, and meanwhile, the two Test modes all need to occupy a certain number of Test pins of chips, and can not be applied to the chips with low cost and few pins.

Disclosure of Invention

In view of the problems in the prior art, the present invention provides a test development method and apparatus for selecting through the AD conversion result, which effectively utilizes the characteristic that most of the digital, analog or digital-analog hybrid chips on the market have internal ADC modules and memory cells, improves the development convenience of mass production tests, and reduces the cost of mass production tests.

In order to achieve the purpose, the invention adopts the following technical scheme: a testing device for selecting through an AD conversion result comprises a testing machine for testing a chip to be tested, wherein the testing machine comprises a voltage supply unit for supplying power to the chip to be tested, a measuring unit and a data processing unit, and the testing unit is connected with the data processing unit;

the chip to be tested at least comprises an ADC module, a processor, a program memory, an ADC input port and a test port, wherein the ADC input port is connected with the ADC module, the ADC module is connected with the processor, the processor is connected with the program memory, and the test port is connected with the processor and the program memory;

the voltage supply unit is connected with the input port of the ADC, and the test unit is connected with the test port.

A test method based on the test device which selects through the AD conversion result comprises the following steps:

determining ADC input voltage corresponding to each test item according to the digit and precision of AD in the chip to be tested, reference voltage and the number of the test items to be tested;

secondly, according to the selected test item to be tested, a test machine voltage providing unit inputs corresponding voltage to an ADC input port of the chip to be tested;

thirdly, the ADC module in the chip to be tested performs AD conversion on the input voltage of the ADC input port, the processor selects a test program segment in the program memory according to the result range of the AD conversion, then the selected test program segment is executed, and the running result of the program segment is sent out through the test port;

step four, the measuring unit of the tester measures the test port, and send the measured result to the data processing unit; the data processing unit judges whether the measurement result is consistent with the expected result, if so, the test item is tested correctly, otherwise, the test item is tested wrongly;

and step five, judging whether all the test items are finished by the tester, if so, finishing the test, otherwise, changing the input voltage of the input port of the ADC according to the voltage corresponding to the selected untested test item, and returning to the step two to execute corresponding operation.

Compared with the prior art, the invention can realize the selection of a plurality of test contents only by one ADC input pin, thereby greatly reducing the requirement on the number of chip test pins; the method can freely select the test content by changing the input voltage of the input pin, the test sequence of the test items can be changed at will according to the requirements, the development and debugging of mass production test programs are greatly facilitated, the development convenience of mass production tests is improved, and the mass production test cost is reduced.

Drawings

FIG. 1 is a schematic diagram of a testing apparatus according to the present invention;

FIG. 2 is a flow chart of the test development of the present invention;

FIG. 3 is a flow chart of the testing method of the present invention.

Detailed Description

The technical solutions in the implementation of the present invention will be made clear and fully described below with reference to the accompanying drawings, and the described embodiments are only a part of the embodiments of the present invention, but not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.

The invention provides a test device for selecting through an AD conversion result, which comprises a test machine for testing a chip to be tested, wherein the test machine comprises a voltage supply unit, a measurement unit and a data processing unit, the voltage supply unit is used for supplying power to the chip to be tested, and the test unit is connected with the data processing unit;

A testing method of a testing apparatus based on the selection by the AD conversion result, as shown in fig. 2 and 3, includes the steps of:

step two, according to the selected test item to be tested, a test machine voltage providing unit inputs corresponding voltage to an ADC input port of the chip to be tested;

measuring the test port by the measuring unit of the testing machine, and sending the measuring result to the data processing unit; the data processing unit judges whether the measurement result is consistent with the expected result, if so, the test item is tested correctly, otherwise, the test item is tested wrongly;

and step five, the tester judges whether all the test items are finished, if so, the test is finished, otherwise, the input voltage of the input port of the ADC is changed according to the voltage corresponding to the selected untested test item, and the test returns to the step two to execute corresponding operation, namely, the step two to the step five are repeatedly executed.

Example 1:

assuming that the ADC module in the chip to be tested is 12-bit successive approximation type AD with the AD precision of 8 bits, the minimum conversion result of the AD conversion is 0, and the maximum conversion result is 2 ¹² -1=4095, error range of conversion result-2 ⁴ ～2 ⁴ I.e., -16 to 16, the number of test items discriminated by the conversion result of the AD is at least 2 ⁷ =128; assuming that the positive reference voltage of the internal AD is 3V and the negative reference voltage is 0V, the voltage range input by the AD input port is 0V-3V, and the minimum interval of the input voltage of the test item selected by the input voltage is 24mV (3000/128 ≈ 24).

Assuming that the test items to be completed by the chip to be tested are 30 items, the numbers of the test items are respectively Ti (i = 1-30), and the input voltage interval corresponding to different test items is 100mV, the test is performed according to the following flow:

step S1, selecting test items (with the number of i = 1-30), and inputting voltage Vi =100 xi mV to the input port of the chip AD by a voltage supply unit of a test machine;

s2, triggering AD conversion by the ADC module in the chip to be tested, wherein the theoretical value of the AD conversion result is Di =100 xi/3000 4096, and the comparison result range of the AD conversion is [ (Di-16), (Di + 16) ];

s3, selecting a test program segment in the program memory of the chip to be tested by the internal processor of the chip to be tested according to the AD conversion result range in the step S2, and executing a test program segment code;

s4, the execution result of the code in the selected program segment in the step S3 is sent out through the test port;

s5, a measuring unit of the testing machine measures a testing port of the chip to be tested;

s6, comparing and judging the measurement result of the step S5 with an expected result by a data processing unit of the testing machine, and if the results are consistent, judging that the test is correct; if not, the result is wrong, and the selected test item is ended;

s7, judging whether all the test items are finished or not by the test machine, and if so, finishing all the tests; if the item is not tested, determining the number of the test item, and re-reading and executing the steps S1 to S7 until the test is finished.

In the case, the test of 128 items can be realized through one input port of the ADC, the sequence of the test items is not strictly required, and the test items can be executed in any sequence according to needs, so that the development of a test program is greatly simplified, and the debugging flexibility of the test program is increased; the input voltage interval of different test items is 100mV, the requirement on the voltage input precision of the test machine is low, common resource board cards of the test machine can provide the common resource board cards, the synchronous test of different stations is not influenced, and the quantity of the simultaneous test of the mass production test caused by the limitation of the test machine station resources is not less.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the embodiments may be appropriately combined to form other embodiments understood by those skilled in the art.

Claims

1. A test method for selecting through AD conversion results is characterized by comprising the following steps:

determining ADC input voltage corresponding to each test item according to the digit and precision of AD in a chip to be tested, reference voltage and the number of the test items to be tested;

thirdly, performing AD conversion on the input voltage of the ADC input port by an ADC module in the chip to be tested, selecting a test program segment in the program memory by the processor according to the AD conversion result range, then executing the selected test program segment, and sending out the running result of the program segment through the test port;