CN112541205B - 一种建模方法 - Google Patents
一种建模方法 Download PDFInfo
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- CN112541205B CN112541205B CN202011389935.5A CN202011389935A CN112541205B CN 112541205 B CN112541205 B CN 112541205B CN 202011389935 A CN202011389935 A CN 202011389935A CN 112541205 B CN112541205 B CN 112541205B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/10—Geometric CAD
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
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CN202011389935.5A CN112541205B (zh) | 2020-12-01 | 2020-12-01 | 一种建模方法 |
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CN202011389935.5A CN112541205B (zh) | 2020-12-01 | 2020-12-01 | 一种建模方法 |
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CN112541205A CN112541205A (zh) | 2021-03-23 |
CN112541205B true CN112541205B (zh) | 2022-12-30 |
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Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
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US8196068B2 (en) * | 2009-04-30 | 2012-06-05 | Synopsys, Inc. | Modeling critical-dimension (CD) scanning-electron-microscopy (CD-SEM) CD extraction |
US8954899B2 (en) * | 2012-10-04 | 2015-02-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contour alignment system |
WO2017114662A1 (en) * | 2015-12-31 | 2017-07-06 | Asml Netherlands B.V. | Selection of measurement locations for patterning processes |
CN110140088B (zh) * | 2016-12-28 | 2021-08-31 | Asml荷兰有限公司 | 量测图像与设计之间的模拟辅助的对准 |
CN106873315B (zh) * | 2017-03-16 | 2018-10-16 | 上海集成电路研发中心有限公司 | 一种通孔层opc建模方法 |
US10395362B2 (en) * | 2017-04-07 | 2019-08-27 | Kla-Tencor Corp. | Contour based defect detection |
US10495967B2 (en) * | 2017-09-28 | 2019-12-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of mask simulation model for OPC and mask making |
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2020
- 2020-12-01 CN CN202011389935.5A patent/CN112541205B/zh active Active
Non-Patent Citations (2)
Title |
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Weiwei Wu ; Shirui Yu ; Quan Chen ; Zhibiao Mao ; Yu Zhang.Mask corner chopping effect in OPC modeling.《2015 China Semiconductor Technology International Conference》.2015, * |
纳米级电路分辨率增强技术及可制造性设计研究;杨祎巍;《中国博士学位论文全文数据库信息科技辑》;20110815;全文 * |
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Effective date of registration: 20241106 Address after: 518111 Building 101, Zhongkegu Industrial Park, Zhonghuan Avenue, Shanxia Community, Pinghu Street, Longgang District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Pengxin Microintegrated Circuit Manufacturing Co.,Ltd. Country or region after: China Address before: Room 411-2-9, no.7617, Airport Road, high tech Zone, Jinan City, Shandong Province Patentee before: Quanxin integrated circuit manufacturing (Jinan) Co.,Ltd. Country or region before: China |