CN112510088A - Groove gate enhanced GaN-based HEMT device and preparation method thereof - Google Patents

Groove gate enhanced GaN-based HEMT device and preparation method thereof Download PDF

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CN112510088A
CN112510088A CN202011384556.7A CN202011384556A CN112510088A CN 112510088 A CN112510088 A CN 112510088A CN 202011384556 A CN202011384556 A CN 202011384556A CN 112510088 A CN112510088 A CN 112510088A
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付羿
周名兵
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Jingneng Optoelectronics Jiangxi Co ltd
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Abstract

The invention provides a groove gate enhanced GaN-based HEMT device and a preparation method thereof, wherein the HEMT device sequentially comprises a substrate layer, a buffer layer, a first pressure-resistant layer, a strip-shaped mask layer, a second pressure-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode and a grid electrode from bottom to top, wherein the strip-shaped mask layer is positioned in a preset area on the surface of the first pressure-resistant layer, a V-shaped groove is formed in the upper surface of the channel layer, and the V-shaped groove is positioned above the strip-shaped mask layer; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is located on the surface of the V-shaped groove, the grid electrode is located on the surface of the PGaN layer, and the source electrode and the drain electrode are located on the surface of the channel layer. The problem of etching damage caused by barrier etching in the conventional p-type trench gate enhanced HEMT device is effectively solved.

Description

Groove gate enhanced GaN-based HEMT device and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a trench gate enhanced GaN-based HEMT device and a preparation method thereof.
Background
Enhancement mode HEMTs have the important advantages of failure protection and simplicity of driving relative to depletion mode GaN based HEMTs. The method for realizing the enhancement type HEMT device comprises a groove gate, a p-type gate, fluorine ion implantation under the gate and cascade structure cascade. Enhancement mode HEMTs that are currently introduced for production are p-type trench gate and cascode structures, taking into account the consistency and repeatability of the production process. However, both structures have their own drawbacks, in that the cascode structure cascades the depletion mode HEMT and one low voltage MOSFET, which makes the cascode structure HEMT difficult to operate at high frequencies due to the introduction of additional power dissipation and the presence of cascaded parasitic inductance. In contrast, the design of the p-type trench gate gradually becomes the mainstream of the enhancement type HEMT device, but the AlGaN barrier layer needs to be etched and thinned by the p-type trench gate, so that the current technical difficulties exist in accurately controlling the etching depth and sufficiently repairing the etching damage. Meanwhile, the threshold voltage of the p-type trench gate is difficult to be high, which is mostly below +2V, due to the difficulty of AlGaN barrier etching.
Disclosure of Invention
In order to overcome the defects, the invention provides a trench gate enhanced GaN-based HEMT device and a preparation method thereof, which effectively solve the problem of etching damage caused by barrier etching in the conventional p-type trench gate enhanced HEMT device.
The technical scheme provided by the invention is as follows:
a groove gate enhanced GaN-based HEMT device comprises a substrate layer, a buffer layer, a first pressure-resistant layer, a strip-shaped mask layer, a second pressure-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode and a grid electrode in sequence from bottom to top, wherein the strip-shaped mask layer is positioned in a preset area on the surface of the first pressure-resistant layer, a V-shaped groove is formed in the upper surface of the channel layer, and the V-shaped groove is positioned above the strip-shaped mask layer; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is located on the surface of the V-shaped groove, the grid electrode is located on the surface of the PGaN layer, and the source electrode and the drain electrode are located on the surface of the channel layer.
A preparation method of a trench gate enhanced GaN-based HEMT device comprises the following steps:
sequentially epitaxially growing a buffer layer and a first pressure-resistant layer on the surface of the substrate layer;
growing a strip-shaped mask material on the surface of the first pressure-resistant layer, and forming a strip-shaped mask layer at a preset position by a photoetching method;
further growing a second voltage-resisting layer;
forming a channel layer with a V-shaped groove on the upper surface of the growth layer on the surface of the second voltage-resistant layer;
forming a barrier layer on the surface of the channel layer, photoetching the barrier layer to reserve a region for forming a source electrode and a drain electrode on the surface of the barrier layer, wherein the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer;
epitaxially growing a PGaN layer on the surface of the barrier layer V-shaped groove;
and respectively forming a source electrode and a drain electrode on the surface of the barrier layer, and forming a grid electrode on the surface of the PGaN layer to finish the preparation of the HEMT device.
According to the groove gate enhanced GaN-based HEMT device and the preparation method thereof, the semi-polar grooves are formed on the upper surface of the channel layer and the barrier layer in a mask mode, and then pGaN is selectively grown on the V-shaped groove. The V-shaped gate on the surface of the prepared HEMT device and the pGaN on the V-shaped gate can avoid the problems of etching damage and etching depth control caused by barrier etching, and ensure that the damage can not occur in the etching process. In addition, the AlGaN barrier layer in the V-shaped groove is thin and has low polarization intensity and semipolarity, so that the threshold voltage of the enhancement HEMT can be improved, and the problem that the gate threshold voltage of the existing p-shaped groove is low is effectively solved.
Drawings
Fig. 1 is a schematic structural view of a trench gate enhanced GaN-based HEMT device of the present invention.
Reference numerals:
101-a substrate layer, 102-a buffer layer, 103-a first voltage-proof layer, 104-a strip mask layer, 105-a second voltage-proof layer, 106-a channel layer, 107-a barrier layer and 108-a PGaN layer.
Detailed Description
In order to more clearly illustrate the embodiment of the present invention or the technical solutions in the prior art, the following description will explain embodiments of the present invention with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.
As shown in fig. 1, which is a schematic structural diagram of a trench gate enhancement type GaN-based HEMT device provided by the present invention, it can be seen from the diagram that the HEMT device sequentially includes, from bottom to top, a substrate layer, a buffer layer, a first voltage-resistant layer, a strip-shaped mask layer, a second voltage-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode, and a gate electrode, wherein the strip-shaped mask layer is located in a preset region on the surface of the first voltage-resistant layer, the upper surface of the channel layer is provided with a V-shaped groove; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is located on the surface of the V-shaped groove, the grid electrode is located on the surface of the PGaN layer, and the source electrode and the drain electrode are located on the surface of the channel layer.
In the HEMT device, the substrate layer may be a semiconductor common substrate such as a silicon substrate, a sapphire substrate, or a SiC substrate. The buffer layer comprises structures of GaN, AlN/AlGaN and the like so as to release stress and transition to a later voltage-proof layer. The first voltage-resistant layer is Al doped with carbon (including inner and outer doping) or ironxGa1-xAnd the layer N, wherein x is more than or equal to 0 and less than or equal to 0.1. The strip-shaped mask layer is SiO2Layer or SiNxLayer and edge of the surface of the first voltage-withstanding layer<1120>Or<1100>The width is 2 to 10 μm. The second voltage-resistant layer is a GaN layer doped with carbon or iron and is grown in an MOCVD or HVPE mode. The upper surface of the channel layer (the unintentionally doped GaN layer) comprises a V-shaped groove, the barrier layer grown on the surface of the channel layer with the V-shaped groove also comprises the V-shaped groove, the surface in the V-shaped groove is a semipolar surface, and the thickness of the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface ((0001) surface) of the channel layer. The barrier layer is AlxGa1-xN layer, 0.1<x<0.4. It should be clear that the thickness of the respective layer structure is not limited herein, and can be adjusted according to the practical application.
The preparation of this HEMT is illustrated below by way of example:
firstly, putting a sapphire substrate with a (0001) crystal orientation into an MOCVD reaction chamber, firstly processing the substrate at a high temperature, and then growing a buffer layer, wherein the method comprises the following steps: growing a low-temperature GaN layer with the thickness of 400nm under the conditions of 500torr pressure and 550 ℃ and growing a high-temperature GaN layer with the thickness of 1500nm under the conditions of 200torr and 1050 ℃; then changing the growth conditions of gallium nitride with the atmosphere of 100torr pressure and 1050 ℃, introducing propane, and growing a 1000nm externally-doped high-resistance gallium nitride pressure-resistant layer (a first pressure-resistant layer); then, growing a strip-shaped SiNx mask layer on the pressure-resistant layer by a mask photoetching method; changing the conditions to the growth conditions of the second voltage-resistant layer, and continuing growing a growth high-resistance gallium nitride voltage-resistant layer of 2000nm in the MOCVD; then, growing a 300nm undoped GaN channel layer on the pressure-resistant layer at 1050 ℃ at 200torr, wherein a V-shaped groove is formed in the upper surface of the GaN channel layer grown above the strip SiNx mask layer; next, growing a 20nm AlGaN barrier layer with 25% Al composition on the GaN channel layer, wherein the AlGaN barrier layer also has a V-shaped groove, the inner surface of the V-shaped groove is a (11-20) semipolar surface, and the thickness is 1/3 of the AlGaN barrier layer with a (0001) surface; after that, pGaN with a Mg-doped concentration of 2e20 was grown on the AlGaN barrier layer at 950 ℃ under a changed condition to 200 torr. And finally, forming a source S, a drain D and a grid G by photoetching, developing and evaporating.
The V-shaped AlGaN barrier layer on the surface of the HEMT formed by the growth method can effectively avoid AlGaN etching, and the AlGaN in the V-shaped groove is very thin, so that the threshold voltage of the enhanced HEMT can be improved.
It should be noted that the above embodiments can be freely combined as necessary. The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (10)

1. The groove gate enhanced GaN-based HEMT device is characterized by sequentially comprising a substrate layer, a buffer layer, a first voltage-resistant layer, a strip-shaped mask layer, a second voltage-resistant layer, a channel layer, a barrier layer, a PGaN layer, a source electrode, a drain electrode and a gate electrode from bottom to top, wherein the strip-shaped mask layer is positioned in a preset area on the surface of the first voltage-resistant layer, a V-shaped groove is formed in the upper surface of the channel layer, and the V-shaped groove is positioned above the strip-shaped mask layer; the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer; the PGaN layer is located on the surface of the V-shaped groove, the grid electrode is located on the surface of the PGaN layer, and the source electrode and the drain electrode are located on the surface of the channel layer.
2. The HEMT device of claim 1, wherein said strip-like mask layer is SiO2Layer or SiNxAnd (3) a layer.
3. The HEMT device of claim 1 or 2, wherein said strip-like mask layer has a width in the <1120> or <1100> direction of 2 to 10 μm.
4. The HEMT device of claim 1, wherein said first voltage barrier is carbon-doped or iron-doped AlxGa1- xAnd the layer N, wherein x is more than or equal to 0 and less than or equal to 0.1.
5. The HEMT device of claim 1,
the second voltage-resistant layer is a GaN layer doped with carbon or iron; and/or the presence of a gas in the gas,
the channel layer is an unintentional doped GaN layer; and/or the presence of a gas in the gas,
the barrier layer is AlxGa1-xN layer, 0.1<x<0.4。
6. A preparation method of a trench gate enhanced GaN-based HEMT device is characterized by comprising the following steps:
sequentially epitaxially growing a buffer layer and a first pressure-resistant layer on the surface of the substrate layer;
growing a strip-shaped mask material on the surface of the first pressure-resistant layer, and forming a strip-shaped mask layer at a preset position by a photoetching method;
further growing a second voltage-resisting layer;
forming a channel layer with a V-shaped groove on the upper surface of the growth layer on the surface of the second voltage-resistant layer;
forming a barrier layer on the surface of the channel layer, photoetching the barrier layer to reserve a region for forming a source electrode and a drain electrode on the surface of the barrier layer, wherein the thickness of the barrier layer in the V-shaped groove is 1/2-1/5 of the thickness of the horizontal surface of the channel layer;
epitaxially growing a PGaN layer on the surface of the barrier layer V-shaped groove;
and respectively forming a source electrode and a drain electrode on the surface of the barrier layer, and forming a grid electrode on the surface of the PGaN layer to finish the preparation of the HEMT device.
7. The method for manufacturing an HEMT device according to claim 6, wherein said strip-like mask layer is SiO2Layer or SiNxAnd (3) a layer.
8. The method for manufacturing a HEMT device according to claim 6 or 7, wherein said strip-like mask layer has a width in the direction of <1120> or <1100> of 2 to 10 μm.
9. The method of claim 6, wherein the first voltage withstanding layer is Al doped with carbon or ironxGa1-xAnd the layer N, wherein x is more than or equal to 0 and less than or equal to 0.1.
10. The method for manufacturing an HEMT device according to claim 6,
the second voltage-resistant layer is a GaN layer doped with carbon or iron; and/or the presence of a gas in the gas,
the channel layer is an unintentional doped GaN layer; and/or the presence of a gas in the gas,
the barrier layer is AlxGa1-xN layer, 0.1<x<0.4。
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