CN112491437A - Radio frequency front-end circuit with multiple antenna modes and integrated circuit module - Google Patents
Radio frequency front-end circuit with multiple antenna modes and integrated circuit module Download PDFInfo
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- CN112491437A CN112491437A CN202011192452.6A CN202011192452A CN112491437A CN 112491437 A CN112491437 A CN 112491437A CN 202011192452 A CN202011192452 A CN 202011192452A CN 112491437 A CN112491437 A CN 112491437A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/401—Circuits for selecting or indicating operating mode
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/06—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station
- H04B7/0602—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the transmitting station using antenna switching
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
Abstract
The invention discloses a radio frequency front-end circuit with multiple antenna modes, which comprises: the device comprises a radio frequency signal input end, a first isolator, a first temperature compensator, a push-stage amplifier, a first filter, a single-pole N-throw switch and N paths of parallel transmitting channels, wherein each path of transmitting channel comprises a final amplifier, a double-section circulator, a second filter and an antenna which are sequentially connected; each path of transmitting channel is correspondingly connected with a receiving channel through a double-section circulator; the single-pole N-throw switch is used for selecting one output port to be connected with the input port and outputting a received radio frequency signal, and an antenna in a transmitting channel which is not conducted by the single-pole N-throw switch receives an input signal and transmits the input signal to a corresponding receiving channel; the single-pole N-throw switch comprises a coupling inductance circuit and a transistor control circuit, wherein the coupling inductance circuit is used for realizing port isolation, and the transistor control circuit is used for adjusting the load of a conducted output port. The invention realizes the parallel receiving and transmitting of multiple antennae in the radio frequency front end circuit and meets the requirements of low insertion loss and high isolation.
Description
Technical Field
The invention belongs to the field of circuits, and particularly relates to a radio frequency front-end circuit with multiple antenna modes and an integrated circuit module.
Background
In the field of communication, the radio frequency front-end circuit mainly functions to amplify small signal power and then radiate the amplified small signal through an antenna, or amplify the small signal received by the antenna through a low noise amplifier and transmit the amplified small signal to a baseband signal circuit for processing. The rf front-end circuit generally employs multiple antennas to transmit and receive signals. One of the more common antenna operation modes is a half-duplex communication mode in which information is transmitted and received in a time-division manner.
However, in the current whole machine system, it is often necessary to implement a parallel transceiving function, that is, while the transmitting signal is switched to a different antenna to complete transmitting, other antennas can be used to implement signal receiving. Further, it is necessary to minimize signal loss while performing the above functions, which requires improvement of circuit isolation and reduction of insertion loss.
Therefore, how to implement a multi-antenna mode rf front-end circuit that satisfies the above-mentioned needs is a problem to be solved in the art.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a multi-antenna mode rf front-end circuit and an integrated circuit module. The technical problem to be solved by the invention is realized by the following technical scheme:
in a first aspect, an embodiment of the present invention provides a radio frequency front end circuit with multiple antenna modes, including:
the device comprises a radio frequency signal input end, a first isolator, a first temperature compensator, a push-stage amplifier, a first filter, a single-pole N-throw switch and N paths of transmitting channels which are connected in parallel, wherein each path of transmitting channel is connected with one output port of the single-pole N-throw switch, and each path of transmitting channel comprises a final-stage amplifier, a double-section circulator, a second filter and an antenna which are connected in sequence; each transmitting channel is correspondingly connected with a receiving channel through the double-section circulator and used for receiving input signals of the antenna corresponding to the transmitting channel;
the single-pole N-throw switch is used for selecting one output port to be connected with the input port and outputting a received radio-frequency signal so as to realize the conduction of one transmitting channel, and an antenna in the transmitting channel which is not conducted by the single-pole N-throw switch receives an input signal and transmits the input signal to a corresponding receiving channel; the single-pole N-throw switch comprises a coupling inductance circuit and a transistor control circuit, wherein the coupling inductance circuit is used for realizing port isolation, and the transistor control circuit is used for adjusting the load of a conducted output port; n is a natural number greater than 3.
Optionally, the receiving channel includes:
the temperature-controlled double-section circulator comprises an amplitude limiter, a low noise amplifier, a second temperature compensator, a second isolator and a received signal output end which are connected in sequence, wherein the input end of the amplitude limiter is connected with one output end of the double-section circulator.
Optionally, N is 4;
the single-pole, N-throw switch further comprises:
an input port, a first output port, a second output port, a third output port, and a fourth output port;
a coupling inductor circuit including a first inductor winding, a second inductor winding, and a third inductor winding, the first inductor winding being connected to the input port, the second inductor winding being connected between the first output port and the second output port, the third inductor winding being connected between the third output port and the fourth output port;
the transistor control circuit comprises an nth control circuit which is respectively connected with the first output port, the second output port, the third output port and the fourth output port, wherein n is one to four in sequence; the transistor control circuit selects one output port to be conducted with the input port based on the level signals of the control circuits, and configures the load of the output port by using the inductance coils connected with the output ports and the control circuits connected with the other output ports except the output port to realize the load matching of the output port.
Optionally, the single-pole N-throw switch further includes:
the control port group comprises a first control port, a second control port, a third control port and a fourth control port, the first control port is connected with the first control circuit, the second control port is connected with the second control circuit, the third control port is connected with the third control circuit, the fourth control port is connected with the fourth control circuit, and the control port group is used for providing level signals for the transistor control circuit.
Optionally, the nth control circuit includes: the transistor comprises an nth transistor, an nth grid bias resistor and an nth external resistor between the sources of the nth transistor, wherein the nth grid bias resistor is connected between the grid of the nth transistor and the nth control port, the drain of the nth transistor is connected with the nth output port in parallel, the source of the nth transistor is grounded, one end of the nth external resistor is connected with the substrate of the nth transistor, and the other end of the nth external resistor is grounded.
Optionally, the first control port provides a first level signal, the second control port, the third control port and the fourth control port provide a second level signal, the first transistor switch is turned off, the second transistor, the third transistor and the fourth transistor switch are turned on, and the input port and the first output port are turned on.
Optionally, the second control port provides a first level signal, the first control port, the third control port and the fourth control port provide a second level signal, the second transistor switch is turned off, the first transistor, the third transistor and the fourth transistor switch are turned on, and the input port and the second output port are turned on.
Optionally, the third control port provides a first level signal, the first control port, the second control port and the fourth control port provide a second level signal, the third transistor switch is turned off, the first transistor, the second transistor and the fourth transistor switch are turned on, and the input port and the third output port are turned on.
Optionally, the fourth control port provides a first level signal, the first control port, the second control port and the third control port provide a second level signal, the first transistor, the second transistor and the third transistor switch are turned on, the fourth transistor switch is turned off, and the input port and the fourth output port are turned on.
In a second aspect, an embodiment of the present invention provides an integrated circuit module, including: the rf front-end circuit of any of the above multiple antenna modes.
According to the radio frequency front-end circuit with the multiple antenna modes, provided by the embodiment of the invention, different radio frequency signals can be switched to the antenna corresponding to the transmitting channel for transmitting by switching the single-pole N-throw switch at the last front stage, and the signals can be radiated outwards in a time-sharing manner when the whole machine works; each antenna is provided with an independent receiving channel, so that when one antenna radiates signals outwards, other receiving channels receive multidirectional information normally and simultaneously, receiving and sending parallel processing is realized, and a half-duplex working mode in a multi-antenna mode can be completed, namely when radio-frequency signals are transmitted through one antenna, the real-time signal receiving function is realized by using other antennas. Therefore, data chain networking communication can be completed, and a real-time hardware platform is provided for data distribution. In addition, the single-pole N-throw switch at the last stage is a low-power switch, so that the switching noise in a channel can be reduced, and the switching speed is improved; each single-pole N-throw switch realizes port isolation by using a coupling inductance circuit, can improve isolation, and can achieve the purpose of reducing insertion loss by using a transistor control circuit to adjust the load of a conducted output port to realize load matching.
Of course, not all of the advantages described above need to be achieved at the same time in the practice of any one product or method of the invention.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
Fig. 1 is a schematic structural diagram of a radio frequency front end circuit with multiple antenna modes according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a receiving channel of a multi-antenna mode rf front-end circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a single-pole four-throw switch of a multi-antenna mode rf front-end circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a single-pole four-throw switch of a multi-antenna mode rf front-end circuit according to an embodiment of the present invention;
fig. 5 to 8 are equivalent circuit diagrams of a single-pole four-throw switch of a multi-antenna mode rf front-end circuit according to an embodiment of the present invention under different signal levels.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
In order to realize multi-antenna transceiving parallelism in a radio frequency front-end circuit, low insertion loss and high isolation are met. The embodiment of the invention provides a radio frequency front-end circuit with multiple antenna modes and an integrated circuit module. Next, the rf front-end circuit of the multi-antenna mode will be described first.
In a first aspect, an embodiment of the present invention provides a radio frequency front end circuit with multiple antenna modes. Referring to fig. 1, fig. 1 is a schematic structural diagram of a multi-antenna mode rf front-end circuit according to an embodiment of the present invention, including:
the radio frequency signal processing circuit comprises a radio frequency signal input end 1, a first isolator 2, a first temperature compensator 3, a push stage amplifier 4, a first filter 5, a single-pole N-throw switch 6 and N paths of parallel transmitting channels which are connected in sequence, wherein each path of transmitting channel is connected with one output port of the single-pole N-throw switch 6 and comprises a final amplifier 7, a double-section circulator 8, a second filter 9 and an antenna 10 which are connected in sequence; each path of transmitting channel is correspondingly connected with a receiving channel through the double-section circulator 8 and used for receiving input signals of the antenna 10 corresponding to the path of transmitting channel;
the single-pole N-throw switch 6 is used for selecting one output port to be connected with the input port and outputting a received radio frequency signal so as to realize the conduction of a transmitting channel, and an antenna 10 in the transmitting channel which is not conducted by the single-pole N-throw switch 6 receives an input signal and transmits the input signal to a corresponding receiving channel; the single-pole N-throw switch 6 comprises a coupling inductance circuit and a transistor control circuit, the coupling inductance circuit is used for realizing port isolation, and the transistor control circuit is used for adjusting the load of a conducted output port; n is a natural number greater than 3.
In the following, the components in the present embodiment are described in conjunction with a signal transmission process and a signal reception process:
radio frequency signals are input through a radio frequency signal input end 1, matched with the input end through a first isolator 2 and then subjected to temperature compensation through a first temperature compensator 3, and device working state drift and signal loss caused by temperature change are reduced; then primary power amplification is carried out through a push-stage amplifier 4; then, the signal enters a first filter 5 to primarily filter the bottom noise signals outside the communication frequency band amplified by the front stage channel; then, the radio-frequency signals enter an input port of a single-pole N-throw switch 6, one of N output ports of the single-pole N-throw switch 6 is selected to be connected with the input port, switch conduction is achieved, the received radio-frequency signals are switched to different transmitting channels, one transmitting channel is conducted, and the radio-frequency signals enter a final-stage amplifier 7 in the conducted transmitting channel to be subjected to power amplification; then, the good output end matching and port isolation are ensured through the double-section circulator 8; and then the clutter signals are filtered by a second filter 9, and finally the clutter signals are transmitted out through an antenna 10.
Because each antenna 10 has an independent corresponding receiving channel, when one of the transmitting channels is conducted with the radio-frequency signal for transmission, the antenna 10 in the transmitting channel where the single-pole N-throw switch 6 is not conducted can receive the input signal and transmit the input signal to the corresponding receiving channel; specifically, after receiving an input signal, an antenna 10 performs filtering processing through a second filter 9 in a corresponding transmitting channel, and then transmits the input signal to a receiving channel corresponding to the antenna 10 through an output port connected to the receiving channel in the two-section circulator 8. The processing of the input signal by the receiving channel mainly includes power amplification, filtering, and the like. It will be appreciated by those skilled in the art that the second filter 9 and the double section circulator 8 may also be considered as part of the receive path. In the embodiment of the present invention, when the single-pole multi-throw switch 6 gates a certain transmission channel to send out a radio frequency signal, the remaining multi-path antennas can receive input signals in different directions at the same time, and it can be understood that the antennas for sending out the radio frequency signal cannot receive the input signals at the same time.
In an alternative implementation manner, referring to fig. 2, fig. 2 is a schematic structural diagram of a receiving channel of a radio frequency front-end circuit with multiple antenna modes according to an embodiment of the present invention; the receiving channel includes:
the device comprises a limiter 11, a low noise amplifier 12, a second temperature compensator 13, a second isolator 14 and a received signal output end 15 which are connected in sequence, wherein the input end of the limiter 11 is connected with one output end of the double-section circulator 8.
For the receiving channel, the working process comprises the following steps: after passing through the second filter 9, the signal received by the antenna 10 enters the amplitude limiter 11 through the double-section circulator 8, and after passing through the low noise amplifier 12, the second temperature compensator 13 and the second isolator 14, the signal is output to the received signal output terminal 15 for subsequent baseband signal processing and the like.
Note that the output terminal of the two-stage circulator 8 connected to the input terminal of the limiter 11 is the other port than the port at which the two-stage circulator 8 is connected to the final amplifier 7 and the second filter 9. For the functions of the modules in the receiving channel, please refer to the prior art for understanding, and the detailed description is omitted here.
A supplementary explanation is made for a single-pole N-throw switch in an embodiment of the present invention, which has an input port and N output ports, each of which is connected to a final amplifier 7 in a transmission channel; and each single-pole N-throw switch comprises a coupling inductance circuit and a transistor control circuit, the coupling inductance circuit is used for realizing the isolation among all ports, the isolation degree can be improved, the load of the conducted output port is adjusted by using a load switching technology, the load matching is realized, and the purpose of reducing the insertion loss can be achieved. Moreover, the single-pole N-throw switch is located at the output end of the push-stage power amplifier 5, and the received signal power is small, so that compared with a high-power switch, the single-pole N-throw switch in the embodiment of the invention can reduce the switching noise in a channel, improve the switching speed, and has a fast switching capability.
According to the radio frequency front-end circuit with the multiple antenna modes, provided by the embodiment of the invention, different radio frequency signals can be switched to the antenna corresponding to the transmitting channel for transmitting by switching the single-pole N-throw switch at the last front stage, and the signals can be radiated outwards in a time-sharing manner when the whole machine works; each antenna is provided with an independent receiving channel, so that when one antenna radiates signals outwards, other receiving channels receive multidirectional information normally and simultaneously, receiving and sending parallel processing is realized, and a half-duplex working mode in a multi-antenna mode can be completed, namely when radio-frequency signals are transmitted through one antenna, the real-time signal receiving function is realized by using other antennas. Therefore, data chain networking communication can be completed, and a real-time hardware platform is provided for data distribution. In addition, the single-pole N-throw switch at the last stage is a low-power switch, so that the switching noise in a channel can be reduced, and the switching speed is improved; each single-pole N-throw switch realizes port isolation by using a coupling inductance circuit, can improve isolation, and can achieve the purpose of reducing insertion loss by using a transistor control circuit to adjust the load of a conducted output port to realize load matching.
In order to facilitate understanding of the structure and the working principle of the single-pole N-throw switch provided in the embodiment of the present invention, the following description is specifically provided for the structure of the single-pole N-throw switch in the embodiment of the present invention, and the remaining structures in the radio frequency front-end circuit in the multiple antenna mode are not repeated. Referring to fig. 3, fig. 3 is a schematic structural diagram of a single-pole four-throw switch of a multi-antenna mode rf front-end circuit according to an embodiment of the present invention; fig. 3 is specifically illustrated with N being 4, i.e., the single-pole, four-throw switch in fig. 3 represents the single-pole, N-throw switch 6 of the present embodiment. The remaining values of N are understood with reference to fig. 3.
In an alternative embodiment, the single pole, four throw switch includes:
an input port P1, a first output port P2, a second output port P3, a third output port P4, and a fourth output port P5;
a coupled inductor circuit 100, including a first inductor L1, a second inductor L2, and a third inductor L3, wherein the first inductor L1 is connected to the input port P1, the second inductor L2 is connected between the first output port P2 and the second output port P3, and the third inductor L3 is connected between the third output port P4 and the fourth output port P5; it can be understood that the coupled inductor circuit 100 can isolate the input port P1, the first output port P2, the second output port P3, the third output port P4 and the fourth output port P5 by using the inductors, so as to improve the isolation between the ports.
The transistor control circuit comprises an nth control circuit which is respectively connected with the first output port P2, the second output port P3, the third output port P4 and the fourth output port P5, wherein n is one to four in sequence; that is, the transistor control circuit includes a first control circuit 110, a second control circuit 120, a third control circuit 130, and a fourth control circuit 140. The first control circuit 110 is connected to the first output port P2, the second control circuit 120 is connected to the second output port P3, the third control circuit 130 is connected to the third output port P4, and the fourth control circuit 140 is connected to the fourth output port P5. The transistor control circuit selects one output port to be conducted with the input port based on the level signals of the control circuits, and configures the load of the output port by using the inductance coils connected with the output ports and the control circuits connected with the other output ports except the output port to realize the load matching of the output port.
The first control circuit 110, the second control circuit 120, the third control circuit 130, and the fourth control circuit 140 are configured with corresponding level signals, and different operating states can be realized under different level signals. In the embodiment of the present invention, the level signals of the control circuits may be configured to control the operating states thereof, so that one output port is selected to be conducted with the input port P1 among the second output port P3, the third output port P4, and the fourth output port P5, thereby achieving the purpose of conducting one transmitting channel. After a certain output port is turned on, the load of the turned-on output port is configured by the control circuit to which the second inductor L2, the third inductor L3, and the other ungated output ports are connected, so that the load matching of the turned-on output port is realized. According to the embodiment of the invention, the configured output loads are different aiming at different conducted output ports, so that the insertion loss of each conducted transmitting channel can be reduced.
Moreover, the λ/4 transmission line is usually adopted in the field for load matching, but it requires a large layout area, which is not favorable for on-chip integration. However, the embodiment of the invention realizes load matching by using the inductance coil and the control circuit, thereby reducing the area, being beneficial to on-chip integration and realizing a miniaturized switch.
The single-pole N-throw switch in the radio-frequency front-end circuit with the multiple antenna modes, provided by the embodiment of the invention, can realize high isolation between the ports by utilizing the multiple inductance coils, and can select one output port to realize switching of a transmitting channel based on level signals of the control circuits. And aiming at different conducted output ports, the output load of the output port is correspondingly configured by utilizing a load switching technology so as to realize load matching and achieve the purpose of reducing the insertion loss, so that the multi-antenna mode radio frequency front-end circuit provided by the embodiment of the invention can be ensured to have low insertion loss and high isolation performance.
Referring to fig. 4, please refer to fig. 4, which is a schematic diagram illustrating a specific structure of a single-pole, four-throw switch in a multi-antenna mode rf front-end circuit according to an embodiment of the present invention. Please refer to fig. 4 for understanding the case where N is the remaining value, which is not described herein again.
In an optional embodiment, the single-pole four-throw switch in the embodiment of the present invention further includes:
the control port group comprises a first control port V1, a second control port V2, a third control port V3 and a fourth control port V4, the first control port V1 is connected with the first control circuit, the second control port V2 is connected with the second control circuit, the third control port V3 is connected with the third control circuit, the fourth control port V4 is connected with the fourth control circuit, and the control port group is used for providing a level signal for the transistor control circuit.
Optionally, the nth control circuit includes: the n-th external resistor Rsub n is arranged between the source electrode of the n-th transistor Mn, the n-th gate bias resistor Rn and the n-th control port Vn, the drain electrode of the n-th transistor Mn is connected with the n-th output port in parallel, the source electrode of the n-th transistor Mn is grounded, one end of the n-th external resistor Rsub n is connected with the substrate of the n-th transistor Mn, and the other end of the n-th external resistor Rsub n is grounded.
Specifically, when n sequentially corresponds to one to four, the nth control circuit corresponds to the first control circuit 110, the second control circuit 120, the third control circuit 130 and the fourth control circuit 140. The first control port V1, the second control port V2, the third control port V3 and the fourth control port V4 provide level signals to the first control circuit 110, the second control circuit 120, the third control circuit 130 and the fourth control circuit 140, respectively.
Then, a specific structure corresponding to the aforementioned nth control circuit is as follows:
the first control circuit 110 includes a first transistor M1, a first gate bias resistor R1, and a first external resistor Rsub1 between the sources of the first transistor M1, the first gate bias resistor R1 is connected between the gate of the first transistor M1 and the first control port V1, the drain of the first transistor M1 is connected in parallel with the first output port P2, the source of the first transistor M1 is grounded, one end of the first external resistor Rsub1 is connected to the substrate of the first transistor M1, and the other end of the first external resistor Rsub1 is grounded.
The second control circuit 120 includes a second transistor M2, a second gate bias resistor R2, and a second external resistor Rsub2 coupled between the sources of the second transistor M2, the second gate bias resistor R2 is coupled between the gate of the second transistor M2 and the second control port V2, the drain of the second transistor M2 is coupled in parallel to the second output port P3, the source of the second transistor M2 is grounded, one end of the second external resistor Rsub2 is coupled to the substrate of the second transistor M2, and the other end of the second external resistor Rsub2 is grounded.
The third control circuit 130 includes a third transistor M3, a third gate bias resistor R3, and a third external resistor Rsub3 between the sources of the third transistor M3, the third gate bias resistor R3 is connected between the gate of the third transistor M3 and the third control port V3, the drain of the third transistor M3 is connected in parallel with the third output port P4, the source of the third transistor M3 is grounded, one end of the third external resistor Rsub3 is connected to the substrate of the third transistor M3, and the other end of the third external resistor Rsub3 is grounded.
The fourth control circuit 140 includes a fourth transistor M4, a fourth gate bias resistor R4, and a fourth external resistor Rsub4 coupled between the sources of the fourth transistor M4, the fourth gate bias resistor R4 is coupled between the gate of the fourth transistor M4 and the fourth control port V4, the drain of the fourth transistor M4 is coupled in parallel to the fourth output port P5, the source of the fourth transistor M4 is grounded, one end of the fourth external resistor Rsub4 is coupled to the substrate of the fourth transistor M4, and the other end of the fourth external resistor Rsub4 is grounded.
It should be noted that the first gate bias resistor R1, the second gate bias resistor R2, the third gate bias resistor R3 and the fourth gate bias resistor R4 are used to improve the signal isolation.
The first external resistor Rsub1, the second external resistor Rsub2, the third external resistor Rsub3, and the fourth external resistor Rsub4 are used to reduce the resistance of the substrate of the transistor connected thereto, and can reduce the insertion loss.
Further, the single-pole four-throw switch provided by the embodiment of the invention further comprises: one end of a bypass capacitor C1 and one end of a bypass capacitor C1 are connected with the first inductance coil L1, and the other end of the bypass capacitor C1 is grounded.
As will be understood by those skilled in the art, the bypass capacitor can bypass and filter out high-frequency components in an alternating current signal mixed with high-frequency current and low-frequency current, and can filter out high-frequency noise in the signal at the input port P1 as a filtering object and high-frequency noise carried by a preceding stage.
Several operating states of the single pole, four throw switch of the embodiments of the present invention are described below to facilitate an understanding of the operating principles of the single pole, four throw switch of the present invention.
Fig. 5 to 8 are equivalent circuit diagrams of a single-pole four-throw switch of a multi-antenna mode rf front-end circuit according to an embodiment of the present invention under different signal levels. For simplicity, the connection relationship between other modules of the rf front-end circuit in the multi-antenna mode and the single-pole four-throw switch is not shown in the figure.
The level signal is a signal represented by a level value, and includes a high level "1" and a low level "0". The following describes each state separately:
1) the first control port V1 provides a first level signal, the second control port V2, the third control port V3 and the fourth control port V4 provide a second level signal, the first transistor M1 switch is turned off, the second transistor M2, the third transistor M3 and the fourth transistor M4 switch are turned on, and the input port P1 and the first output port P2 are turned on.
The optional implementation mode is as follows: the first level signal is low, such as 0; the second level signal is high, for example, 1. Fig. 5 shows an equivalent circuit diagram in this state.
Since the first control port V1 is supplied with a low level, the level signal of the first control circuit 110 is also low, and since the second control port V2, the third control port V3, and the fourth control port V4 are supplied with a high level, the level signals of the second control circuit 120, the third control point 130, and the fourth control circuit 140 are also high. It is understood by those skilled in the art that, according to the operation principle of the transistors, the first transistor M1 is turned off, the first transistor M1 is equivalent to the transistor off capacitor Coff1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are turned on, the second transistor M2 is equivalent to the transistor on resistor Ron2, the third transistor M3 is equivalent to the transistor on resistor Ron3, and the fourth transistor M4 is equivalent to the transistor on resistor Ron4, and the parasitic capacitance of the second transistor M2, the parasitic capacitance of the third transistor M3 and the parasitic capacitance of the fourth transistor M4 are also included. As will be understood by those skilled in the art, in this case, the transistor off capacitor Coff1 is equivalent to a bypass capacitor of the first output port P2, and the level signal is transmitted from the input port P1 to the first output port P2; the transistor on-resistance Ron2 is equivalent to the load of the second output port P3, and the transistor on-resistance Ron2 shorts the second output port P3 to ground, so the input port P1 is disconnected from the second output port P3; the transistor on-resistance Ron3 is equivalent to the load of the third output port P4, and the transistor on-resistance Ron3 shorts the third output port P4 to ground, so the input port P1 is disconnected from the third output port P4; the transistor on-resistance Ron4 is equivalent to the load of the fourth output port P5, and the transistor on-resistance Ron4 shorts the fourth output port P5 to ground, so the input port P1 is disconnected from the fourth output port P5. The second inductor L2, the third inductor L3, the parasitic capacitance of the second transistor M2, the parasitic capacitance of the third transistor M3, and the parasitic capacitance of the fourth transistor M4 serve as loads of the first output port P2.
2) The second control port V2 provides a first level signal, the first control port V1, the third control port V3 and the fourth control port V4 provide a second level signal, the switch of the second transistor M2 is turned off, the switches of the first transistor M1, the third transistor M3 and the fourth transistor M4 are turned on, and the input port P1 and the second output port P3 are turned on.
The optional implementation mode is as follows: the first level signal is low, such as 0; the second level signal is high, for example, 1. Fig. 6 shows an equivalent circuit diagram in this state.
Since the second control port V2 is supplied with a low level, the level signal of the second control circuit 120 is also low, and since the first control port V1, the third control port V3, and the fourth control port V4 are supplied with a high level, the level signals of the first control circuit 110, the third control point 130, and the fourth control circuit 140 are also high. It is understood by those skilled in the art that, according to the operation principle of the transistors, the switch of the second transistor M2 is turned off, the switch of the second transistor M2 is equivalent to the transistor off capacitor Coff2, the switch of the first transistor M1, the switch of the third transistor M3 and the switch of the fourth transistor M4 is turned on, the switch of the first transistor M1 is equivalent to the transistor on resistor Ron1, the switch of the third transistor M3 is equivalent to the transistor on resistor Ron3, and the switch of the fourth transistor M4 is equivalent to the transistor on resistor Ron4, and the parasitic capacitance of the first transistor M1, the parasitic capacitance of the third transistor M3 and the parasitic capacitance of the fourth transistor M4 are also included. At this time, the transistor off capacitor Coff2 is equivalent to a bypass capacitor of the second output port P3, and the level signal is transmitted from the input port P1 to the second output port P3; the transistor on-resistance Ron1 is equivalent to the load of the first output port P2, and the transistor on-resistance Ron1 shorts the first output port P2 to ground, so the input port P1 is disconnected from the first output port P2; the transistor on-resistance Ron3 is equivalent to the load of the third output port P4, and the transistor on-resistance Ron3 shorts the third output port P4 to ground, so the input port P1 is disconnected from the third output port P4; the transistor on-resistance Ron4 is equivalent to the load of the fourth output port P5, and the transistor on-resistance Ron4 shorts the fourth output port P5 to ground, so the input port P1 is disconnected from the fourth output port P5. The second inductor L2, the third inductor L3, the parasitic capacitance of the first transistor M1, the parasitic capacitance of the third transistor M3, and the parasitic capacitance of the fourth transistor M4 serve as loads of the second output port P3.
3) The third control port V3 provides a first level signal, the first control port V1, the second control port V2 and the fourth control port V4 provide a second level signal, the third transistor M3 switch is turned off, the first transistor M1, the second transistor M2 and the fourth transistor M4 switch are turned on, and the input port P1 and the third output port P4 are turned on.
The optional implementation mode is as follows: the first level signal is low, such as 0; the second level signal is high, for example, 1. Fig. 7 is an equivalent circuit diagram in this state.
Since the third control port V3 is supplied with a low level, the level signal of the third control point circuit 130 is also low, and since the first control port V1, the second control port V2, and the fourth control port V4 are supplied with a high level, the level signals of the first control circuit 110, the second control circuit 120, and the fourth control circuit 140 are also high. It will be understood by those skilled in the art that, according to the operation principle of the transistors, the third transistor M3 is turned off, the third transistor M3 is equivalent to the transistor off capacitor Coff3, the first transistor M1, the second transistor M2 and the fourth transistor M4 are turned on, the first transistor M1 is equivalent to the transistor on resistor Ron1, the second transistor M2 is equivalent to the transistor on resistor Ron2, and the fourth transistor M4 is equivalent to the transistor on resistor Ron4, and the parasitic capacitance of the first transistor M1, the parasitic capacitance of the second transistor M2 and the parasitic capacitance of the fourth transistor M4 are also included. At this time, the transistor off capacitor Coff3 is equivalent to a bypass capacitor of the third output port P4, and the level signal is transmitted from the input port P1 to the third output port P4; the transistor on-resistance Ron1 is equivalent to the load of the first output port P2, and the transistor on-resistance Ron1 shorts the first output port P2 to ground, so the input port P1 is disconnected from the first output port P2; the transistor on-resistance Ron2 is equivalent to the load of the second output port P3, and the transistor on-resistance Ron2 shorts the second output port P3 to ground, so the input port P1 is disconnected from the second output port P3; the transistor on-resistance Ron4 is equivalent to the load of the fourth output port P5, and the transistor on-resistance Ron4 shorts the fourth output port P5 to ground, so the input port P1 is disconnected from the fourth output port P5. The second inductor L2, the third inductor L3, the parasitic capacitance of the first transistor M1, the parasitic capacitance of the second transistor M2, and the parasitic capacitance of the fourth transistor M4 serve as loads of the third output port P4.
4) The fourth control port V4 provides the first level signal, the first control port V1, the second control port V2 and the third control port V3 provide the second level signal, the first transistor M1, the second transistor M2 and the third transistor M3 are turned on, the fourth transistor M4 is turned off, and the input port P1 and the fourth output port P5 are turned on.
The optional implementation mode is as follows: the first level signal is low, such as 0; the second level signal is high, for example, 1. Fig. 8 shows an equivalent circuit diagram in this state.
Since the fourth control port V4 is supplied with a low level, the level signal of the fourth control circuit 140 is also low, and since the first control port V1, the second control port V2, and the third control port V3 are supplied with a high level, the level signals of the first control circuit 110, the second control circuit 120, and the third control point circuit 130 are also high. It can be understood by those skilled in the art that, according to the operation principle of the transistors, the switch of the fourth transistor M4 is turned off, the switch of the fourth transistor M4 is equivalent to the transistor off capacitor Coff4, the switch of the first transistor M1, the switch of the second transistor M2 and the switch of the third transistor M are turned on, the switch of the first transistor M1 is equivalent to the transistor on resistor Ron1, the switch of the second transistor M2 is equivalent to the transistor on resistor Ron2, the switch of the third transistor M3 is equivalent to the transistor on resistor Ron3, and the parasitic capacitance of the first transistor M1, the parasitic capacitance of the second transistor M2 and the parasitic capacitance of the third transistor M3 are also included. At this time, the transistor off capacitor Coff4 is equivalent to a bypass capacitor of the fourth output port P5, and the level signal is transmitted from the input port P1 to the fourth output port P5; the transistor on-resistance Ron1 is equivalent to the load of the first output port P2, and the transistor on-resistance Ron1 shorts the first output port P2 to ground, so the input port P1 is disconnected from the first output port P2; the transistor on-resistance Ron2 is equivalent to the load of the second output port P3, and the transistor on-resistance Ron2 shorts the second output port P3 to ground, so the input port P1 is disconnected from the second output port P3; the transistor on-resistance Ron3 is equivalent to the load of the third output port P4, and the transistor on-resistance Ron3 shorts the third output port P4 to ground, so the input port P1 is disconnected from the third output port P4. The second inductor L2, the third inductor L3, the parasitic capacitance of the first transistor M1, the parasitic capacitance of the second transistor M2, and the parasitic capacitance of the third transistor M3 serve as loads of the fourth output port P5.
In order to verify the working effect of the rf front-end circuit provided by the embodiment of the present invention, the following description is made in conjunction with specific parameters and simulation results of the single-pole four-throw switch.
In an alternative embodiment, the first transistor M1 is composed of 6 groups of field effect transistors, each group of field effect transistors includes 64 channels, and the channel width is 1 μ M and the channel length is 40 nm; the second transistor M2 is composed of 6 groups of field effect transistors, each group of field effect transistors includes 64 channels, the width of the channel is 1 μ M, and the length of the channel is 40 nm; the third transistor M3 is composed of 6 groups of field effect transistors, each group of field effect transistors includes 64 channels, the width of the channel is 1 μ M, and the length of the channel is 40 nm; the fourth transistor M4 is composed of 6 groups of field effect transistors, and each group of field effect transistors includes 64 channels, and the channel width is 1 μ M and the channel length is 40 nm.
The resistances of the first gate bias resistor R1, the second gate bias resistor R2, the third gate bias resistor R3 and the fourth gate bias resistor R4 are all 3K Ω.
The resistances of the first external resistor Rsub1, the second external resistor Rsub2, the third external resistor Rsub3 and the fourth external resistor Rsub4 are all 6K Ω, and the capacitance of the bypass capacitor C1 is 40 fF.
In this embodiment, for the switch module with the above structural parameters, it is possible to implement: the application frequency band comprises 40 GHz-50 GHz. In the application frequency band, the insertion loss mismatching degree of the input port P1 and each output port is less than 0.22dB, the insertion loss of the input port P1 and each output port is less than 2.3dB, and the isolation degree of the input port P1 and each output port is more than 23.1 dB.
It should be noted that the structural parameters in the single-pole four-throw switch provided by the embodiment of the present invention are not limited thereto, and those skilled in the art can think that the same effect can be achieved by using structures with different parameters according to different use conditions.
In this embodiment, by using the principle that the transistors are turned on or off at different levels, and by controlling the level signals of the control port group, the level signal provided to the transistor of one of the control circuits is opposite to the level signal provided to the transistors of the other control circuits, so that switching between different alternative ports can be realized. Meanwhile, the load of the target port is configured, so that the low insertion loss is realized when different target ports are conducted.
Compared with the single-pole four-throw switches shown in fig. 1-3, the single-pole four-throw switch provided by the embodiment of the invention can improve the isolation between a switch radio-frequency signal and a level signal through the gate bias resistance of the transistor control circuit, can reduce the resistance of the substrate of the transistor through the external resistor, achieves the purpose of reducing the insertion loss, further ensures that the single-pole four-throw switch has smaller insertion loss and higher isolation performance in different working states, and can be well matched with ports.
In a second aspect, an embodiment of the present invention provides an integrated circuit module, which includes the rf front-end circuit with multiple antenna modes.
The integrated circuit module provided by the embodiment of the invention comprises a radio frequency front-end circuit in a multi-antenna mode, wherein different radio frequency signals can be switched to antennas corresponding to transmitting channels for transmitting by switching a single-pole N-throw switch at the last and front stages, and the signals can be radiated outwards in a time-sharing manner when the whole machine works; each antenna is provided with an independent receiving channel, so that when one antenna radiates signals outwards, other receiving channels receive multidirectional information normally and simultaneously, receiving and sending parallel processing is realized, and a half-duplex working mode in a multi-antenna mode can be completed, namely when radio-frequency signals are transmitted through one antenna, the real-time signal receiving function is realized by using other antennas. Therefore, data chain networking communication can be completed, and a real-time hardware platform is provided for data distribution. In addition, the single-pole N-throw switch at the last stage is a low-power switch, so that the switching noise in a channel can be reduced, and the switching speed is improved; each single-pole N-throw switch realizes port isolation by using a coupling inductance circuit, can improve isolation, and can achieve the purpose of reducing insertion loss by using a transistor control circuit to adjust the load of a conducted output port to realize load matching.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A multi-antenna mode rf front-end circuit, comprising:
the device comprises a radio frequency signal input end (1), a first isolator (2), a first temperature compensator (3), a push-stage amplifier (4), a first filter (5), a single-pole N-throw switch (6) and N paths of transmitting channels which are connected in parallel and connected in sequence, wherein each path of transmitting channel is connected with one output port of the single-pole N-throw switch (6), and each path of transmitting channel comprises a final-stage amplifier (7), a double-section circulator (8), a second filter (9) and an antenna (10) which are connected in sequence; each path of transmitting channel is correspondingly connected with a receiving channel through the double-section circulator (8) and used for receiving input signals of the antenna (10) corresponding to the path of transmitting channel;
the single-pole N-throw switch (6) is used for selecting one output port to be connected with the input port and outputting a received radio frequency signal so as to realize the conduction of a transmitting channel, and an antenna (10) in the transmitting channel which is not conducted by the single-pole N-throw switch (6) receives an input signal and transmits the input signal to a corresponding receiving channel; the single-pole N-throw switch (6) comprises a coupling inductance circuit and a transistor control circuit, wherein the coupling inductance circuit is used for realizing port isolation, and the transistor control circuit is used for adjusting the load of a conducted output port; n is a natural number greater than 3.
2. The multi-antenna mode rf front-end circuit of claim 1, wherein the receive channel comprises:
the temperature-controlled double-section circulator comprises a limiter (11), a low-noise amplifier (12), a second temperature compensator (13), a second isolator (14) and a received signal output end (15), wherein the limiter (11), the low-noise amplifier, the second temperature compensator, the second isolator and the received signal output end are connected in sequence, and the input end of the limiter (11) is connected with one output end of the double-section circulator (8).
3. The multi-antenna mode rf front-end circuit of claim 1, wherein N is 4;
the single pole, N-throw switch (6) further comprises:
an input port (P1), a first output port (P2), a second output port (P3), a third output port (P4), and a fourth output port (P5);
a coupled inductor circuit comprising a first inductor winding (L1), a second inductor winding (L2), and a third inductor winding (L3), the first inductor winding (L1) connected to the input port (P1), the second inductor winding (L2) connected between the first output port (P2) and the second output port (P3), and the third inductor winding (L3) connected between the third output port (P4) and the fourth output port (P5);
a transistor control circuit including an nth control circuit connected to the first output port (P2), the second output port (P3), the third output port (P4), and the fourth output port (P5), respectively, wherein n is sequentially one to four; the transistor control circuit selects one output port to be conducted with the input port based on the level signals of the control circuits, and configures the load of the output port by using the inductance coils connected with the output ports and the control circuits connected with the other output ports except the output port to realize the load matching of the output port.
4. The radio frequency front-end circuit of multiple antenna modes according to claim 3, characterized in that the single-pole-N-throw switch (6) further comprises:
a set of control ports, the set of control ports including a first control port (V1), a second control port (V2), a third control port (V3) and a fourth control port (V4), the first control port (V1) with the first control circuit is connected, the second control port (V2) with the second control circuit is connected, the third control port (V3) with the third control circuit is connected, the fourth control port (V4) with the fourth control circuit is connected, the set of control ports being for providing level signals for the transistor control circuit.
5. The multi-antenna mode rf front-end circuit of claim 4, wherein the nth control circuit comprises: the transistor comprises an nth transistor (Mn), an nth grid bias resistor (Rn) and an nth external resistor (Rsubn) between the sources of the nth transistor (Mn), wherein the nth grid bias resistor (Rn) is connected between the grid of the nth transistor (Mn) and the nth control port (Vn), the drain of the nth transistor (Mn) is connected with the nth output port in parallel, the source of the nth transistor (Mn) is grounded, one end of the nth external resistor (Rsub n) is connected with the substrate of the nth transistor (Mn), and the other end of the nth external resistor (Rsub n) is grounded.
6. The multi-antenna mode RF front-end circuit of claim 5, wherein the first control port (V1) provides a first level signal, the second control port (V2), the third control port (V3) and the fourth control port (V4) provide a second level signal, the first transistor (M1) switch is turned off, the second transistor (M2), the third transistor (M3) and the fourth transistor (M4) switch are turned on, and the input port (P1) and the first output port (P2) are turned on.
7. The multi-antenna mode RF front-end circuit of claim 5, wherein the second control port (V2) provides a first level signal, the first control port (V1), the third control port (V3) and the fourth control port (V4) provide a second level signal, the second transistor (M2) switch is turned off, the first transistor (M1), the third transistor (M3) and the fourth transistor (M4) switch are turned on, and the input port (P1) and the second output port (P3) are turned on.
8. The multi-antenna mode RF front-end circuit of claim 5, wherein the third control port (V3) provides a first level signal, the first control port (V1), the second control port (V2) and the fourth control port (V4) provide a second level signal, the third transistor (M3) switch is turned off, the first transistor (M1), the second transistor (M2) and the fourth transistor (M4) switch are turned on, and the input port (P1) and the third output port (P4) are turned on.
9. The multi-antenna mode RF front-end circuit of claim 5, wherein the fourth control port (V4) provides a first level signal, the first control port (V1), the second control port (V2) and the third control port (V3) provide a second level signal, the first transistor (M1), the second transistor (M2) and the third transistor (M3) are switched on, the fourth transistor (M4) is switched off, and the input port (P1) and the fourth output port (P5) are switched on.
10. An integrated circuit module comprising a multi-antenna mode rf front-end circuit according to any of claims 1 to 9.
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| CN202011192452.6A CN112491437A (en) | 2020-10-30 | 2020-10-30 | Radio frequency front-end circuit with multiple antenna modes and integrated circuit module |
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| CN202011192452.6A CN112491437A (en) | 2020-10-30 | 2020-10-30 | Radio frequency front-end circuit with multiple antenna modes and integrated circuit module |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022088446A1 (en) * | 2020-10-30 | 2022-05-05 | 西安科锐盛创新科技有限公司 | Multi-coil coupled single-pole four-throw switch and radio frequency integrated circuit |
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2020
- 2020-10-30 CN CN202011192452.6A patent/CN112491437A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022088446A1 (en) * | 2020-10-30 | 2022-05-05 | 西安科锐盛创新科技有限公司 | Multi-coil coupled single-pole four-throw switch and radio frequency integrated circuit |
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Application publication date: 20210312 |