CN112491397A - Multi-frequency-point RC oscillator - Google Patents
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- H—ELECTRICITY
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Abstract
The invention discloses a multi-frequency-point RC oscillator, and relates to the technical field of integrated circuits. The oscillator comprises a frequency selection module, a charge-discharge module, a transmission gate module and a comparison output module, wherein the frequency selection module is connected with the charge-discharge module and the transmission gate module through a first switch; the frequency selection module comprises a plurality of resistors and a selector connected with the plurality of resistors, and the selector is used for switching on part of or all the resistors in the plurality of resistors according to a received frequency selection signal so as to output different first voltages to the transmission gate module; the transmission gate module respectively outputs the first voltage output by the frequency selection module and the second voltage of the charge-discharge module to the comparison output module, compares the first voltage and the second voltage with the capacitor voltage in the charge-discharge module, and respectively switches on/off the first switch and the second switch, so that the charge-discharge module repeatedly charges/discharges to output an oscillation signal.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a multi-frequency-point RC oscillator.
Background
Oscillators are widely used as clock sources in electronic devices, especially in the field of communications. Oscillators are commonly of 4 types: ring oscillators, LC/RC oscillators, crystal oscillators, relaxation oscillators, and the like. The ring oscillator is greatly influenced by voltage and temperature, has unstable frequency and is mainly used for a phase-locked loop circuit; the LC/RC oscillator is divided into an LC oscillator and an RC oscillator, wherein the LC oscillator occupies a large area, is not easy to integrate and is rarely used; the RC oscillator has simple structure, good frequency stability, easy on-chip integration and wide application; the crystal oscillator has high precision and excellent temperature coefficient, but has extremely large occupied area, high power consumption and can not be integrated; the relaxation oscillator needs extra current reference, the precision and the temperature coefficient depend on the current reference, and the occupied area is large. Moreover, the existing oscillator has a single frequency point, generally, one oscillator has only one frequency point, and a plurality of oscillators need to be integrated in one system if a plurality of clocks with different frequencies need to be used, so that the oscillator occupies a larger chip area and is not beneficial to the integration of a chip system.
Fig. 1 shows a conventional RC oscillator structure, which includes two comparators, an RS flip-flop, and a charging and discharging current source Ibias, and its working principle is as follows: when the voltage on the capacitor Ca is higher than Vhigh, the Q end signal enables the switch S2 to be closed to discharge the capacitor Ca, and when the voltage on the capacitor Ca is lower than Vlow, the comparator COM2 is inverted, the RS trigger enables the S1 to be closed, the S2 is opened to charge the capacitor Ca. And the operation is repeated in a reciprocating way, so that an oscillating signal is generated. According to the working principle of the oscillator, the frequency of the oscillator is influenced by factors such as the current magnitude, the time delay of the comparator and the RS trigger and the like. The oscillator has poor frequency precision, only has one frequency point, and needs to be internally provided with a plurality of clocks with different frequencies under the condition that the system needs clocks with different frequencies in different application scenes, thereby occupying larger area and being inconvenient for system integration.
Disclosure of Invention
The invention mainly aims to provide a multi-frequency-point RC oscillator, which aims to provide clocks with different frequencies for a chip system.
In order to achieve the above object, the present invention provides a multi-frequency RC oscillator, which includes a frequency selection module, a charge-discharge module, a transmission gate module and a comparison output module, wherein the frequency selection module is connected to the charge-discharge module and the transmission gate module through a first switch, and the frequency selection module and the charge-discharge module are connected to the comparison output module through the transmission gate module;
the frequency selection module comprises a plurality of resistors and a selector connected with the plurality of resistors, and the selector is used for switching on part of or all the resistors in the plurality of resistors according to a received frequency selection signal so as to output different first voltages to the transmission gate module;
the charge-discharge module is further connected to the transmission gate module through a second switch, the transmission gate module respectively outputs a first voltage output by the frequency selection module and a second voltage of a first current source end connected with the charge-discharge module to the comparison output module, the first voltage and the second voltage are compared with a capacitor voltage in the charge-discharge module, and a comparison result output by the comparison output module is respectively connected/disconnected with the first switch and the second switch, so that the charge-discharge module repeatedly performs charge/discharge, and the comparison output module outputs an oscillation signal.
Preferably, the transmission gate module comprises a first transmission gate and a second transmission gate; the first transmission gate comprises a first NMOS transistor and a first PMOS transistor, and the second transmission gate comprises a second NMOS transistor and a second PMOS transistor;
the grid electrode of the first PMOS tube and the grid electrode of the second NMOS tube are respectively connected with the first switch; the grid electrode of the first NMOS tube and the grid electrode of the second PMOS tube are respectively connected to the second switch;
the drain electrode of the first NMOS tube and the source electrode of the first PMOS tube are connected to the frequency selection module to receive the first voltage, and the drain electrode of the second NMOS tube and the source electrode of the second PMOS tube are connected to the charge-discharge module to receive the second voltage; the source electrode of the first NMOS tube, the source electrode of the second NMOS tube, the drain electrode of the first PMOS tube and the drain electrode of the second PMOS tube are connected to the comparison output module, and the transmission gate module is connected with a first voltage or a second voltage to compare with the capacitor voltage in the charge-discharge module.
Preferably, the comparison output module comprises a comparator, a trigger, a first inverter, a second inverter and a buffer which are connected in sequence; the buffer outputs an oscillation signal to an external circuit;
two input ends of the comparator are respectively connected to the transmission gate module and the charge-discharge module and used for comparing a first voltage or a second voltage with a capacitor voltage in the charge-discharge module, and an output end of the comparator is connected to an input end of the trigger;
the output end of the first phase inverter is further connected to the first switch, and the output end of the second phase inverter is further connected to the second switch.
Preferably, the trigger is a schmitt trigger.
Preferably, the charge-discharge module includes a first resistor and a capacitor, one end of the first resistor is connected to the second switch, and the other end of the first resistor is connected to the first current source and the second transmission gate; one end of the capacitor is connected to the first switch, the second switch and the comparator, and the other end of the capacitor is grounded; the charge-discharge module discharges the capacitor by turning on the second switch.
Preferably, the frequency selection unit is connected with a second current source, and the frequency selection unit is further connected to the capacitor of the charge-discharge module through a first switch; the second current source charges the capacitor by turning on the first switch.
The frequency selection module of the technical scheme of the invention selects to switch on part of or all the resistors and outputs different first voltages according to different frequency selection signals so as to output oscillation signals with different frequencies. Compared with the oscillator in the prior art, the technical scheme of the invention only uses one comparator, does not need an RS latch, saves the area, reduces the loop delay and improves the clock stability.
Drawings
Fig. 1 shows a conventional RC oscillator structure in the prior art.
FIG. 2 is a schematic circuit diagram of a multi-frequency RC oscillator according to the present invention;
FIG. 3 is a schematic diagram of a circuit structure of a frequency selection module in the multi-frequency RC oscillator according to the present invention;
fig. 4 is a schematic diagram of clock cycles corresponding to different first voltages in an embodiment of the invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 2, the oscillator includes a frequency selection module, a charge-discharge module, a transmission gate module, and a comparison output module, where the frequency selection module is connected to the charge-discharge module and the transmission gate module through a first switch SW1, and the frequency selection module and the charge-discharge module are connected to the comparison output module through the transmission gate module; the frequency selection module comprises a plurality of resistors and a selector MUX connected with the resistors, and the selector MUX is used for switching on part of or all the resistors in the resistors according to a received frequency selection signal SF [ M:1] so as to output different first voltages VP to the transmission gate module; the charge-discharge module is further connected to the transmission gate module through a second switch SW2, the transmission gate module respectively outputs a first voltage VP output by the frequency selection module and a second voltage VN at the first current source IB _ B end connected to the charge-discharge module to the comparison output module, the first voltage VP and the second voltage VN are compared with a capacitor voltage VCOM in the charge-discharge module, and a comparison result output by the comparison output module is respectively connected/disconnected with the first switch SW1 and the second switch SW2, so that the charge-discharge module repeatedly performs charging/discharging to enable the comparison output module to output an oscillation signal.
In one embodiment, the frequency selective signal is configurable by a register, according to the design requirements of a specific system. The resistance values of the resistors can be designed to be equal or different according to the design requirements of the system so as to output clock signals with different frequencies. As shown in fig. 3, the frequency selection module includes n resistors, which are sequentially connected in series and are respectively labeled as R1, R2, R3, R4, R5, R6, R7, R8 … …, and Rn; the selector MUX can select a voltage division value from the end of each resistor to output to the transmission gate module. In the frequency selection module of the technical scheme, the values of n resistors are equal to the value of the resistor Ra in the prior art, the chip area cannot be additionally increased, and the consistency of different frequency points is high because the matching of the R1-Rn resistors is easy to make. In the specific design process, the resistance values of the n resistors can be designed to be equal or respectively unequal according to requirements, so that the oscillation signals required by a designer can be output conveniently.
As shown in fig. 2, the transmission gate module includes a first transmission gate TG1 and a second transmission gate TG 2; the first transmission gate TG1 comprises a first NMOS transistor N1 and a first PMOS transistor P1, and the second transmission gate TG2 comprises a second NMOS transistor N2 and a second PMOS transistor P2; the grid electrode of the first PMOS pipe P1 and the grid electrode of the second NMOS pipe N2 are respectively connected with the first switch SW 1; the grid electrode of the first NMOS transistor N1 and the grid electrode of the second PMOS transistor P2 are respectively connected to the second switch SW 2; the drain of the first NMOS transistor N1 and the source of the first PMOS transistor P1 are connected to the frequency selection module for receiving the first voltage VP, and the drain of the second NMOS transistor N2 and the source of the second PMOS transistor P2 are connected to the first current source IB _ B terminal of the charge-discharge module for receiving the second voltage VN; the source electrode of the first NMOS transistor N1, the source electrode of the second NMOS transistor N2, the drain electrode of the first PMOS transistor P1 and the drain electrode of the second PMOS transistor P2 are connected to the comparison output module, and the transmission gate module is connected to a first voltage VP or a second voltage VN to compare with a capacitance voltage VCOM in the charge-discharge module.
As shown in fig. 2, the comparison output module includes a comparator COMP, a flip-flop Schmidt, a first inverter INV1, a second inverter INV2, and a buffer BUFF, which are connected in sequence; the buffer BUFF outputs an oscillation signal CLKOUT to an external circuit; two input ends of the comparator COMP are respectively connected to the transmission gate module and the charge-discharge module, and are used for comparing a first voltage VP or a second voltage VN with a capacitor voltage VCOM in the charge-discharge module, and an output end of the comparator COMP is connected to an input end of the trigger Schmidt; the output end of the first inverter INV1 is further connected to the first switch SW1, and the output end of the second inverter INV2 is further connected to the second switch SW 2.
Preferably, the trigger Schmidt is a Schmidt trigger.
As shown in fig. 2, the charge and discharge module includes a first resistor Rs and a capacitor C1, wherein one end of the first resistor Rs is connected to the second switch SW2, and the other end of the first resistor Rs is connected to the first current source IB _ B and the second transmission gate TG 2; one end of the capacitor C1 is connected to the first switch SW1, the second switch SW2 and the comparator COMP, and the other end is connected to GND; the charge-discharge module discharges the capacitor C1 by turning on the second switch SW 2.
As shown in fig. 2, the frequency selecting unit is connected to a second current source IB _ a, and the frequency selecting unit is further connected to the capacitor C1 of the charge-discharge module through a first switch SW 1; the second current source IB _ a charges the capacitor C1 by turning on the first switch SW 1.
As shown in fig. 2 and fig. 3, the working principle of the embodiment of the present invention is as follows:
the capacitor voltage VCOM is a voltage at the terminal of the capacitor C1, the capacitor C1 is connected to the inverting input terminal of the comparator COMP, and compared with a voltage (the first voltage VP or the second voltage VN) input at the inverting input terminal of the comparator COMP, the value of the capacitor voltage VCOM may vary from 0 to the power supply VCC. The second voltage VN is the voltage at the terminal of the first current source IB _ B and is a constant value. The first voltage VP output by the frequency selection module is different according to the difference of the frequency selection signal SF [ M:1] and the voltage value of the first voltage VP.
The transmission gate module comprises a first transmission gate TG1 and a second transmission gate TG2, the first transmission gate TG1 is opened, the second transmission gate TG2 is closed, and the first voltage VP is sent to the inverting input end of the comparator COMP to be compared with the capacitance voltage VCOM; when the first transmission gate TG1 is closed and the second transmission gate TG2 is opened, the second voltage VN is supplied to the inverting input terminal of the comparator COMP to be compared with the capacitor voltage VCOM. The comparator COMP inputs the comparison result to the flip-flop Schmidt, the first inverter INV1, the second inverter INV2, and the buffer BUFF to output an oscillation signal. Meanwhile, the first inverter INV1 and the second inverter INV2 feed back the voltages at their output terminals to the first switch SW1, the second switch SW2 and the field effect transistor in the transmission gate module, respectively, to control the on and off of the switch and the transmission gate, respectively.
When the output end Q1 of the first inverter INV1 is at a high level and the output end Q2 of the second inverter INV2 is at a low level, the first switch SW1 is closed, the second switch SW2 is opened, and the power supply voltage VCC charges the capacitor C1. When the first transmission gate TG1 is opened and the second transmission gate TG2 is closed, the first voltage VP is sent to the inverting input terminal of the comparator COMP to be compared with the capacitor voltage VCOM; if the first voltage VP is greater than the capacitor voltage VCOM, the comparator COMP output is low, the output terminal Q1 of the first inverter INV1 remains high, the output terminal Q2 of the second inverter INV2 remains low, and the power supply voltage VCC continues to charge the capacitor C1 until the capacitor voltage VCOM is greater than the first voltage VP.
When the capacitor voltage VCOM is greater than the first voltage VP, the comparator COMP is inverted and the output is high, the output Q1 of the first inverter INV1 becomes low, and the output Q2 of the second inverter INV2 becomes high. At this time, the first switch SW1 is opened, the second switch SW2 is closed, and the first current source IB _ B discharges the capacitor C1. At this time, the first transmission gate TG1 is closed, the second transmission gate TG2 is opened, the second voltage VN is supplied to the inverting input terminal of the comparator COMP to be compared with the capacitor voltage VCOM, when the capacitor voltage VCOM is smaller than the second voltage VN, the comparator COMP flips and outputs a low level, the output terminal Q1 of the first inverter INV1 becomes a high level, the output terminal Q2 of the second inverter INV2 becomes a low level, the first switch SW1 is closed, the second switch SW2 is opened, and the power supply voltage VCC charges the capacitor C1.
The process cycles back and forth as described above to cause the clock signal to be output from the CLKOUT terminal to the external circuit.
As shown in fig. 4, the capacitor voltage VCOM is different for different values of the first voltage VP because the comparator COMP must be larger than the first voltage VP to flip the capacitor voltage VCOM, otherwise the current source charges the capacitor C1 until the capacitor voltage VCOM is larger than the first voltage VP. The larger the value of the capacitor voltage VCOM (with the charging current unchanged), the longer the charging time T, and also the longer the discharging time, the longer the period, so that the frequency of the circuit output is lower. Therefore, different resistance values are selected by the frequency selection module, so that the circuit can output different frequencies. In an embodiment, as shown in fig. 4, the frequency selecting module selects three different resistance outputs to obtain three unequal values of the first voltage VP, which are respectively set as VP1, VP2, and VP3, where VP1< VP2< VP3, and since VP3 is the largest, the corresponding capacitance voltage VCOM3 has the largest inversion value, and at this time, the charging time of the capacitor C1 is also the longest, i.e., a clock period T1< T2< T3, where T1= T3-T2, T2= T4-T1, and T3= T5-T0. Therefore, clocks with different frequencies can be obtained by selecting different values of the first voltage VP.
It should be understood that the above is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structures or equivalent flow transformations made by the present specification and drawings, or applied directly or indirectly to other related technical fields, are included in the scope of the present invention.
Claims (6)
1. A multi-frequency-point RC oscillator is characterized by comprising a frequency selection module, a charge-discharge module, a transmission gate module and a comparison output module, wherein the frequency selection module is connected with the charge-discharge module and the transmission gate module through a first switch;
the frequency selection module comprises a plurality of resistors and a selector connected with the plurality of resistors, and the selector is used for switching on part of or all the resistors in the plurality of resistors according to a received frequency selection signal so as to output different first voltages to the transmission gate module;
the charge-discharge module is further connected to the transmission gate module through a second switch, the transmission gate module respectively outputs a first voltage output by the frequency selection module and a second voltage of a first current source end connected with the charge-discharge module to the comparison output module, the first voltage and the second voltage are compared with a capacitor voltage in the charge-discharge module, and a comparison result output by the comparison output module is respectively connected/disconnected with the first switch and the second switch, so that the charge-discharge module repeatedly performs charge/discharge, and the comparison output module outputs an oscillation signal.
2. The multi-frequency point, RC, oscillator of claim 1, wherein the transmission gate module comprises a first transmission gate and a second transmission gate; the first transmission gate comprises a first NMOS transistor and a first PMOS transistor, and the second transmission gate comprises a second NMOS transistor and a second PMOS transistor;
the grid electrode of the first PMOS tube and the grid electrode of the second NMOS tube are respectively connected with the first switch; the grid electrode of the first NMOS tube and the grid electrode of the second PMOS tube are respectively connected to the second switch;
the drain electrode of the first NMOS tube and the source electrode of the first PMOS tube are connected to the frequency selection module to receive the first voltage, and the drain electrode of the second NMOS tube and the source electrode of the second PMOS tube are connected to the charge-discharge module to receive the second voltage; the source electrode of the first NMOS tube, the source electrode of the second NMOS tube, the drain electrode of the first PMOS tube and the drain electrode of the second PMOS tube are connected to the comparison output module, and the transmission gate module is connected with a first voltage or a second voltage to compare with the capacitor voltage in the charge-discharge module.
3. The multi-frequency RC oscillator of claim 2, wherein the comparison output module comprises a comparator, a flip-flop, a first inverter, a second inverter and a buffer connected in sequence; the buffer outputs an oscillation signal to an external circuit;
two input ends of the comparator are respectively connected to the transmission gate module and the charge-discharge module and used for comparing a first voltage or a second voltage with a capacitor voltage in the charge-discharge module, and an output end of the comparator is connected to an input end of the trigger;
the output end of the first phase inverter is further connected to the first switch, and the output end of the second phase inverter is further connected to the second switch.
4. The multi-point RC oscillator of claim 3, wherein the flip-flop is a schmitt trigger.
5. The multi-frequency RC oscillator of claim 3, wherein the charge-discharge module comprises a first resistor and a capacitor, one end of the first resistor is connected to the second switch, and the other end of the first resistor is connected to the first current source and the second transmission gate; one end of the capacitor is connected to the first switch, the second switch and the comparator, and the other end of the capacitor is grounded; the charge-discharge module discharges the capacitor by turning on the second switch.
6. The multi-frequency RC oscillator of claim 5, wherein the frequency selection unit is connected to a second current source, and further connected to the capacitor of the charge-discharge module through a first switch; the second current source charges the capacitor by turning on the first switch.
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Application publication date: 20210312 |