CN112466740A - Carrier for plasma processing wafer and wafer processing equipment - Google Patents
Carrier for plasma processing wafer and wafer processing equipment Download PDFInfo
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- CN112466740A CN112466740A CN202011376800.5A CN202011376800A CN112466740A CN 112466740 A CN112466740 A CN 112466740A CN 202011376800 A CN202011376800 A CN 202011376800A CN 112466740 A CN112466740 A CN 112466740A
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- 239000006227 byproduct Substances 0.000 claims abstract description 65
- 238000007599 discharging Methods 0.000 claims abstract description 8
- 235000012431 wafers Nutrition 0.000 claims description 195
- 230000008859 change Effects 0.000 claims description 8
- 239000000428 dust Substances 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 17
- 230000008569 process Effects 0.000 abstract description 16
- 238000004519 manufacturing process Methods 0.000 abstract description 11
- 238000006243 chemical reaction Methods 0.000 abstract description 10
- 238000005530 etching Methods 0.000 description 32
- 230000009286 beneficial effect Effects 0.000 description 19
- 230000000694 effects Effects 0.000 description 8
- 239000002245 particle Substances 0.000 description 7
- 238000007664 blowing Methods 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- 238000005086 pumping Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- -1 ring Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
- H01J37/32853—Hygiene
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Health & Medical Sciences (AREA)
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- Drying Of Semiconductors (AREA)
Abstract
The invention provides a carrier for processing a wafer by plasma, which comprises a tray and an edge ring, wherein the tray is used for placing the wafer, the edge is arranged around the circumference of the tray, the edge ring is provided with a discharge structure for discharging byproducts, and the discharge structure penetrates through the edge ring. According to the invention, the discharge structure is arranged on the edge ring, so that byproducts generated in the process of processing the wafer by using the plasma can be discharged out of the carrier in real time, the phenomenon that the byproducts are attached and accumulated near the wafer and touch the wafer to pollute the edge of the wafer is avoided, the processing reaction of the plasma and the wafer is prevented from being interfered, and the production quality of the wafer is improved. The invention also provides a wafer processing device which is provided with the carrier for processing the wafer by the plasma.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and more particularly, to a carrier for plasma processing a wafer and a wafer processing apparatus.
Background
Plasma etching, also known as dry etching, is one of the key processes in integrated circuit manufacturing. The method aims to completely copy a mask pattern to the surface of a silicon wafer, and the range of the mask pattern covers the control of the size of a front-end CMOS grid (Gate), the etching of rear-end metal aluminum and the etching of Via and Trench. In the processing fields of semiconductors, LEDs, MEMS (micro electro mechanical systems) and the like, plasma etching equipment is generally used, which generally consists of a process module and a transmission module. The process module comprises a process chamber, an etching process is usually carried out in the process chamber so as to etch a required pattern on the wafer, and the transmission module is responsible for transmitting the wafer to be processed into the process chamber and transmitting the processed wafer out of the process chamber.
Conventionally, wafers are carried in a closed chamber manufacturing process by using wafer carriers, such as a tray, an electrostatic chuck, etc. When the wafer is subjected to plasma etching, etched byproducts are splashed from the wafer and deposited in the chamber, and if the byproducts cannot be pumped out in time through the pumping port below the vacuum box, the byproducts are accumulated along with the increase of the byproducts in the chamber manufacturing process to form particles, and the particles are adhered and accumulated on the inner wall of the chamber, the surface of the wafer carrier and the edge of the wafer, so that the edge of the wafer is easily polluted, and the quality of the wafer is influenced. Moreover, the particles accumulated on the wafer carrier can affect the local temperature control effect, which can cause the local and edge defects of the wafer, such as warping, the etching uniformity of the wafer with the defects is poor, and the product yield is obviously reduced; in particular, once a closed metal layer is deposited on the inner wall of the chamber and the wafer carrier, the coupling of the rf energy is affected, for example, the thickness of the metal conductive layer deposited on the inner wall of the chamber rapidly increases with time, which eventually causes problems such as difficulty in plasma ignition, instability of the plasma, slow etching rate, and poor etching uniformity. Therefore, by-products generated in the chamber process need to be prevented from adhering and accumulating near the wafer to contact the wafer, so as to avoid affecting the product yield.
Chinese patent application No. CN 210378981U discloses a wafer processing apparatus, which includes a wafer carrier, an air source providing device, and a guiding tray, wherein the wafer carrier is provided with an air blowing channel, an air outlet of the air blowing channel is formed on a carrying surface of the wafer carrier, the air source providing device is communicated with an air inlet of the air blowing channel, the guiding tray is arranged above the carrying surface, a bottom surface of the guiding tray is arranged opposite to the air outlet, and an air flow gap is formed between the guiding tray and the carrying surface. According to the patent application, gas is fed into the wafer carrier through the blowing channel through the gas source supply device and is discharged outside the gas outlet of the blowing channel, and the gas discharged from the gas outlet is blown towards the edge direction of the bearing surface through the gas flow gap under the guiding action of the guiding tray, so that particles on the bearing surface and on the edge of the wafer carrier can be blown and cleaned. However, when the wafer carrier needs to be cleaned, the wafer carrier is not placed on the bearing surface, but the guide tray is placed on the bearing surface, the guide tray bears particles falling from the chamber in the cleaning process, and the particles are prevented from falling onto the bearing surface.
Therefore, there is a need for a new carrier for plasma processing wafers that avoids the above-mentioned problems of the prior art.
Disclosure of Invention
The invention aims to provide a carrier for plasma processing wafers and a wafer processing device, which are used for solving the problem that by-products generated by plasma processing wafers in the prior art are attached and accumulated near the wafers to touch the wafers, so that the production quality of the wafers is influenced.
In order to achieve the above object, a first aspect of the present invention discloses a carrier for plasma processing a wafer, the carrier comprising a tray for holding a wafer and an edge ring, the edge being circumferentially disposed around the tray, the edge ring being provided with a discharge structure for discharging byproducts, the discharge structure penetrating through the edge ring.
The carrier for processing the wafer by the plasma has the advantages that: the edge ring is provided with the discharge structure, by-products generated when the wafer is processed by the plasma can be discharged out of the carrier in real time, the by-products are prevented from being attached and accumulated near the wafer and touching the wafer to pollute the edge of the wafer, the processing reaction of the plasma and the wafer is prevented from being interfered, the production quality of the wafer is improved, and the problem that the by-products are attached and accumulated on the surface and the edge of the carrier for bearing the wafer in the prior art is solved.
Preferably, the discharge structure comprises a discharge hole. The beneficial effects are that: the discharge hole is simple and easy to set, the original structure of the edge ring cannot be damaged, the effect of the edge ring cannot be weakened, and the influence on the etching uniformity of the edge of the wafer is avoided.
Preferably, the discharge holes are provided in plurality, and the edge ring is circumferentially provided with at least one turn of the discharge holes. The beneficial effects are that: according to the structural characteristics and application scenes of the tray and the edge ring, one or more circles of the discharge holes are arranged on the periphery of the edge ring, so that byproducts generated in the process of processing a wafer by plasma can be discharged from the carrier rapidly and comprehensively.
Preferably, a plurality of the discharge holes are equally spaced apart from each other in the edge ring. The beneficial effects are that: the discharge holes are ensured to be arranged on the edge ring in all directions, and byproducts generated in the process of processing the wafer by the plasma can be discharged from the carrier in all directions.
Preferably, the discharge holes have a radial length of 0.5 to 3 mm. The beneficial effects are that: the radial length of the discharge hole is within the range of 0.5-3mm and is most beneficial to discharge of byproducts, the radial length of the discharge hole is too small and is not beneficial to discharge of the byproducts, the discharge effect of the byproducts is not good, and the radial length of the discharge hole is too large, so that the original structure of the edge ring can be damaged, the effect of the edge ring is weakened, and the etching uniformity at the edge of a wafer is influenced.
Preferably, the hole passage of the discharge hole is arranged from the inner wall of the edge ring to the outer wall of the edge ring in an inclined manner towards the bottom end face of the edge ring. The beneficial effects are that: the exhaust hole is provided with a hole channel which is inclined downwards, so that byproducts generated in the process of processing the wafer by plasma can be exhausted out of the carrier in real time.
Preferably, the angle between the axis of the discharge orifice and the bottom end face of the edge ring is greater than 0 ° and less than or equal to 80 °. The beneficial effects are that: the by-products generated when the plasma processes the wafer can be discharged out of the carrier in real time.
Preferably, the axes of the discharge holes are at the same angle to the bottom end face of the edge ring. The beneficial effects are that: easy to machine, making it easier and more convenient to provide the discharge holes in the edge ring.
Preferably, the top end surface of the edge ring is connected with the inner wall surface of the edge ring in a continuous connection manner to form a continuous smooth curved surface. The beneficial effects are that: the inner wall surface of the edge ring facing the wafer is connected with the top end surface of the edge ring through a continuous smooth curved surface, so that plasma can be bombarded to the edge of the wafer, the etching rate of the edge of the wafer is equal to that of the inside of the wafer, the etching uniformity is improved, and the quality of the wafer is improved.
Preferably, the continuous connection mode is any one of tangent continuity, curvature change rate continuity and curvature change rate continuity. The beneficial effects are that: the adjacent two surfaces form continuous curved surfaces by adopting the connection mode, which is beneficial to causing the plasma to bombard the edge of the wafer and improving the etching uniformity.
Preferably, the longitudinal section of the edge ring is in an L-shaped structure, and the edge ring comprises a first table top and a second table top, wherein the height of the first table top is smaller than the height of the tray, and the height of the second table top is larger than the sum of the heights of the tray and the wafer. The beneficial effects are that: the first table top is lower than the tray, so that the wafer can be conveniently placed on the tray, by-products generated during plasma processing of the wafer can be conveniently dropped onto the first table top of the edge ring, and the phenomenon that the by-products are attached and accumulated near the wafer and touch the wafer to pollute the edge of the wafer is avoided; the height of the second table top is higher than that of the wafer placed on the tray, so that plasma can be bombarded to the edge of the wafer, the etching rate of the edge of the wafer is equal to that of the inside of the wafer, the etching uniformity is improved, and the quality of the wafer is improved.
Preferably, the dust exhaust structure includes an inner port and an outer port that are communicated with each other, the inner port is disposed on the inner wall of the edge ring, the inner port is disposed between the first table top and the top end face of the wafer, the outer port is disposed on the outer wall of the edge ring, and the outer port is disposed between the bottom end face of the edge ring and the top end face of the wafer. The beneficial effects are that: an inner port of the discharge structure is arranged on the inner wall of the edge ring between the first table top and the top end face of the wafer, so that on one hand, by-products generated when the wafer is processed by plasma are discharged from the carrier in real time, and the by-products are prevented from being adhered and accumulated near the wafer to touch the wafer; on the other hand, the influence on the bombardment of plasma to the edge of the wafer is avoided, so that the etching uniformity at the edge of the wafer is influenced; the outer port is disposed at a lower position on an outer wall of the edge ring than the inner port is disposed at an inner wall of the edge ring.
Preferably, the tray is an electrostatic chuck for attracting the wafer.
In a second aspect, the invention further provides a wafer processing apparatus, wherein the carrier for plasma processing wafers is arranged for placing the wafers for etching reaction. The beneficial effects are that: the carrier for processing the wafer by adopting the plasma is adopted in the wafer processing equipment to place the wafer, by-products generated when the wafer is processed by the plasma can be discharged out of the carrier in real time, the by-products can be effectively prevented from being attached and accumulated near the wafer to touch the wafer, the production quality of the wafer is improved, and the plasma can be bombarded to the edge of the wafer, so that the etching rate of the edge of the wafer is equivalent to the etching rate of the inner part of the wafer, the etching uniformity is improved, and the quality of the wafer is improved.
Drawings
FIG. 1 is a cross-sectional view of a first plasma processing wafer carrier in accordance with the present invention;
FIG. 2 is an enlarged partial cross-sectional view of a first plasma processing wafer carrier of the present invention;
FIG. 3 is a cross-sectional view of a second plasma processing wafer carrier in accordance with the present invention;
FIG. 4 is a perspective view of a third plasma processing wafer carrier of the present invention;
FIG. 5 is a schematic view showing the structure of a port of a first discharge hole of the present invention;
FIG. 6 is a schematic view showing the structure of a port of a second discharge hole of the present invention;
FIG. 7 is a perspective view of a fourth carrier for plasma processing wafers in accordance with the present invention;
FIG. 8 is a perspective view of a fifth embodiment of a carrier for plasma processing wafers in accordance with the present invention;
FIG. 9 is a cross-sectional view of a wafer processing apparatus having a carrier for plasma processing a wafer according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.
Fig. 1 is a sectional view of a first plasma processing wafer carrier of the present invention, and fig. 2 is a partially enlarged sectional view of a wafer placed on the first plasma processing wafer carrier of the present invention.
To solve the problems of the prior art, referring to fig. 1 and 2, an embodiment of the present invention provides a carrier for plasma processing a wafer, the carrier comprises a tray 11 and an edge ring 12 arranged around the circumference of the tray 11, the tray 11 is used for placing a wafer 21, the edge ring 12 is provided with a discharge structure 13 for discharging by-products, the discharge structure 13 penetrating the edge ring 12, the by-products generated when the wafer 21 is processed by the plasma are discharged out of the carrier in real time, the by-products are prevented from being attached and accumulated near the wafer 21 and contacting the wafer 21 to pollute the edge of the wafer 21, the processing reaction of the plasma and the wafer 21 is prevented from being interfered, the production quality of the wafer 21 is improved, and the problem that the by-products are attached and accumulated on the surface and the edge of the carrier of the wafer 21 in the prior art is solved. The circumferential arrangement in the embodiment of the present invention is arranged along the circumferential direction, i.e. the edge ring 12 is arranged along the circumferential direction of the tray 11.
The term "discharge" as used in the context of the embodiments of the present invention refers to the release or flow from a relatively small orifice or hole, and is understood to mean any known discharge in the art and will not be described in detail herein.
Fig. 3 is a sectional view of a second plasma-processed wafer carrier according to the present invention, and fig. 4 is a perspective view of a third plasma-processed wafer carrier according to the present invention.
In some embodiments of the present invention, referring to fig. 3 and 4, the exhaust structure 13 includes an exhaust hole 17, and the exhaust hole 17 is simple and easy to set, and does not damage the original structure of the edge ring 12, does not weaken the function of the edge ring 12, and avoids affecting the etching uniformity at the edge of the wafer 21.
In some preferred embodiments of the present invention, referring to fig. 3 and 4, the plurality of discharge holes 17 are provided, and the edge ring 12 is circumferentially provided with at least one circle of discharge holes 17, that is, at least one discharge hole 17 is provided on the same longitudinal section of the edge ring 12, so that according to the structural features and application scenarios of the tray 11 and the edge ring 12, when one or more circles of discharge holes 17 are provided on the edge ring 12, and the edge ring 12 is provided with a plurality of circles of discharge holes 17, by-products generated during plasma processing of a wafer can be rapidly discharged from the carrier; in the embodiment of the present invention, the circumferential direction is set along the circumferential direction, that is, at least one circle of the discharge holes 17 is set along the circumferential direction of the edge ring 12, that is, a plurality of discharge holes 17 are set in each circle, so that byproducts generated in each direction can be discharged from the carrier more comprehensively without dead angles.
In some preferred embodiments of the present invention, referring to fig. 3 and 4, the plurality of exhaust holes 17 are disposed at equal intervals on the edge ring 12, so that the exhaust holes 17 are disposed on the edge ring 12 in all directions, and byproducts generated during plasma processing of a wafer can be exhausted from the carrier in all directions.
In some embodiments of the present invention, referring to fig. 3, the edge ring 12 is circumferentially provided with a plurality of circles of the discharge holes 17, and the discharge holes 17 on the same longitudinal section are arranged in parallel and at equal intervals.
In some preferred embodiments of the present invention, the edge ring 12 is circumferentially provided with a plurality of turns of the discharge holes 17, and the discharge holes 17 of the adjacent rings on the edge ring 12 are staggered and equally spaced, further ensuring that the discharge holes 17 are arranged on the edge ring 12 in all directions, and further discharging byproducts generated during plasma processing of wafers from the carrier in all directions, the staggered arrangement described in this embodiment refers to a staggered arrangement, referring to fig. 4, the edge ring 12 is circumferentially provided with two upper and lower circles of the discharge holes 17, the discharge holes 17 of the upper circle include a first discharge hole 171 and a second discharge hole 172, the discharge holes 17 of the lower circle include a third discharge hole 173, the third discharge hole 173 is not disposed directly below the first discharge hole 171 or the second discharge hole 172, but is disposed obliquely below between the first discharge hole 171 and the second discharge hole 172.
In some embodiments of the present invention, referring to fig. 3, the hole of the exhaust hole 17 is disposed from the inner wall of the edge ring 12 to the outer wall of the edge ring 12, and is inclined toward the bottom end surface of the edge ring 12, so that by-products generated during plasma processing of the wafer can be more easily exhausted to the outside of the carrier in real time, the inner wall of the edge ring 12 is an end surface close to the tray 11, and the outer wall of the edge ring 12 is an end surface disposed opposite to the inner wall of the edge ring 12.
In some embodiments of the present invention, referring to fig. 3, an angle between the axis of the exhaust hole 17 and the bottom surface of the edge ring 12 is greater than 0 ° and less than or equal to 80 °, so as to facilitate the real-time exhaust of byproducts generated during plasma processing of wafers out of the carrier.
The axis in the embodiment of the present invention means a straight line dividing a plane or a solid into symmetrical parts; refers to a line about which an object or a three-dimensional figure rotates or may be thought of as rotating.
In some embodiments of the present invention, referring to fig. 3, the angle between the axes of the plurality of discharge holes 17 and the bottom end surface of the edge ring 12 is the same, which facilitates the machining and makes the arrangement of the discharge holes on the edge ring easier and more convenient.
Fig. 5 is a schematic structural view of a port of a first discharge hole of the present invention, and fig. 6 is a schematic structural view of a port of a second discharge hole of the present invention.
In some embodiments of the present invention, referring to fig. 5 and 6, the port shape of the outlet 17 is any one of a circle, an ellipse, and a polygon, the polygon is a closed figure formed by sequentially connecting three or more line segments end to end, such as a triangle, a square, a rectangle, a hexagon, etc., and when the port shape of the outlet 17 is a circle, the outlet 17 has a cylindrical structure.
In some preferred embodiments of the present invention, referring to FIGS. 3 and 4, the discharge holes have a radial length of 0.5 to 3 mm. The radial length of the discharge hole 17 is too small to be beneficial to the discharge of byproducts, the discharge effect of the byproducts is not good, the radial length of the dust discharge 17 is too large to damage the original structure of the edge ring 12, the effect of the edge ring 12 is weakened, the etching uniformity at the edge of the wafer 21 is affected, and the discharge hole 17 with the size of 0.5-3mm can be most beneficial to the discharge of the byproducts.
The radial direction in the embodiment of the present invention is a straight direction along a diameter or a radius, or a straight direction perpendicular to an axis, and the radial length of the discharge hole refers to the longest length of the discharge hole in the radial direction. Referring to fig. 5, when the port of the discharge hole has an elliptical shape, a major axis L1 of the ellipse is a radial length of the discharge hole; referring to fig. 6, when the port of the discharge hole is hexagonal, a distance L2 between two farthest vertices of the hexagon is a radial length of the discharge hole.
In some preferred embodiments of the present invention, referring to fig. 1, 2 and 3, the top end surface of the edge ring 12 and the inner wall surface of the edge ring 12 are continuously connected to form a continuous smooth curved surface 14. The inner wall surface of the edge ring 12 facing the wafer 21 is connected with the top end surface of the edge ring 12 by a continuous smooth curved surface 14, which is beneficial to bombarding plasma to the edge of the wafer 21, so that the etching rate of the edge of the wafer 21 is equivalent to that of the inside of the wafer 21, the etching uniformity is improved, and the quality of the wafer 21 is improved.
In some embodiments of the invention, the continuous connection mode is any one of tangent continuity, curvature change rate continuity and curvature change rate continuity, and adjacent two surfaces form continuous curved surfaces by adopting the connection mode, so that plasma can be bombarded to the edge of the wafer, and the etching uniformity is improved. The continuous tangent, the continuous curvature change rate and the continuous curvature change rate are all common knowledge in the art, and are not described herein.
In some preferred embodiments of the present invention, the continuous smooth curved surface 14 is a smooth curved surface, and the smooth curved surface is a common general knowledge in the art, and refers to a curved surface with a continuously changing tangent plane, or a curved surface with a unit normal vector that can continuously move everywhere, which is not described herein again.
In some preferred embodiments of the present invention, a chamfer is provided between the top end surface of the edge ring 12 and the inner wall surface of the edge ring 12, so that the chamfer processing technology is mature, the processing is easier, and the cost is lower.
In one embodiment of the invention, the chamfer is a rounded chamfer.
In some embodiments of the present invention, referring to fig. 1, 2 and 3, the longitudinal section of the edge ring 12 is an L-shaped structure, and includes a first table 15 and a second table 16, the height of the first table 15 is less than the height of the tray 11, and the height of the second table 16 is greater than the sum of the heights of the tray 11 and the wafer 21. When etching reaction is carried out, the first table top 15 is lower than the tray 11, so that the wafer 21 can be conveniently placed on the tray 11, by-products generated when the wafer 21 is processed by plasma can conveniently fall on the first table top 15 of the edge ring 12, and the by-products are prevented from being attached and accumulated near the wafer and contacting the wafer to pollute the edge of the wafer; the second mesa 16 is higher than the wafer 21 placed on the tray 11, which is helpful for bombarding the edge of the wafer 21 with plasma, so that the etching rate of the edge of the wafer 21 is equal to the etching rate of the inside of the wafer 21, thereby improving the uniformity of etching and improving the quality of the wafer 21.
In some embodiments of the present invention, referring to fig. 1 and 2, the discharge structure 13 includes an inner port and an outer port, which are communicated with each other, the inner port is disposed on the inner wall of the edge ring 12 and between the first mesa 15 and the top end surface of the wafer 21, the outer port is disposed on the outer wall of the edge ring 12 and between the bottom end surface of the edge ring 12 and the top end surface of the wafer 21. The inner port of the exhaust structure 13 is arranged on the inner wall of the edge ring 12 between the first table surface 15 and the top end surface of the wafer 21, so that on one hand, by-products generated during plasma processing of the wafer 21 are exhausted from the carrier in real time, and the by-products are prevented from being attached and accumulated near the wafer 21 to touch the wafer 21; on the other hand, the plasma bombardment to the edge of the wafer 21 is avoided, so that the etching uniformity at the edge of the wafer 21 is influenced; the outer ports are located at the same position on the outer wall of the edge ring 12 as the inner ports are located on the inner wall of the edge ring 12.
In some preferred embodiments of the present invention, the inner port is disposed in the first mesa 15 and is disposed near the inner wall of the edge ring 12. By-products that land on the first mesa 15 are facilitated to be drained off the carrier in real time as the first mesa 15 extends partially below the edge backside of the wafer 21.
In some preferred embodiments of the present invention, the inner port is disposed at a corner between the first mesa 15 and the inner wall of the edge ring 12, which is most beneficial for discharging byproducts generated during plasma processing of the wafer 21 out of the carrier, and the effect of removing the byproducts is optimal.
In some embodiments of the present invention, the radial length of the inner port of the discharge orifice 17 and the outer port of the discharge orifice 17 are different.
Fig. 7 is a perspective view of a fourth plasma-processed wafer carrier according to the present invention, and fig. 8 is a perspective view of a fifth plasma-processed wafer carrier according to the present invention.
In other embodiments of the invention, with reference to fig. 7 and 8, the discharge structure 13 comprises a grid, the edge ring 12 being circumferentially provided with at least one turn of said grid. The side wall of the edge ring 12 is arranged to be of a grid structure, so that on one hand, the area for discharging the byproducts is larger, the efficiency for discharging the byproducts is greatly improved, the byproducts can be more comprehensively discharged without dead angles, the byproducts generated when the wafer 21 is processed by the plasma can be more favorably discharged out of the carrier in real time, and the byproducts are prevented from being attached and accumulated near the wafer 21 and touching the wafer 21; on the other hand, the original structure of the edge ring 12 is not damaged by the grid structure, so that the effect of the edge ring 12 is weakened, and the etching uniformity at the edge of the wafer 21 is influenced; preferably, the grid is arranged from the inner wall of the edge ring to the outer wall of the edge ring in an inclined way towards the bottom end face of the edge ring, so that byproducts generated in the process of processing wafers by plasma can be more easily discharged out of the carrier in real time; in the embodiment of the present invention, the circumferential direction is set along the circumferential direction, that is, at least one circle of the grating is set along the circumferential direction of the edge ring 12, and at least one circle of the grating is set along the circumferential direction of the edge ring 12, so that byproducts generated in each direction can be discharged from the carrier more comprehensively without dead angles.
In some embodiments of the invention, and with reference to FIG. 7, the grid is comprised of baffles and square grid apertures 18.
In some embodiments of the invention, and with reference to fig. 8, the grid is made up of partitions and hexagonal grid holes 19.
In some preferred embodiments of the present invention, the edge ring 12 is a hollow structure, and by-products generated by plasma processing the wafer are discharged from the through holes of the hollow structure.
In some preferred embodiments of the present invention, the tray is an electrostatic chuck for attracting the wafer. The edge ring includes at least one of a ceramic edge ring, a glass edge ring, a quartz edge ring, and a sapphire edge ring.
FIG. 9 is a cross-sectional view of a wafer processing apparatus having a carrier for plasma processing a wafer according to the present invention.
In some embodiments of the present invention, a wafer processing apparatus is further provided, wherein the wafer processing apparatus is provided with the carrier for plasma processing wafer for placing the wafer 21 for etching reaction. Referring to fig. 9, the wafer processing apparatus includes a vacuum box 33 and a cover plate 32 covering the vacuum box 33, the cover plate 32 is provided with a plasma nozzle 31, the plasma nozzle 31 is used for spraying plasma to the wafer 21 for etching reaction, a support 34 is disposed in the vacuum box 33, the support 34 is preferably disposed below, especially right below, the plasma nozzle 31, the support 34 is used for placing the carrier, the carrier includes a tray 11 and an edge ring 12 disposed around the circumference of the tray 11, and the tray 11 is used for placing the wafer 21. In order to avoid the by-products generated during the plasma processing of the wafer 21 from adhering and accumulating near the wafer 21 and contacting the wafer 21 to contaminate the edge of the wafer 21, the edge ring 12 is provided with an exhaust structure 13 for exhausting the by-products, and the exhaust structure 13 penetrates through the edge ring 12 and is communicated with the chamber of the vacuum box 33, so as to exhaust the by-products generated during the plasma processing of the wafer 21 out of the carrier in real time, thereby avoiding the contamination of the edge of the wafer 21, preventing the by-products from interfering the processing reaction between the plasma and the wafer 21, improving the production quality of the wafer 21, and solving the problem that the by-products adhere and accumulate on the surface and the edge of the carrier of the wafer 21 in the prior art. Because plasma is blown into the vacuum box 33, the pumping port 35 below the vacuum box 33 needs to continue to work to pump gas from the vacuum box 33, which also helps to pump off the byproducts that fall to the bottom of the vacuum box 33, further preventing the byproducts from accumulating at the bottom of the vacuum box 33 and forming particles. Preferably, the support 34 is provided with a height such that by-products are unlikely to touch the wafer 21 placed above the support 34 in an etching reaction even if the pumping ports 35 are clogged or not operated.
In summary, the carrier for plasma processing a wafer and the wafer processing apparatus of the present invention, by providing the discharge structure 13 on the edge ring 12, can discharge the by-products generated during plasma processing the wafer 21 out of the carrier in real time, prevent the by-products from adhering and accumulating near the wafer 21 and touching the wafer 21 to pollute the edge of the wafer 21, prevent interference with the processing reaction of the plasma and the wafer 21, and contribute to improving the production quality of the wafer 21.
Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the following claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.
Claims (14)
1. A carrier for plasma processing wafers comprises a tray and an edge ring, wherein wafers are placed on the tray, the edge ring is circumferentially arranged around the tray, the edge ring is provided with a discharge structure for discharging byproducts, and the discharge structure penetrates through the edge ring.
2. A carrier for a plasma processing wafer as recited in claim 1, wherein the exhaust structure comprises an exhaust hole.
3. A carrier for a plasma processing wafer as claimed in claim 2, wherein the plurality of exhaust holes are provided, and the edge ring is provided with at least one circle of the exhaust holes in a circumferential direction.
4. The carrier as claimed in claim 3, wherein the plurality of exhaust holes are disposed at equal intervals on the edge ring.
5. A carrier for a plasma processing wafer as claimed in claim 2, wherein the exhaust holes have a radial length of 0.5-3 mm.
6. The carrier as claimed in claim 2, wherein the exhaust hole channels are formed from an inner wall of the edge ring to an outer wall of the edge ring in a direction inclined toward a bottom end surface of the edge ring.
7. The carrier as claimed in claim 6, wherein an angle between the axis of the exhaust hole and the bottom end surface of the edge ring is greater than 0 ° and less than or equal to 80 °.
8. The carrier as claimed in claim 7, wherein the outlet holes have axes that are angled at the same angle to the bottom surface of the edge ring.
9. The carrier as claimed in claim 1, wherein the top end surface of the edge ring and the inner wall surface of the edge ring are continuously connected to form a continuous smooth curved surface.
10. The carrier as claimed in claim 9, wherein the continuous connection is any one of a tangent continuous, a curvature change rate continuous, and a curvature change rate continuous.
11. The carrier as claimed in claim 1, wherein the edge ring has an L-shaped longitudinal cross-section and comprises a first surface and a second surface, the first surface having a height less than the height of the tray, and the second surface having a height greater than the sum of the heights of the tray and the wafer.
12. The carrier as claimed in claim 11, wherein the dust exhaust structure includes an inner port and an outer port connected to each other, the inner port is disposed on an inner wall of the edge ring and disposed between the first mesa and the top surface of the wafer, the outer port is disposed on an outer wall of the edge ring and disposed between the bottom surface of the edge ring and the top surface of the wafer.
13. A carrier as claimed in claim 1, wherein the tray is an electrostatic chuck.
14. A wafer processing apparatus comprising the carrier for plasma processing a wafer according to any one of claims 1 to 13.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011376800.5A CN112466740A (en) | 2020-11-30 | 2020-11-30 | Carrier for plasma processing wafer and wafer processing equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011376800.5A CN112466740A (en) | 2020-11-30 | 2020-11-30 | Carrier for plasma processing wafer and wafer processing equipment |
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| CN112466740A true CN112466740A (en) | 2021-03-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202011376800.5A Pending CN112466740A (en) | 2020-11-30 | 2020-11-30 | Carrier for plasma processing wafer and wafer processing equipment |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114672780A (en) * | 2022-03-22 | 2022-06-28 | 颀中科技（苏州）有限公司 | Wafer tray and wafer sputtering equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20050117054A (en) * | 2004-06-09 | 2005-12-14 | 삼성전자주식회사 | Edge ring used for manufacturing semiconductor devices and dry etching apparatus using the same |
| US20180090344A1 (en) * | 2016-09-28 | 2018-03-29 | Samsung Electronics Co., Ltd. | Ring assembly and chuck assembly having the same |
| CN111524784A (en) * | 2020-04-27 | 2020-08-11 | 华虹半导体(无锡)有限公司 | Plasma apparatus and method for manufacturing semiconductor device |
| CN213752622U (en) * | 2020-11-30 | 2021-07-20 | 上海诺硕电子科技有限公司 | Carrier for plasma processing wafer and wafer processing equipment |
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2020
- 2020-11-30 CN CN202011376800.5A patent/CN112466740A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050117054A (en) * | 2004-06-09 | 2005-12-14 | 삼성전자주식회사 | Edge ring used for manufacturing semiconductor devices and dry etching apparatus using the same |
| US20180090344A1 (en) * | 2016-09-28 | 2018-03-29 | Samsung Electronics Co., Ltd. | Ring assembly and chuck assembly having the same |
| CN111524784A (en) * | 2020-04-27 | 2020-08-11 | 华虹半导体(无锡)有限公司 | Plasma apparatus and method for manufacturing semiconductor device |
| CN213752622U (en) * | 2020-11-30 | 2021-07-20 | 上海诺硕电子科技有限公司 | Carrier for plasma processing wafer and wafer processing equipment |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114672780A (en) * | 2022-03-22 | 2022-06-28 | 颀中科技（苏州）有限公司 | Wafer tray and wafer sputtering equipment |
| CN114672780B (en) * | 2022-03-22 | 2023-09-19 | 颀中科技（苏州）有限公司 | Wafer tray and wafer sputtering equipment |
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