CN112463677A - Connecting device and method for active optical cable and computer readable storage medium - Google Patents
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Abstract
The application discloses active optical cable's connecting device includes: the BMC is used for acquiring the model information of the active optical cable and outputting corresponding I2C data; the extension circuit is used for controlling the level states of N GPIO ports connected with the PCH according to the I2C data and a preset corresponding rule; a PHY card connected to the active optical cable; the PCH is provided with N pull-up resistors which sequentially correspond to the N GPIO ports, and aiming at any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with a target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line. By applying the scheme of the application, the compatibility of the server and the AOC is effectively guaranteed. And is easy to implement. The application also provides a connection of the active optical cable and a computer readable storage medium, which have corresponding effects.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a device and a method for connecting an active optical cable, and a computer-readable storage medium.
Background
With the advent of the era of big data, cloud computing and artificial intelligence, the internet traffic has grown dramatically, and the amount of computation and the frequency of computation have increased, so that in a server system, data transmission and server management are of particular importance, and a network card is one of the key links of data transmission and server management.
In the server system, if the development and design are carried out based on the intel X86 architecture, the chipset integrates a network controller to support the transmission of network data. The network card itself contains two layers in the ethernet model: the physical layer and the data link layer. The chip of the Physical layer is PHY (Physical layer), and the chip of the data link layer is MAC (Media Access Control). For a new intel platform, the MAC controller is integrated in the chipset, so that a network card can be formed by only matching one PHY chip, and the network card carrying the PHY chip is generally called a PHY card.
The data center computer room of a client usually performs wiring by itself, an AOC (Active Optical cable) is deployed in advance, and a server can be directly connected for use after being put on shelf, and the AOC is purchased by the client, so that some AOCs have a compatibility problem with the server, and the compatibility problem is mainly reflected in that the impedance of I2C (Inter-Integrated Circuit) signals of the AOC and the PHY card is not matched, so that I2C data is abnormal, and further a network card link is interrupted.
The PHY card and the I2C of AOC communication are from a PCH (Platform Controller Hub) of a motherboard, and at present, for an I2C signal, an internal pull-up resistor may be adjusted inside the PCH, so as to adjust the equivalent impedance of the whole I2C link, but a BIOS file needs to be modified, and a BIOS is refreshed on a client line, which has a very large influence on a service and is complex to operate.
In summary, how to effectively implement compatibility between AOC and server is a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
An object of the present invention is to provide a connection apparatus, method and computer-readable storage medium for an active optical cable to effectively achieve compatibility of an AOC with a server.
In order to solve the technical problems, the invention provides the following technical scheme:
an active optical cable connection device comprising:
the BMC is used for acquiring the model information of the active optical cable and outputting I2C data corresponding to the model information;
the expansion circuit is connected with the BMC through an I2C bus and used for controlling the respective level states of N GPIO ports connected with the PCH according to a preset corresponding rule according to received I2C data; n is a positive integer;
a PHY card connected to the active optical cable;
the PCH connected with the expansion circuit and the PHY card; n pull-up resistors are arranged in the PCH and sequentially correspond to the N GPIO ports, and aiming at any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with a target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line; the target SCL line represents the SCL line in the I2C bus where the PCH is connected to the PHY card.
Preferably, the BMC is further configured to: receive a control command and output I2C data corresponding to the control command.
Preferably, the BMC is specifically configured to: obtaining model information of the active optical cable through the BIOS and outputting I2C data corresponding to the model information.
Preferably, N has a value of 4.
Preferably, the resistance values of the 4 pull-up resistors are 1k Ω, 2k Ω, 5k Ω and 20k Ω in this order.
An active optical cable connection method applied to any one of the active optical cable connection devices comprises the following steps:
the BMC acquires model information of the active optical cable and outputs I2C data corresponding to the model information;
the expansion circuit connected with the BMC through the I2C bus controls the respective level states of N GPIO ports connected with the PCH according to a preset corresponding rule according to the received I2C data;
n pull-up resistors are arranged in the PCH and sequentially correspond to the N GPIO ports, for any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with a target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line.
Preferably, the method further comprises the following steps:
the BMC receives the control instruction and outputs I2C data corresponding to the control instruction.
Preferably, the BMC acquires model information of an active optical cable and outputs I2C data corresponding to the model information, including:
the BMC obtains model information of the active optical cable through the BIOS and outputs I2C data corresponding to the model information.
Preferably, N has a value of 4.
A computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method of active optical cable connection of any of the above.
By applying the technical scheme provided by the embodiment of the invention, the compatibility of the server and the AOC is effectively ensured. Specifically, the BMC may acquire model information of the active optical cable and output I2C data corresponding to the model information, the expansion circuit is connected to the BMC through an I2C bus, and may control respective level states of N GPIO ports connected to the PCH according to a preset corresponding rule according to the received I2C data. That is to say, the models of the active optical cables are different, and the respective level states of the N GPIO ports connected to the PCH and the extension circuit are correspondingly different. N pull-up resistors are arranged in the PCH and sequentially correspond to the N GPIO ports. And for any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with the target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line, namely, the level states of N GPIO ports connected with the PCH by the expansion circuit are different, and the equivalent pull-up resistors of the target SCL line are correspondingly different. The target SCL line refers to an SCL line in an I2C bus with the PCH connected with the PHY card, so that the equivalent pull-up resistance of the SCL line in the I2C bus with the PCH connected with the PHY card is different according to different types of active optical cables, and the compatibility of the server and the AOC is effectively guaranteed. Moreover, the BIOS does not need to be modified for implementation, and the scheme is convenient to implement.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural view of a connection device for an active optical cable according to the present invention;
fig. 2 is a flowchart of an embodiment of a method for connecting an active optical cable according to the present invention.
Detailed Description
The core of the invention is to provide a connecting device of an active optical cable, which effectively ensures the compatibility of a server and an AOC. Moreover, the BIOS does not need to be modified for implementation, and the scheme is convenient to implement.
In order that those skilled in the art will better understand the disclosure, the invention will be described in further detail with reference to the accompanying drawings and specific embodiments. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an active optical cable connection device according to the present invention, which may include:
a BMC10 for acquiring model information of the active optical cable and outputting I2C data corresponding to the model information;
the expansion circuit 20 is connected with the BMC10 through an I2C bus, and is configured to control respective level states of N GPIO ports connected with the PCH30 according to a preset corresponding rule according to received I2C data; n is a positive integer;
a PHY card 40 connected to the active optical cable;
PCH30 connected to expansion circuit 20 and PHY card 40; the PCH30 is provided with N pull-up resistors which sequentially correspond to the N GPIO ports, and aiming at any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with a target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line; the target SCL line represents the SCL line in the I2C bus where PCH30 is connected to PHY card 40.
Specifically, in the scheme of the present application, after the server accesses the AOC, the BMC10 may obtain the model information of the active optical cable, and the specific obtaining path may be set and adjusted according to actual needs, for example, in a specific embodiment of the present invention, the BMC10 is specifically configured to: obtaining model information of the active optical cable through the BIOS and outputting I2C data corresponding to the model information. The BMC10 in the implementation mode obtains the model information of the active optical cable through the BIOS, and is simple and convenient to implement.
After the BMC10 acquires the model information of the active optical cable, it may output I2C data corresponding to the model information. For example, in a specific case, I2C data corresponding to 4 kinds of AOC model information is set, for example, when the acquired model information is model a, I2C data is specifically 1001, when the acquired model information is model B, I2C data is specifically 1011, when the acquired model information is model C, I2C data is specifically 0001, and when the acquired model information is model D, I2C data is specifically 0011. It can be understood that the specific form of the I2C data corresponding to the model information can be set and adjusted according to actual needs, and in this example, the size of the I2C data corresponding to the model information is 4 bits, which is convenient for implementation considering that the conversion circuit can control the level of the corresponding 4 GPIO ports according to the 4 bits.
The expansion circuit 20 is connected to the BMC10 through an I2C bus, and R11 and R12 in fig. 1 represent pull-up resistors on the I2C bus.
The expansion circuit 20 may control the respective level states of the N GPIO ports connected to the PCH30 according to a preset rule corresponding to the received I2C data. That is, the expansion circuit 20 of the present application is a hardware circuit that I2C expands GPIO.
The specific value of N can be set according to actual needs, and in practical application, considering the number of types of AOCs and the parameter requirements of I2C lines, and combining practical experience, the value of N can be usually 4 to meet the requirements of the scheme. It can be understood that the higher the value of N is, the higher the adjustment accuracy of the scheme to the equivalent pull-up resistor of the target SCL line is, that is, the better the AOC of different models can be matched, but the higher the value of N is, the higher the cost is, and the larger the space occupation of the scheme is. In the embodiment of fig. 1 of the present application, N is 4 as an example.
For example, in the foregoing example, when the I2C data is specifically 1001, the levels of GPIO-1 to GPIO-4 in fig. 1 are sequentially 1001, and for example, when the I2C data in the foregoing example is specifically 1011, the levels of GPIO-1 to GPIO-4 in fig. 1 are sequentially 1011.
In the application, N pull-up resistors need to be arranged in the PCH30 and correspond to N GPIO ports in sequence, for example, in fig. 1, 4 pull-up resistors are arranged, namely R1, R2, R3 and R4 which correspond to GPIO-1, GPIO-2, GPIO-3 and GPIO-4 in sequence.
For any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with the target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line. The first level state may be set to a high level, and the second level state may be a low level, but the implementation of the present invention is not limited thereto, and may be set as needed in practical applications.
Taking fig. 1 as an example, for example, when the I2C data is specifically 1001, the levels of GPIO-1 to GPIO-4 in fig. 1 are 1001 in sequence, and since the level of GPIO-1 is 1, that is, GPIO-1 is in the first level state, the pull-up resistor R1 corresponding to the GPIO port is communicated with the target SCL line, and in fig. 1, the on-off control of R1 and the target SCL line is realized through the controllable switch S1, in other occasions, there may be other forms as long as the purpose of controlling the on-off between R1 and the target SCL line according to the level state of GPIO-1 can be realized. In fig. 1, GPIO-1 is at a level of 1, S1 is closed, and thus pull-up resistor R1 is in communication with the target SCL line.
Accordingly, S2 and S3 are turned off and S4 is closed, that is, in this case, I2C data is 1001 specifically, and the equivalent pull-up resistance of the target SCL line is R1 and R4 is connected in parallel with R21. R21 and R22 represent the original pull-up resistances of the target SCL line and the target SDA line, respectively. The target SCL line and the target SDA line refer to the SCL line and the SDA line, respectively, in the I2C bus where PCH30 is connected to PHY card 40.
As can be seen from the above, when the I2C data received by the extension circuit 20 is different, the respective level states of the N GPIO ports connected to the extension circuit 20 and the PCH30 are correspondingly different, so that the equivalent pull-up resistors of the target SCL line are different, that is, the equivalent pull-up resistors of the SCL line in the I2C bus connected to the PCH30 and the PHY card 40 can be changed according to the model information of the AOC, thereby ensuring the compatibility of the server with different AOCs.
In one embodiment of the present invention, the BMC10 is further configured to: receives the control command and outputs I2C data corresponding to the control command.
In the foregoing embodiment, the BMC10 may obtain the model information of the active optical cable and output the I2C data corresponding to the model information, and in this embodiment, it also supports flexible adjustment of the equivalent pull-up resistance of the target SCL line directly using a control command, which may be an IPMI tool control command.
The specific values of the N pull-up resistors may also be set according to actual situations, for example, in the embodiment of fig. 1, the value of N is 4 according to actual experience, and the resistance values of the 4 pull-up resistors are sequentially set to 1k Ω, 2k Ω, 5k Ω, and 20k Ω.
By applying the technical scheme provided by the embodiment of the invention, the compatibility of the server and the AOC is effectively ensured. Specifically, the BMC10 may acquire model information of the active optical cable and output I2C data corresponding to the model information, the expansion circuit 20 is connected to the BMC10 through an I2C bus, and may control respective level states of N GPIO ports connected to the PCH30 according to a preset corresponding rule according to the received I2C data. That is, the types of the active optical cables are different, and the respective level states of the N GPIO ports connected to the PCH30 and the extension circuit 20 are correspondingly different. The PCH30 is provided with N pull-up resistors, which correspond to N GPIO ports in sequence. For any GPIO port, when the GPIO port is in the first level state, the pull-up resistor corresponding to the GPIO port is connected to the target SCL line, and when the GPIO port is in the second level state, the pull-up resistor corresponding to the GPIO port is not connected to the target SCL line, that is, the respective level states of the N GPIO ports connected to the extension circuit 20 and the PCH30 are different, and the equivalent pull-up resistors of the target SCL line are correspondingly different. The target SCL line refers to the SCL line in the I2C bus line connecting the PCH30 and the PHY card 40, so it can be seen that, the models of the active optical cables are different, and the equivalent pull-up resistances of the SCL lines in the I2C bus line connecting the PCH30 and the PHY card 40 are different, so that the application effectively ensures the compatibility of the server and the AOC. Moreover, the BIOS does not need to be modified for implementation, and the scheme is convenient to implement.
Corresponding to the above device embodiments, the embodiments of the present invention further provide a connection method for an active optical cable, which is applied to the connection device for an active optical cable in any of the above embodiments, and may be referred to in correspondence with the above.
Referring to fig. 2, it is a flowchart of an implementation of the connection method for an active optical cable according to the present invention, including the following steps:
step S201: the BMC acquires the model information of the active optical cable and outputs I2C data corresponding to the model information;
step S202: and the extension circuit connected with the BMC through the I2C bus controls the respective level states of the N GPIO ports connected with the PCH according to a preset corresponding rule according to the received I2C data.
Step S203: the PCH is provided with N pull-up resistors which sequentially correspond to the N GPIO ports, and aiming at any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with a target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line.
In one embodiment of the present invention, the method further comprises:
the BMC receives the control command and outputs I2C data corresponding to the control command.
In one embodiment of the present invention, the BMC acquiring the model information of the active optical cable and outputting I2C data corresponding to the model information includes:
the BMC obtains model information of the active optical cable through the BIOS and outputs I2C data corresponding to the model information.
In one embodiment of the present invention, N is 4.
In one embodiment of the present invention, the resistance values of the 4 pull-up resistors are 1k Ω, 2k Ω, 5k Ω and 20k Ω in sequence.
Corresponding to the above apparatus and method embodiments, the present invention further provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the method for connecting an active optical cable in any of the above embodiments.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The principle and the implementation of the present invention are explained in the present application by using specific examples, and the above description of the embodiments is only used to help understanding the technical solution and the core idea of the present invention. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention.
Claims (10)
1. An active optical cable connection device, comprising:
the BMC is used for acquiring the model information of the active optical cable and outputting I2C data corresponding to the model information;
the expansion circuit is connected with the BMC through an I2C bus and used for controlling the respective level states of N GPIO ports connected with the PCH according to a preset corresponding rule according to received I2C data; n is a positive integer;
a PHY card connected to the active optical cable;
the PCH connected with the expansion circuit and the PHY card; n pull-up resistors are arranged in the PCH and sequentially correspond to the N GPIO ports, and aiming at any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with a target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line; the target SCL line represents the SCL line in the I2C bus where the PCH is connected to the PHY card.
2. The active optical cable connection device of claim 1, wherein the BMC is further configured to: receive a control command and output I2C data corresponding to the control command.
3. The active optical cable connection device of claim 1, wherein the BMC is specifically configured to: obtaining model information of the active optical cable through the BIOS and outputting I2C data corresponding to the model information.
4. The active optical cable connection device of claim 1, wherein N has a value of 4.
5. The active optical cable connection device of claim 4, wherein the resistance values of the 4 pull-up resistors are 1k Ω, 2k Ω, 5k Ω and 20k Ω in sequence.
6. An active optical cable connection method applied to the active optical cable connection device according to any one of claims 1 to 5, comprising:
the BMC acquires model information of the active optical cable and outputs I2C data corresponding to the model information;
the expansion circuit connected with the BMC through the I2C bus controls the respective level states of N GPIO ports connected with the PCH according to a preset corresponding rule according to the received I2C data;
n pull-up resistors are arranged in the PCH and sequentially correspond to the N GPIO ports, for any GPIO port, when the GPIO port is in a first level state, the pull-up resistor corresponding to the GPIO port is communicated with a target SCL line, and when the GPIO port is in a second level state, the pull-up resistor corresponding to the GPIO port is not communicated with the target SCL line.
7. The method for connecting an active optical cable according to claim 6, further comprising:
the BMC receives the control instruction and outputs I2C data corresponding to the control instruction.
8. The active optical cable connection method of claim 6, wherein the BMC acquires model information of the active optical cable and outputs I2C data corresponding to the model information, comprising:
the BMC obtains model information of the active optical cable through the BIOS and outputs I2C data corresponding to the model information.
9. The method of claim 6, wherein N is 4.
10. A computer-readable storage medium, characterized in that a computer program is stored thereon, which computer program, when being executed by a processor, carries out the steps of the method for connecting an active optical cable according to any one of claims 6 to 9.
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