CN110418121B - Electronic component and projection equipment - Google Patents
Electronic component and projection equipment Download PDFInfo
- Publication number
- CN110418121B CN110418121B CN201810387777.6A CN201810387777A CN110418121B CN 110418121 B CN110418121 B CN 110418121B CN 201810387777 A CN201810387777 A CN 201810387777A CN 110418121 B CN110418121 B CN 110418121B
- Authority
- CN
- China
- Prior art keywords
- address line
- connector
- sub
- address
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/31—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/31—Projection devices for colour picture display, e.g. using electronic spatial light modulators [ESLM]
- H04N9/3141—Constructional details thereof
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
Abstract
The embodiment of the application discloses an electronic component and projection equipment. The electronic assembly comprises a main module and a plurality of sub-modules, wherein the main module is used for controlling the sub-modules; each submodule comprises a processing unit and a first connector; the first connector comprises a plurality of address line connecting ports used for connecting address lines, the address line connecting ports are connected with the processing unit, the processing unit is used for determining the address code of the sub-module according to the detected level of each of the address line connecting ports, and the level of each of the address line connecting ports is determined by whether each of the address line connecting ports is connected with an address line or not. The electronic assembly saves a dial switch required for configuring the address code and a plate for placing the dial switch, saves resources, and simultaneously solves the problem that communication errors between the master control system and the subsystem are caused by the risk of dial errors of the dial switch.
Description
Technical Field
The present application relates to the field of electronic technology, and more particularly, to an electronic component and a projection apparatus.
Background
In a control system, a large number of devices of the same type are often included, and these devices are connected to each other, and each device corresponds to a device node. When a device node needs to implement data exchange, in order to identify each independent device node, each device node in the system is generally configured with a unique identifier, so as to distinguish other device nodes, such as address codes.
For example, in a suite system, the host system needs to communicate with a plurality of subsystems, and each subsystem needs to be configured with an address code, so that the host system can exchange information with the plurality of subsystems based on the address codes of the plurality of subsystems and the communication with each other.
In the setting process of the address code, the address code of the subsystem is generally configured by setting a corresponding dial switch for each subsystem. However, the dial switch has a risk of dial error, which causes communication error between the main control system and the subsystem, and the dial switch needs to be additionally provided with a plate for placing the dial switch, thereby causing resource waste.
Disclosure of Invention
In view of the above problems, the present application provides an electronic assembly and a projection apparatus, so as to solve the problem that a communication error between a main control system and a subsystem is caused by a risk that a dial switch has a dial error, and a board for placing the dial switch needs to be additionally arranged when the dial switch is set, thereby causing resource waste.
In a first aspect, the present application provides an electronic assembly comprising a main module and a plurality of sub-modules, the main module being configured to control the plurality of sub-modules; each sub-module comprises a processing unit and a first connector; the first connector comprises a plurality of address line connectors used for connecting address lines, the plurality of address line connectors are connected with the processing unit, the processing unit is used for determining the address code of the sub-module according to the detected level of each of the plurality of address line connectors, and the level of each of the plurality of address line connectors is determined by whether each of the plurality of address line connectors is connected with an address line or not.
Optionally, each of the sub-modules further comprises a second connector comprising a plurality of address line connectors for connecting address lines; the plurality of sub-modules are sequentially arranged according to a preset sequence, wherein the plurality of address line connecting pieces of the second connector of the previous sub-module are configured to be connected with the plurality of address line connecting pieces of the first connector of the next sub-module, and the plurality of address line connecting pieces of the first connector of the first sub-module are configured to be connected with the address lines of the main module.
Optionally, the main module comprises an interconnected control unit and a third connector comprising a plurality of address line connectors for connecting address lines, wherein the plurality of address line connectors of the first connector of the first ordered sub-module are configured to connect address lines with the plurality of address line connectors of the third connector.
Optionally, each of the sub-modules further comprises a second connector comprising a plurality of address line connectors for connecting address lines; the plurality of address line connectors of the first connector of at least one of the sub-modules are configured to connect to the address lines with the main module, and the plurality of address line connectors of the first connectors of the remaining sub-modules, excluding the at least one sub-module, are configured to connect to the address lines with the plurality of address line connectors of the second connector of any one of the sub-modules.
Optionally, the plurality of address line connectors of the first connectors of all of the sub-modules are configured to connect address lines with the master module.
Optionally, the address line connecting element included in the first connector is connected in series with the processing unit through a resistor, and a pull-up resistor is connected between the resistor and the processing unit; the second connector includes an address line connector that is grounded.
Optionally, the second connector comprises an address line connection connected to ground via a resistor.
In a second aspect, the present application provides a projection device comprising a projection assembly and the above-mentioned electronic assembly.
The application provides a pair of electronic component and projection equipment, through setting up every the submodule piece all includes processing element and first connector, just first connector is including the mode that is used for connecting a plurality of address line connection ports of address line, makes and to follow whether a plurality of address line connection ports are connected with the address line separately and determine the respective level height of a plurality of address line connection ports, and then according to detecting a plurality of address line connection port level height confirm the address code of submodule piece to saved the dial switch that the configuration address code is required, and be used for placing dial switch's panel, saved the resource, still improved simultaneously because dial switch has the problem of communication error between master control system and the subsystem that the risk of dial error caused.
These and other aspects of the present application will be more readily apparent from the following description of the embodiments.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 shows a block diagram of an electronic assembly according to the present application;
FIG. 2 is a block diagram of a sub-module proposed in the present application;
fig. 3 shows a schematic circuit diagram of a sub-module proposed in the present application;
FIG. 4 illustrates a block diagram of another electronic assembly proposed in the present application;
FIG. 5 is a schematic diagram of a sub-module and a main module connecting address lines according to the present disclosure;
FIG. 6 is a block diagram of another sub-module proposed in the present application;
FIG. 7 shows a circuit schematic of another sub-module proposed in the present application;
FIG. 8 is a schematic diagram illustrating the connection of a plurality of sub-modules proposed in the present application;
fig. 9 shows a block diagram of a further electronic assembly proposed by the present application;
fig. 10 shows a block diagram of a projection device according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The address code, usually as an identification of an electronic module, distinguishes the electronic module from other electronic modules. In some suite systems including a master control system and a plurality of subsystems, the master control system needs to communicate with the plurality of subsystems, and each subsystem needs to be configured with an address code, so that the master control system can exchange information with the plurality of subsystems based on the address codes of the plurality of subsystems and the communication among the plurality of subsystems.
For example, in a projection device, the main control board often needs to communicate with a plurality of identical power modules. In order to enable the main control board to distinguish the plurality of power modules for information interaction, address lines need to be allocated to the same power modules.
However, the inventor has found that in the setting of the address code, the address code of the subsystem is generally configured by setting a corresponding dial switch for each subsystem. However, the dial switch has a risk of dial error, which causes communication error between the main control system and the subsystem, and the dial switch needs to be additionally provided with a plate for placing the dial switch, thereby causing resource waste.
Therefore, the inventor provides the electronic assembly and the projection equipment which solve the problem that communication errors between the main control system and the subsystem are caused by the risk that dial errors exist in the dial switch, and the dial switch needs to be additionally arranged on a plate for placing the dial switch, so that resources are wasted.
Embodiments of the present application will be described in detail below with reference to the accompanying drawings.
Referring to fig. 1, an electronic assembly 100 provided in the present application includes a main module 110 and a plurality of sub-modules 120. The main module 110 is used for controlling the plurality of sub-modules 120. In one way, the main module 110 is a main control board integrated with a processor, and the sub-module 120 is a power supply module for supplying power. It should be noted that the number of the sub-modules 120 in fig. 1 is only exemplary, the number of the sub-modules 120 may be increased or decreased according to the actual use environment, and the connection line between the sub-module 120 and the main module 110 in fig. 1 does not represent the number of the actual connection lines, but is used for indicating that there is a signal transmission between each other.
As shown in fig. 2, each of the sub-modules 120 includes a processing unit 121 and a first connector 122. The first connector 122 is configured to receive an address signal and a control signal transmitted from the outside, and the processing unit 121 is configured to process the control signal and the address signal received by the first connector 122. The circuit structure of the sub-module 120 is further described below with reference to fig. 3.
As shown in fig. 3, the first connector 122 has a plurality of connection ports, which are numbered 1-12 in sequence in fig. 3. The plurality of connection ports are all connected with the processing unit U1. The plurality of connection ports include a plurality of connection ports for transmitting control signals and a plurality of address line connection ports for transmitting address signals. Illustratively, in fig. 3, the connection ports labeled 7 and 8 are used as address line connection ports, and the connection ports labeled 1-6 and 9-12 are used as connection ports for transmitting control signals.
The address code of each sub-module 120 is determined by the number of address lines connected to the address line connection ports of the sub-module 120. For the address line determining the address code of each sub-module 120, the address line may be connected to the address line connection ports of other sub-modules 120 through the address line connection ports of the sub-modules 120, or may be directly connected to the main module 110 through the address line connection ports of the sub-modules 120.
With reference to fig. 3, during the operation of the processing unit U1, the processing unit U1 is configured to determine the address code of the sub-module 120 shown in fig. 3 according to the detected level of each of the plurality of address line connection ports, where the level of each of the plurality of address line connection ports is determined by whether an address line is connected to each of the plurality of address line connection ports. It can be understood that the address signals transmitted by the plurality of address line connection ports are signals with respective high and low levels.
How to determine the level based on whether the address lines are connected to the respective address line connection ports will be described below with reference to fig. 4 and 5.
As shown in fig. 5, the main module 110 includes a control unit 111 and a third connector 112 as one mode. Similarly, the connection ports labeled 7 and 8 in the third connector 112 are used as address line connection ports, and the address line connection ports included in the third connector 112 may be directly connected to ground through a conductive wire or may be connected to ground through a resistor with a lower resistance, which may be a resistor with a resistance of 22R or a resistor with a resistance of 100R. In fig. 4, the third connector 112 includes an address line connection port connected to ground through resistors R5 and R6.
As shown in fig. 5, as one mode, connection ports of the first connector 122, which are numbered 7 and 8, are used as address line connection ports. The first connector 122 includes a plurality of address line connection ports all connected in series with the processing unit through a resistor, and a pull-up resistor is connected between the resistor and the processing unit. The address line connection port marked with 7 is connected with the processing unit in series through a resistor R4, the address line connection port marked with 8 is connected with the processing unit in series through a resistor R3, a pull-up resistor R2 is connected between the resistor R4 and the processing unit U1, and a pull-up resistor R1 is connected between the resistor R3 and the processing unit U1.
In this case, when an address line is connected between the connection port numbered 7 of the first connector 122 and the connection port numbered 8 of the third connector 112, and an address line is connected between the connection port numbered 8 of the first connector 122 and the connection port numbered 7 of the third connector 112, the pull-up resistors R1 and R2 are both short-circuited, and therefore, the processing unit U1 detects that the levels of the pins GP0 and GP1 are both low, and the processing unit U1 recognizes that the address code of the sub-module 120 is 00. If an address line is connected between the connection port numbered 7 of the first connector 122 and the connection port numbered 8 of the third connector 112, and no address line is connected between the connection port numbered 8 of the first connector 122 and the connection port numbered 7 of the third connector 112, the processing unit U1 recognizes that the address code of the sub-module 120 is 01.
It should be noted that, in the sub-module 120, specifically, how many connection ports in the first connector 122 are used as the address line connection ports may be set as needed. For example, when the address code needs to be configured for four sub-modules 120 in total, the address codes of the four sub-modules 120 may be set to 00, 01, 10, and 11, respectively. In this case, only 2 address lines are needed to generate the four address codes when connecting the address lines between the two sub-modules 120. For another example, when the configuration address code is required for eight sub-modules 120 in total, the address codes of the eight sub-modules 120 may be set to 000, 001, 010, 011, 100, 101, 110, and 111, respectively. Then, when connecting the address lines between the two sub-modules 120, only 3 address lines are needed to generate the four address codes. That is, if n address lines are used, an address code of 2 to the power of n can be generated. It is understood that the number of address line connection ports used for connecting address lines in the first connector 122, the second connector 123, and the third connector 112 and the number of bits of the configured address code are the same, for example, when the address code is 2 bits, the number of address line connection ports used for connecting address lines is 2, and when the address code is 3 bits, the number of address line connection ports used for connecting address lines is 3.
As one way, as shown in fig. 6, each of the sub-modules 120 further includes a second connector 123, and the second connector 123 includes a plurality of connection ports including a plurality of address line connection ports for transmitting address signals and a plurality of connection ports for transmitting control signals, similar to the first connector 122. In one mode, as shown in fig. 7, the address line connection port in the second connector 123 is grounded through resistors R5 and R6. In the case where each sub-module 120 further includes the second connector 123, the main module 110 and the plurality of sub-modules 120 may be sequentially arranged in a predetermined order, for example, connected in a ring-shaped manner.
In the case of a ring connection, the plurality of address line connection ports of the second connector 123 of the previous submodule 120 are configured to be connectable with the plurality of address line connection ports of the first connector 122 of the next submodule 120, wherein the plurality of address line connection ports of the first connector 122 of the submodule 120 ordered first is configured to connect address lines with the main module 110. Similar to the foregoing, the main module 110 includes a control unit 111 and a third connector 112 connected to each other, the third connector 112 includes a plurality of address line connection ports for connecting address lines, wherein the plurality of address line connection ports of the first connector 122 of the first-ranked sub-module 120 are configured to connect address lines with the plurality of address line connection ports of the third connector 112. By means of the ring-connection manner, when the sub-module 120 needs to be added, the address lines of the sub-module 120 that needs to be added can be directly connected with the plurality of address line connection ports on the second connector 123 of the last sub-module 120.
Next, a mode in which the plurality of sub-modules 120 are sequentially connected by loop will be described with reference to fig. 8. In fig. 8, four sub-modules are included, which are sub-module 120a, sub-module 120b, sub-module 120c, and sub-module 120d, respectively. It should be noted that the sub-modules 120a, 120b, 120c, 120d and 120d are the same in structure, and are named separately for convenience of describing their respective connection relationships.
Setting different address codes for the sub-modules 120a, 120b, 120c and 120d can be realized by connecting 2 address lines. In this case, as a way, the third connector 112 connects 2 address lines with the first connector 122a of the first-ranked submodule 120a and 1 address line with the second connector 123a of the first-ranked submodule 120a and the first connector 122b of the next submodule 120b, and similarly, the second connector 123b of the submodule 120b connects 1 address line with the first connector 122c of the next submodule 120c, and the second connector 123c of the submodule 120c does not connect an address line with the first connector 122d of the next submodule 120d, and the second connector 123d of the submodule 120d does not connect an address line. In the figure, the symbol "X" indicates that no address line is connected here.
Of course, in addition to arranging the sub-modules 120 in sequence according to the preset sequence, as shown in fig. 9, in an electronic assembly 200 provided, the address lines of all the sub-modules 120 may be configured to be connected to the main module 110, or the address lines of some of the sub-modules 120 may be configured to be connected to the main module 110. It is understood that the connection line between main module 110 and sub-module 120 in fig. 9 is an address line between the address line connection ports, and the symbol "X" in the figure still indicates that no address line is connected here.
In this case, the plurality of address line connection ports of the first connector of at least one of the sub-modules 120 are configured to connect address lines with the main module 110, and the plurality of address line connection ports of the first connectors of the remaining sub-modules 120 except the at least one sub-module 120 are configured to connect address lines with the plurality of address line connection ports of the second connector of any one of the sub-modules 120.
Referring to fig. 10, an embodiment of the present application provides a projection device 300, where the projection device 300 includes a projection element 310 and an electronic element 320, the electronic element 320 is used to supply power to the projection element 310 and control the projection element 310 to operate based on a control instruction, and an internal structure of the electronic element 320 is the same as the structure of the electronic element 100 provided in the foregoing embodiments, and is not described again here.
To sum up, the electronic component and projection equipment that this application provided are through setting up every the submodule piece all includes processing unit and first connector, just first connector is including the mode that is used for connecting the a plurality of address line connection ports of address line, makes and can be according to a plurality of address line connection ports are connected with the address line respectively and determine the respective level height of a plurality of address line connection ports, and then confirm according to the respective level height of a plurality of address line connection ports that detect the address code of submodule piece to saved the required dial switch of configuration address code, and be used for placing dial switch's panel, saved the resource, still improve the dial switch simultaneously and have the risk of dial error and cause communication error's between main control system and the subsystem problem.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and the scope of the preferred embodiments of the present application includes other implementations in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not necessarily depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (5)
1. An electronic assembly, comprising a main module and a plurality of sub-modules, wherein the sub-modules are power supply modules for supplying power, and the main module is used for controlling the sub-modules;
each sub-module comprises a processing unit, a first connector and a second connector;
the first connector comprises a plurality of address line connectors for connecting address lines, the plurality of address line connectors are connected with the processing unit, the processing unit is used for determining the address code of the sub-module according to the detected level of each of the plurality of address line connectors, the level of each of the plurality of address line connectors is determined by whether each of the plurality of address line connectors is connected with an address line, and the second connector comprises a plurality of address line connectors for connecting address lines;
the plurality of address line connectors of the first connector of at least one of the sub-modules are configured to connect to the address lines with the main module, and the plurality of address line connectors of the first connectors of the remaining sub-modules, excluding the at least one sub-module, are configured to connect to the address lines with the plurality of address line connectors of the second connector of any sub-module;
the address line connecting piece of the first connector is connected with the processing unit in series through a resistor, and a pull-up resistor is connected between the resistor and the processing unit; the second connector includes an address line connector that is grounded.
2. The electronic assembly of claim 1, wherein the plurality of sub-modules are arranged in a predetermined order, wherein the plurality of address line connectors of the second connector of a previous sub-module are configured to connect with the plurality of address line connectors of the first connector of a subsequent sub-module, and wherein the plurality of address line connectors of the first connector of the first-ranked sub-module are configured to connect with the main module.
3. The electronic assembly of claim 2, wherein the main module comprises a control unit and a third connector connected to each other, the third connector comprising a plurality of address line connectors for connecting address lines, wherein the plurality of address line connectors of the first connector of the first-ordered sub-module are configured to connect address lines with the plurality of address line connectors of the third connector.
4. The electronic component of claim 1, wherein the pull-up resistor has a resistance of 4.7K ohms, and the resistor connected in series between the address line connection of the first connector and the processing unit is a 22R resistor or a 100R resistor.
5. A projection device comprising a projection assembly and the electronic assembly of any of claims 1-4.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810387777.6A CN110418121B (en) | 2018-04-26 | 2018-04-26 | Electronic component and projection equipment |
| PCT/CN2019/070538 WO2019205736A1 (en) | 2018-04-26 | 2019-01-05 | Electronic component and projection device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810387777.6A CN110418121B (en) | 2018-04-26 | 2018-04-26 | Electronic component and projection equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110418121A CN110418121A (en) | 2019-11-05 |
| CN110418121B true CN110418121B (en) | 2021-09-28 |
Family
ID=68294382
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810387777.6A Active CN110418121B (en) | 2018-04-26 | 2018-04-26 | Electronic component and projection equipment |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN110418121B (en) |
| WO (1) | WO2019205736A1 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113301181B (en) * | 2021-05-19 | 2023-08-22 | 漳州科华技术有限责任公司 | Parallel operation address identification system and cabinet |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0963126A2 (en) * | 1998-06-04 | 1999-12-08 | Alps Electric Co., Ltd. | System of starting and terminating data communication |
| CN104881382A (en) * | 2015-06-15 | 2015-09-02 | 刘晓辉 | Master and slave equipment connection device and address recognition method thereof |
| CN106095711A (en) * | 2016-08-25 | 2016-11-09 | 威胜电气有限公司 | Attachment means and communication means for the communication of principal and subordinate's module |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1825784A (en) * | 2006-04-07 | 2006-08-30 | 北京中科信电子装备有限公司 | Communication method and apparatus |
| JP6596935B2 (en) * | 2015-06-01 | 2019-10-30 | セイコーエプソン株式会社 | Display device, display system, and display device control method |
-
2018
- 2018-04-26 CN CN201810387777.6A patent/CN110418121B/en active Active
-
2019
- 2019-01-05 WO PCT/CN2019/070538 patent/WO2019205736A1/en active Application Filing
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0963126A2 (en) * | 1998-06-04 | 1999-12-08 | Alps Electric Co., Ltd. | System of starting and terminating data communication |
| CN104881382A (en) * | 2015-06-15 | 2015-09-02 | 刘晓辉 | Master and slave equipment connection device and address recognition method thereof |
| CN106095711A (en) * | 2016-08-25 | 2016-11-09 | 威胜电气有限公司 | Attachment means and communication means for the communication of principal and subordinate's module |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110418121A (en) | 2019-11-05 |
| WO2019205736A1 (en) | 2019-10-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100580965B1 (en) | Bus interface system and method | |
| JP4015248B2 (en) | Communication network and communication network configuration method | |
| CN111289922B (en) | Cable plugging detection method and related equipment | |
| EP2863317A2 (en) | Method for automatically setting ID in UART ring communication | |
| CN104516838A (en) | Management path determining method and device | |
| CN107770021A (en) | Home bus system HBS circuits, signal conversion method and device | |
| CN117978811B (en) | Mapping relation determination method and system, storage medium and electronic device | |
| CN116032746B (en) | Information processing method and device of resource pool, storage medium and electronic device | |
| CN110418121B (en) | Electronic component and projection equipment | |
| CN105718403A (en) | Expansion interface and method for data communication through same | |
| CN108897710B (en) | System for automatically switching system management bus | |
| CN103412838B (en) | A kind of expanding system, communication means, address configuration method, equipment and device | |
| CN109547274A (en) | A kind of enclosure board switching method, device and first network equipment | |
| JP2007295774A (en) | Power supply system and system power source | |
| CN113661688B (en) | Circuit for connecting a measuring transducer | |
| CN107155359A (en) | Method, user equipment and the external equipment of multiplexing peripheral interface | |
| CN115480975A (en) | Wiring checking method and device | |
| CN110380719A (en) | Data transmission circuit, control system and the control device of chip | |
| CN209015145U (en) | A kind of information output apparatus | |
| JP2000040040A (en) | Data communication device and storage medium storing program | |
| US11080224B2 (en) | Method, baseboard management controller and system for establishing a serial-over-LAN connection | |
| CN106898923B (en) | Interface connection method and interface connection device of network equipment | |
| KR102239008B1 (en) | Sensor module for a vehicle and method for assigning sensor id using the system | |
| CN221622230U (en) | External equipment and robot | |
| US20090213872A1 (en) | Integrated universal input-output interface circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |