CN112461506B - Automatic test circuit for multipath APD and PIN light receiving device - Google Patents
Automatic test circuit for multipath APD and PIN light receiving device Download PDFInfo
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- CN112461506B CN112461506B CN202110114347.9A CN202110114347A CN112461506B CN 112461506 B CN112461506 B CN 112461506B CN 202110114347 A CN202110114347 A CN 202110114347A CN 112461506 B CN112461506 B CN 112461506B
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Abstract
The invention relates to the technical field of optics, and discloses an automatic test circuit for a multi-channel APD and PIN light receiving device. The automatic test circuit for the multipath APD and PIN light receiving devices comprises a master control single chip microcomputer, a signal detection circuit, a bias voltage adjusting circuit, a voltage conversion circuit and a signal conversion circuit. The digital testing signal is generated through the main control single chip microcomputer, the signal conversion circuit converts the digital testing signal into an analog voltage signal and sends the analog voltage signal to the bias voltage adjusting circuit, the bias voltage adjusting circuit performs multi-path bias voltage adjustment according to the analog voltage signal to obtain multi-path bias voltage, the signal detection circuit generates corresponding multi-path testing current according to the detected multi-path bias voltage to obtain a detection result and sends the detection result to the signal conversion circuit, the signal conversion circuit generates digital testing information according to the detection result and sends the digital testing information to the main control single chip microcomputer, so that the main control single chip microcomputer receives the digital testing information and completes automatic testing of the optical device according to the testing information.
Description
Technical Field
The invention relates to the technical field of optics, in particular to an automatic test circuit for a multi-channel APD and PIN light receiving device.
Background
The optical receiving device is one of the important components of the optical transmission system, and the performance and the working state of the optical receiving device directly affect the working condition of the optical transmission system. The light receiving device needs to provide photodiode bias voltage and supply voltage of the trans-impedance amplifier during research, development, testing and production coupling processes, and simultaneously monitors parameter values of related quantities. At present, the traditional test method for the light receiving device needs various devices such as voltage sources, current sources and multimeters, has complex connecting circuits and higher cost, and is difficult to carry out automatic test.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The invention mainly aims to provide an automatic test circuit for a multi-path APD and PIN light receiving device, and aims to solve the technical problem that the test effect of the traditional light receiving device test in the prior art is poor.
In order to achieve the aim, the invention provides an automatic test circuit for a multipath APD and PIN light receiving device, which comprises a master control single chip microcomputer, a signal detection circuit, a bias voltage regulation circuit, a voltage conversion circuit and a signal conversion circuit;
the master control single chip microcomputer is used for generating a digital test signal and sending the digital test signal to the signal conversion circuit;
the signal conversion circuit is used for receiving the digital test signal, performing analog-to-digital conversion according to the digital test signal and generating a plurality of paths of analog voltage regulating signals;
the bias voltage regulating circuit is used for obtaining multi-path bias voltages according to the multi-path analog voltage regulating signals, applying the multi-path bias voltages to the APD and PIN light receiving devices to be tested and generating corresponding multi-path test currents;
the signal detection circuit is used for detecting the multi-path test current to obtain a detection result and sending the detection result to the signal conversion circuit;
the signal conversion circuit is also used for generating digital test information according to the detection result and sending the digital test information to the main control single chip microcomputer so that the main control single chip microcomputer receives the digital test information and completes automatic testing of the optical device according to the digital test information;
and the voltage conversion circuit is used for converting the system voltage of the universal interface into stable power supply voltage suitable for the work of each component.
Optionally, the signal detection circuit includes an APD and PIN photodiode current detection circuit and a transimpedance amplifier current detection circuit;
the digital signal transmission end of the master control single chip microcomputer is connected with the digital signal transmission end of the signal conversion circuit, the analog signal output end of the signal conversion circuit is connected with the input end of the bias voltage adjusting circuit, and the analog signal input end of the signal conversion circuit is connected with the signal output ends of the APD and PIN photodiode current detection circuit and the signal output end of the transimpedance amplifier current detection circuit.
Optionally, the bias voltage adjusting circuit includes a bias voltage adjusting chip, a first resistor and a second resistor;
the signal input end of the bias voltage adjusting chip is connected with the analog signal output end of the signal conversion circuit, the signal input end of the bias voltage adjusting chip is further connected with the first end of the first resistor and the first end of the second resistor respectively, the voltage output end of the bias voltage adjusting chip is connected with the second end of the first resistor, and the second end of the second resistor is grounded.
Optionally, the APD and PIN photodiode current detection circuit includes a photodiode current detection chip, a third resistor, a first capacitor, and a second capacitor;
the positive voltage input end of the photodiode current detection chip is connected with the voltage output end of the bias voltage regulation chip, the positive voltage input end of the photodiode current detection chip is further respectively connected with the first end of the first capacitor and the first end of the third resistor, the second end of the first capacitor is grounded, the negative voltage input end of the photodiode current detection chip is connected with the second end of the third resistor, the power supply voltage input end of the photodiode current detection chip is connected with the first end of the second capacitor, the second end of the second capacitor is grounded, and the signal output end of the photodiode current detection chip is connected with the analog signal input end of the signal conversion circuit.
Optionally, the transimpedance amplifier current detection circuit includes a transimpedance amplifier current detection chip, a fourth resistor, a third capacitor, and a fourth capacitor;
the positive voltage input end of the transimpedance amplifier current detection chip is respectively connected with the first end of the fourth resistor and the first end of the third capacitor, the second end of the third capacitor is grounded, the negative voltage input end of the transimpedance amplifier current detection chip is also respectively connected with the second end of the fourth resistor, the signal output end of the transimpedance amplifier current detection chip is respectively connected with the analog signal input end of the signal conversion circuit and the first end of the fourth capacitor, and the second end of the fourth capacitor is grounded.
Optionally, the automatic test circuit for the multiple APD and PIN optical devices further comprises an APD and PIN optical receiving device to be tested, a fifth resistor and a fifth capacitor, wherein the APD and PIN optical receiving device (ROSA) comprises an APD or PIN photodiode and a transimpedance amplifier;
and the RSSI signal output ends of the APD and PIN light receiving devices are connected with the first end of the fifth resistor, the RSSI signal output ends of the APD and PIN light receiving devices are also respectively connected with the first end of the fifth capacitor and the analog signal input end of the signal conversion circuit, and the second end of the fifth resistor and the first end of the fifth capacitor are respectively grounded.
Optionally, the voltage conversion circuit includes a first voltage conversion chip, a sixth resistor, a sixth capacitor, a seventh capacitor, and an eighth capacitor, and the voltage conversion circuit further includes a second voltage conversion chip, a ninth capacitor, and a tenth capacitor;
the voltage output end of the first voltage conversion chip is connected with the voltage input end of the bias voltage regulating circuit, the voltage output end of the first voltage conversion chip is further connected with the first end of the sixth resistor and the first end of the sixth capacitor respectively, the feedback end of the first voltage conversion chip is connected with the second end of the sixth resistor, the second end of the sixth capacitor is grounded, the voltage input end of the first voltage conversion chip is connected with the voltage output end of a system power supply, the voltage input end of the first voltage conversion chip is further connected with the first end of the seventh capacitor and the first end of the eighth capacitor respectively, and the second end of the seventh capacitor and the second end of the eighth capacitor are grounded respectively;
the voltage output end of the bias voltage regulating circuit is connected with the bias voltage input end of the APD and PIN photodiode current detection circuit;
the voltage input end of the second voltage conversion chip is connected with the voltage output end of the system power supply, the voltage input end of the second voltage conversion chip is respectively connected with the first end of the ninth capacitor and the first end of the tenth capacitor, the second end of the ninth capacitor and the second end of the tenth capacitor are respectively grounded, and the voltage output end of the second voltage conversion chip is respectively connected with the power supply voltage input end of the APD and PIN photodiode current detection circuit and the power supply voltage input end of the transimpedance amplifier current detection circuit.
Optionally, the signal conversion circuit includes a digital-to-analog conversion circuit, and the digital-to-analog conversion circuit includes a digital-to-analog conversion chip and a seventh resistor;
the digital signal input end of the digital-to-analog conversion chip is connected with the digital signal output end of the main control single chip microcomputer, the analog signal output end of the digital-to-analog conversion chip is connected with the first end of the seventh resistor, and the second end of the seventh resistor is connected with the signal input end of the bias voltage adjusting circuit.
Optionally, the signal conversion circuit further includes an analog-to-digital conversion circuit, where the analog-to-digital conversion circuit includes an analog-to-digital conversion chip, an eleventh capacitor, and a twelfth capacitor;
the analog signal input end of the analog-to-digital conversion chip is connected with the signal output end of the signal detection circuit, and the digital signal output end of the analog-to-digital conversion chip is connected with the digital signal input end of the master control single chip microcomputer.
Optionally, the automatic test circuit for the multiple APD and PIN optical devices further includes a universal bus interface circuit, a signal receiving end of the universal bus interface circuit is connected with a signal sending end of the master control single chip, and a voltage output end of the universal bus interface circuit is connected with a system voltage input end of the voltage conversion circuit.
The invention provides an automatic test circuit for a plurality of paths of APDs and PIN light receiving devices. The invention generates digital test signals through a main control single chip microcomputer, sends the digital test signals to a signal conversion circuit, the signal conversion circuit receives the digital test signals, generates a plurality of paths of analog voltage regulating signals according to the digital test signals, sends the plurality of paths of analog voltage regulating signals to a bias voltage regulating circuit to obtain a plurality of paths of bias voltages, loads the bias voltages to an APD and a PIN light receiving device to be tested to generate corresponding plurality of paths of test currents, a signal detection circuit detects the plurality of paths of test currents to obtain detection signals, sends the detection signals to an analog-to-digital conversion chip of the signal conversion circuit, generates test information according to the detection signals, and sends the test information to the main control single chip microcomputer so that the main control single chip microcomputer receives the test information, completes automatic test of the optical device according to the test information, generates the test signals to control, and the signal conversion circuit performs a plurality of paths of voltage regulation on the bias, the test device is used for testing a plurality of optical devices, so that multi-path automatic test is realized, and the test performance of the optical device test is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a first embodiment of an automatic test circuit for a multi-channel APD and PIN photo-receiving device according to the present invention;
FIG. 2 is a schematic structural diagram of a second embodiment of an automatic test circuit for multiple APDs and PIN photo-receiving devices according to the present invention;
FIG. 3 is a schematic circuit diagram of an embodiment of an automatic test circuit for multiple APDs and PIN photo-receiving devices according to the present invention;
FIG. 4 is a diagram showing the software interface of the upper computer according to the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 100 | Master control single chip microcomputer | U1 | Bias voltage adjusting |
| 200 | Signal detection circuit | U2 | Photodiode |
| 300 | Bias voltage regulating circuit | U3 | Current detection chip of |
| 400 | Voltage conversion circuit | U4 | First |
| 500 | Signal conversion circuit | U5 | Second |
| 600 | Universal bus interface circuit | U6 | Digital-to-analog conversion chip |
| ROSA | APD and PIN light receiving device | U7 | Analog-to- |
| 201 | APD and PIN photodiode current detection circuit | IMON | APD photodiode detection |
| 202 | Current detection circuit of trans-impedance amplifier | RSSI | PIN photodiode detection |
| 501 | Digital-to-analog conversion circuit | R1~R7 | First to seventh resistors |
| 502 | Analog-to-digital conversion circuit | VCC | Supply voltage input/output terminal |
| C1~C12 | First to twelfth capacitors | ICC | Trans-impedance amplifier detection signal transmission terminal |
| VBUS | Input/output terminal of system power supply voltage |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.
In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should be considered to be absent and not within the protection scope of the present invention.
It should be noted that, in the practical application of the present invention, the software program is inevitably applied to the software program, but the applicant states that the software program applied in the embodiment of the present invention is the prior art, and in the present application, the modification and protection of the software program are not involved, but only the protection of the hardware architecture designed for the purpose of the invention.
The invention provides an automatic test circuit for a multi-channel APD and PIN light receiving device, and referring to fig. 1, fig. 1 is a schematic structural diagram of a first embodiment of the automatic test circuit for the multi-channel APD and PIN light receiving device.
The automatic test circuit for the multipath APD and PIN light receiving devices comprises: the main control single chip microcomputer 100, a signal detection circuit 200, a bias voltage adjusting circuit 300, a voltage conversion circuit 400 and a signal conversion circuit 500.
The main control single chip microcomputer 100 is configured to generate a digital test signal and send the digital test signal to the signal conversion circuit 500.
It should be noted that the main control single chip microcomputer 100 may be a core processor for implementing automatic testing of multiple optical devices, the main control single chip microcomputer 100 may be mainly used for performing communication interaction with the signal conversion circuit 500 and controlling the bias voltage adjustment circuit 300 to implement testing of multiple optical devices, the main control single chip microcomputer 100 may also be used for communicating with an upper computer or a mobile terminal, and the like, where the upper computer may be a computer for sending a test operation instruction, and the mobile terminal may be a mobile phone, a notebook, a tablet computer, a POS machine, or even a mobile device such as a vehicle-mounted computer, and this embodiment does not limit this.
It is understood that the test signal can be used to start the operation of the signal detection circuit 200 and the signal conversion circuit 500, and can also be used to make the bias voltage adjustment circuit 300 adjust the output voltage to obtain the bias voltage required during the test. In a specific implementation, the test signal may be a digital signal for operating the signal conversion circuit 500, and the test signal may also be an analog voltage signal for operating the signal detection circuit 200 normally, which is not limited in this embodiment.
The signal conversion circuit 500 is configured to receive the digital test signal, perform analog-to-digital conversion according to the digital test signal, and generate a plurality of analog voltage adjustment signals;
the bias voltage adjusting circuit 300 is configured to obtain multiple paths of bias voltages according to the multiple paths of analog voltage adjusting signals, apply the multiple paths of bias voltages to the APD and PIN photoreceiving devices to be tested, and generate corresponding multiple paths of test currents;
the signal detection circuit 200 is configured to detect the multiple paths of test currents to obtain a detection result, and send the detection result to the signal conversion circuit 500.
It should be noted that, when the bias voltage adjusting circuit 300 performs the optical device test, a bias voltage required in the test process needs to be generated, and the bias voltage may be a dc voltage suitable for the operation of the APD photodiode. In the multi-channel optical device test circuit, the offset voltage adjusting circuit 300 and the signal detection circuit 200 may be configured in multiple channels to enhance the test performance of the test circuit, and the number of the channels of the offset voltage adjusting circuit 300 and the signal detection circuit 200 may be set according to the actual requirement of the user, which is not limited in this embodiment.
It can be understood that the signal detection circuit 200 can detect different types of optical devices, such as PIN photodiode detection and APD avalanche photodiode, so as to further improve the test performance of the test circuit. A bias voltage is input to the optical device so that a test current is generated in the optical device, which is not limited by the present embodiment.
The signal conversion circuit 500 is further configured to generate digital test information according to the detection result, and send the digital test information to the main control single chip microcomputer 100, so that the main control single chip microcomputer 100 receives the digital test information and completes automatic testing of an optical device according to the digital test information;
the voltage converting circuit 400 is used to convert the system voltage of the universal interface into a stable power voltage suitable for the operation of each component.
It should be understood that, the signal detection circuit 200 detects the test current flowing through the optical device to obtain a detection signal, where the detection signal may be a voltage signal converted from a current signal corresponding to the test current, the signal conversion circuit 500 may also be configured to convert the detected voltage signal into a numerical value, that is, convert an analog voltage signal into a digital signal, and the test information may be a converted digital signal, so that the main control single chip 100 receives the digital signal to implement automatic testing of multiple optical devices, which is not limited in this embodiment.
In this embodiment, through the above circuit, the digital signal output terminal of the main control single chip is connected to the digital signal input terminal of the signal conversion circuit, a digital test signal is generated by the main control single chip, the digital test signal is sent to the signal conversion circuit, the signal conversion circuit receives the test signal, generates a plurality of analog voltage signals according to the test signal, and sends the analog voltage signals to the plurality of voltage regulation circuits, the voltage regulation circuits output a plurality of bias voltages according to the voltage signal, generate a plurality of corresponding test currents according to the plurality of bias voltages, the detection circuits detect the plurality of test currents to obtain a detection result, generate test information according to the detection result, and send the test information to the main control single chip, so that the main control single chip receives the test information, completes the automatic test of the optical device according to the test information, the main control single chip generates, the test device is used for testing a plurality of optical devices, so that multi-path automatic test is realized, and the test performance of the optical device test is improved.
Based on the first embodiment of the present invention, a second embodiment of the automatic test circuit for the multiple APD and PIN photo-receiving devices is proposed, referring to fig. 2, 3 and 4, fig. 2 is a schematic structural diagram of the second embodiment of the automatic test circuit for the multiple APD and PIN photo-receiving devices of the present invention, fig. 3 is a schematic circuit diagram of an embodiment of the automatic test circuit for the multiple APD and PIN photo-receiving devices of the present invention, and fig. 4 is a diagram showing a software interface of an upper computer of the present invention.
In a second embodiment, the signal detection circuit includes an APD and PIN photodiode current detection circuit and a transimpedance amplifier current detection circuit.
The digital signal transmission end of the master control single chip microcomputer is connected with the digital signal transmission end of the signal conversion circuit, the analog signal output end of the signal conversion circuit is connected with the input end of the bias voltage adjusting circuit, and the analog signal input end of the signal conversion circuit is connected with the signal output ends of the APD and PIN photodiode current detection circuit and the signal output end of the transimpedance amplifier current detection circuit.
It should be noted that the detection circuit may detect different types of optical devices, such as PIN photodiode detection and APD avalanche photodiode, the photodiode current detection circuit 201 is configured to perform a multi-path test on the photodiode, and the transimpedance amplifier current detection circuit is configured to monitor a working current of a transimpedance amplifier in the optical receiver.
It is understood that the signal detection circuit 200 can detect different types of optical devices, and is not limited to the detection circuits of two types of optical devices in this embodiment, and the detection of other optical devices with similar functions can be performed by referring to or analogy to the photodiode current detection circuit 201 and the transimpedance amplifier current detection circuit 202, which is not limited in this embodiment.
In the present embodiment, the bias voltage adjusting circuit 300 includes a bias voltage adjusting chip U1, a first resistor R1 and a second resistor R2;
the signal input end of the bias voltage adjusting chip U1 is connected with the analog signal output end of the signal conversion circuit 500, the signal input end of the bias voltage adjusting chip U1 is further connected with the first end of the first resistor R1 and the first end of the second resistor R2 respectively, the voltage output end of the bias voltage adjusting chip U1 is connected with the second end of the first resistor R1, and the second end of the second resistor R2 is grounded.
It should be noted that the test voltage is input to the bias voltage adjusting chip U1, the first resistor R1, the second resistor R2 and the chip U1 can generate the bias voltage, and the bias voltage is applied to the test current generated by the APD under test and the PIN photo receiver, i.e., the bias current, which is not limited in this embodiment.
It can be understood that the first resistor R1 and the second resistor R2 are feedback resistors of the bias voltage adjusting chip U1, and the output bias voltage can be divided by the first resistor R1 and the second resistor R2 and then fed back to the feedback terminal of the U1, so that the output voltage of the bias voltage adjusting chip U1 can be stabilized, which is not limited in this embodiment.
In this embodiment, the APD and PIN photodiode current detection circuit 201 further includes a photodiode current detection chip U2, a third resistor R3, a first capacitor C1 and a second capacitor C2;
the positive voltage input end of the photodiode current detection chip U2 is connected to the voltage output end of the bias voltage adjustment chip U1, the positive voltage input end of the photodiode current detection chip U2 is further connected to the first end of the first capacitor C1 and the first end of the third resistor R3, the second end of the first capacitor C1 is grounded, the negative voltage input end of the photodiode current detection chip U2 is connected to the second end of the third resistor R3, the power supply voltage input end of the photodiode current detection chip U2 is connected to the first end of the second capacitor C2, the second end of the second capacitor C2 is grounded, and the signal output end of the photodiode current detection chip U2 is connected to the analog signal input end of the signal conversion circuit 500.
Note that IMON is an APD photodiode detection signal transmission terminal. The photodiode current detection chip U2 may be used to detect a bias current flowing through the APD photodiode to obtain a corresponding voltage signal, and the bias current may be used as one of important parameters for performing coupling observation and responsivity calculation on the optical device, which is not limited in this embodiment.
It can be understood that the third resistor R3 is a sampling resistor for APD photodiode current, the voltage generated by the photodiode bias current at the two ends of the third resistor R3 is amplified by the photodiode current detection chip U2, so as to improve the ability of detecting weak current, the signal output end of the photodiode current detection chip U2 sends the voltage signal to the analog signal input end of the signal conversion circuit 500 for analog-to-digital conversion, the first capacitor C1 and the second capacitor C2 can be filter capacitors of the photodiode current detection chip U2, one end of the first capacitor C1 and the other end of the second capacitor C2 are grounded and connected to the circuit, so as to have a filtering function, when the current voltage passes through the capacitors, noise passes from the positive pole to the negative pole, and then directly enters the ground, and the capacitors can eliminate noise.
In the present embodiment, the transimpedance amplifier current detection circuit 202 includes a transimpedance amplifier current detection chip U3, a fourth resistor R4, a third capacitor C3, and a fourth capacitor C4;
the positive voltage input end of the transimpedance amplifier current detection chip U3 is connected to the first end of the fourth resistor R4 and the first end of the third capacitor C3, the second end of the third capacitor C3 is grounded, the negative voltage input end of the transimpedance amplifier current detection chip U3 is also connected to the second end of the fourth resistor R4, the signal output end of the transimpedance amplifier current detection chip U3 is connected to the analog signal input end of the signal conversion circuit 500 and the first end of the fourth capacitor C4, and the second end of the fourth capacitor C4 is grounded.
As can be appreciated, the ICC is the transimpedance amplifier current sense signal output. The working current of the transimpedance amplifier flows through the fourth resistor R4, a voltage is generated at both ends of the fourth resistor R4, and the transimpedance amplifier current detection chip U3 can amplify the voltage and send the amplified voltage to the analog signal input end of the signal conversion circuit, which is not limited in this embodiment.
It can be understood that the fourth resistor R4 is a current sampling resistor of the transimpedance amplifier, the generated voltage can be amplified by the transimpedance amplifier current detection chip U3, the third capacitor C3 and the fourth capacitor C4 can be filter capacitors of the transimpedance amplifier current detection chip U3, one end of the third capacitor C3 and the other end of the fourth capacitor C4 are grounded, and the other end is connected to the circuit, which can have a filtering function.
In this embodiment, the automatic test circuit for the multiple APD and PIN light receiving devices further includes an APD and PIN light receiving device ROSA to be tested, where the APD and PIN light receiving device ROSA includes an APD, a PIN photodiode, and a transimpedance amplifier;
an APD photodiode bias end of the APD and PIN photoreceiver ROSA is connected to a bias voltage output end of the APD photodiode current detection circuit 201, a transimpedance amplifier power input end of the APD and PIN photoreceiver ROSA is connected to a voltage output end of the transimpedance amplifier current detection circuit 202, a PIN photodiode RSSI signal output end of the APD and PIN photoreceiver ROSA is further connected to a first end of the fifth resistor R5 and a first end of the fifth capacitor C5, and a second end of the fifth resistor R5 and a second end of the fifth capacitor C5 are grounded, respectively.
It should be noted that the RSSI is a PIN photodiode detection signal transmission terminal. The current signals detected by the photodiode current detection circuit 201 and the transimpedance amplifier current detection circuit 202 are converted into corresponding voltage signals, which is not limited in this embodiment.
It can be understood that the fifth resistor R5 is an RSSI current sampling resistor of the PIN photodiode, a current flowing through the fifth resistor will generate a corresponding voltage at its two ends, the fifth capacitor C5 is a filter capacitor of an RSSI voltage signal, one end of the fifth resistor R5 and one end of the fifth capacitor C5 are grounded, and the other end is connected to the circuit, which may have a filtering function.
In this embodiment, the voltage converting circuit 400 includes a first voltage converting chip U4, a sixth resistor R6, a sixth capacitor C6, a seventh capacitor C7, and an eighth capacitor C8, and the voltage converting circuit 400 includes a second voltage converting chip U5, a ninth capacitor C9, and a tenth capacitor C10;
a voltage output end of the first voltage conversion chip U4 is connected to a voltage input end of the bias voltage adjusting circuit 300, a voltage output end of the first voltage conversion chip U4 is further connected to a first end of the sixth resistor R6 and a first end of the sixth capacitor C6, respectively, a feedback end of the first voltage conversion chip U4 is connected to a second end of the sixth resistor R6, a second end of the sixth capacitor C6 is grounded, a voltage input end of the first voltage conversion chip U4 is connected to a voltage output end of a system power supply, a voltage input end of the first voltage conversion chip U4 is further connected to a first end of the seventh capacitor C7 and a first end of the eighth capacitor C8, respectively, and a second end of the seventh capacitor C7 and a second end of the eighth capacitor C8 are grounded, respectively;
the voltage output end of the bias voltage adjusting circuit 300 is connected with the bias voltage input end of the APD and PIN photodiode current detecting circuit 201;
a voltage input end of the second voltage conversion chip U5 is connected to a voltage output end of the system power supply, a voltage input end of the second voltage conversion chip U5 is connected to a first end of the ninth capacitor C9 and a first end of the tenth capacitor C10, a second end of the ninth capacitor C9 and a second end of the tenth capacitor C10 are grounded, and a voltage output end of the second voltage conversion chip U5 is connected to a supply voltage input end of the APD and PIN photodiode current detection circuit 201 and a supply voltage input end of the transimpedance amplifier current detection circuit 202.
It should be noted that VBUS may be an input/output terminal of the system power supply, and is used for providing a dc voltage of 5V. The first voltage conversion chip U4 may be a dc-to-dc voltage boosting device, configured to boost a voltage input by a power supply device or a system power supply to a bias voltage required when the APD photodiode operates normally, where the detection voltage may be a dc high voltage, and the dc high voltage satisfies a high voltage of tens of volts required for biasing, which is not limited in this embodiment.
It is easy to understand that the sixth resistor R6 is a feedback resistor of the first voltage conversion chip U4, the output voltage can be fed back through the sixth resistor R6, so that the output voltage of the voltage conversion chip U4 is kept stable, the seventh capacitor C7 and the eighth capacitor C8 can be filter capacitors of the first voltage conversion chip U4, one end of the seventh capacitor C7 and the other end of the eighth capacitor C8 are grounded, and the other end of the seventh capacitor C7 and the other end of the eighth capacitor C8 are connected to the circuit, so that the filter function is provided.
It should be noted that VCC may be a supply voltage input/output terminal. The second voltage conversion chip U5 can provide a required operating voltage for the signal detection circuit 200 to work normally, and the required operating voltage meets the power supply voltage requirements of the loads connected to VCC, which is not limited in this embodiment.
It is easy to understand that the ninth capacitor C9 and the tenth capacitor C10 may be filter capacitors of the second voltage conversion chip U5, one end of the ninth capacitor C9 and the other end of the tenth capacitor C10 are grounded and connected to the circuit, and may have a filtering function, when the current and voltage pass through the capacitors, noise passes through from the positive electrode to the negative electrode, and then directly enters the ground, and the capacitors may eliminate the noise, which is not limited in this embodiment.
In this embodiment, the automatic test circuit for the multiple APD and PIN optical receiving devices further includes a signal conversion circuit 500, the signal conversion circuit 500 includes a digital-to-analog conversion circuit 501, the digital-to-analog conversion chip U6 of the digital-to-analog conversion circuit 501 and a seventh resistor R7;
a signal digital input end of the digital-to-analog conversion chip U6 is connected with a digital signal output end of the main control single chip microcomputer 100, an analog signal output end of the digital-to-analog conversion chip U6 is connected with a first end of the seventh resistor R7, and a second end of the seventh resistor R7 is connected with a signal input end of the bias voltage adjusting circuit 300.
It should be understood that the digital-to-analog conversion chip U6 may be configured to convert the digital signal sent by the main control single chip microcomputer 100 to obtain a corresponding analog voltage signal, that is, to convert the digital signal into the analog voltage signal, and the digital-to-analog conversion chip U6 sends the converted analog voltage signal to the bias voltage adjustment circuit 400, so as to implement automatic testing of the multi-channel optical device, which is not limited in this embodiment.
It is easy to understand that the seventh resistor R7 is a load resistor of the digital-to-analog conversion chip U6, and the input voltage can be divided by the seventh resistor R7, so as to send the analog voltage signal to the bias voltage adjusting circuit 300 to precisely adjust the output bias voltage, which is not limited in this embodiment.
In this embodiment, the signal conversion circuit 500 further includes an analog-to-digital conversion circuit 502, and the analog-to-digital conversion circuit 502 includes an analog-to-digital conversion chip U7, an eleventh capacitor C11, and a twelfth capacitor C12;
an analog signal input end of the analog-to-digital conversion chip U7 is connected with a signal output end of the signal detection circuit 200, and a digital signal output end of the analog-to-digital conversion chip U7 is connected with a digital signal input end of the main control single chip microcomputer 100.
It should be understood that the analog-to-digital conversion chip U7 may be configured to convert the obtained voltage signal to obtain a value corresponding to the voltage signal, that is, to convert the analog voltage signal into a digital signal, and the analog-to-digital conversion chip U7 feeds back the converted digital signal to the main control single chip microcomputer 100, so as to implement automatic testing of multiple optical devices, which is not limited in this embodiment.
It is easy to understand that the eleventh capacitor C11 and the twelfth capacitor C12 may be filter capacitors of the analog-to-digital conversion chip U7, one end of the eleventh capacitor C11 and the other end of the twelfth capacitor C12 are grounded and are connected to the circuit, and may have a filtering function, when the current and voltage pass through the capacitors, noise passes through from the positive electrode to the negative electrode, and then directly enters the ground line, and the capacitors may eliminate noise, which is not limited in this embodiment.
In this embodiment, the automatic test circuit for multiple APDs and PIN light receiving devices further includes a universal bus interface circuit 600;
the automatic test circuit for the multipath APD and PIN optical devices further comprises a universal bus interface circuit, a signal receiving end of the universal bus interface circuit is connected with a signal sending end of the master control single chip microcomputer, and a voltage output end of the universal bus interface circuit is connected with a system voltage input end of the voltage conversion circuit.
It should be noted that the universal bus interface circuit 600 may include a universal bus interface (USB), and the main control single chip microcomputer 100 may communicate with the upper computer or the mobile terminal through the universal bus interface, so that a user may set parameters required for testing the optical device on the upper computer or the mobile terminal and observe a test result, which is not limited in this embodiment.
It is easy to understand that the upper computer can automatically control the bias voltage adjusting circuit 300 through the master control single chip microcomputer to gradually increase the output bias voltage of the APD photodiode from the lowest, and simultaneously monitor the leakage current value generated by the APD photodiode, when the leakage current value (usually 10 uA) specified by the breakdown voltage point of the photodiode is reached, the voltage adjustment is stopped, and the leakage current value is reported to the upper computer to display and record data, so that the VBR voltage of the APD light receiving device is automatically tested. After the universal bus interface circuit 600 communicates with the upper computer, the upper computer can display the test result on a software interface, for example, in fig. 4, the response current of the PIN photodiode (PIN ROSA response current), the response current of the APD photodiode (APD ROSA response current), the bias voltage of the APD photodiode W (APD voltage), and the working current of the transimpedance amplifier (ICC), which are not limited in this embodiment.
It will be readily appreciated that the universal bus interface circuit 600 may also be used as a power supply for the system operating voltage. The universal bus interface circuit 600 can also be used to connect hardware devices such as a display, an operating device, a memory, and a multimedia device, which is not limited in this embodiment.
According to the invention, through the circuit, the detection circuit comprises an APD photodiode current detection circuit, a trans-impedance amplifier detection circuit and a PIN photodiode RSSI signal detection circuit. The bias voltage regulating circuit comprises a bias voltage regulating chip, a first resistor and a second resistor, the APD photodiode current detection circuit comprises a photodiode current detection chip, a third resistor, a first capacitor and a second capacitor, the transimpedance amplifier detection circuit comprises a transimpedance amplifier current detection chip, a fourth resistor, a third capacitor and a fourth capacitor, the PIN photodiode current detection circuit comprises a fifth resistor and a fifth capacitor, the automatic test circuit of the multipath APD and PIN light receiving device also comprises an APD and PIN light receiving device, the APD and PIN light receiving device comprises an APD photodiode or PIN photodiode, a transimpedance amplifier, the automatic test circuit of the multipath APD and PIN light receiving device also comprises a voltage conversion circuit, and the voltage conversion circuit comprises a first voltage conversion chip, a second voltage conversion chip, a sixth resistor, a sixth capacitor and a seventh capacitor, The automatic test circuit for the multiple APD and PIN light receiving devices further comprises a signal conversion circuit, the signal conversion circuit comprises a digital-to-analog conversion chip and a seventh resistor, the signal conversion circuit further comprises an analog-to-digital conversion chip, an eleventh capacitor and a twelfth capacitor, the automatic test circuit for the multiple APD and PIN light receiving devices further comprises a universal bus interface circuit, automatic detection of currents of multiple APDs or PIN photodiodes and a trans-impedance amplifier is achieved, a master control single chip microcomputer is used for testing control, the signal conversion circuit converts signals and the voltage conversion circuit adjusts voltage, and testing performance and testing accuracy of testing of the light receiving devices are improved.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) readable by an estimator, and includes instructions for enabling a piece of multi-channel APD and PIN photoreceiving device automatic testing equipment (which may be a mobile phone, an estimator, a multi-channel APD and PIN photoreceiving device automatic testing equipment, or a network multi-channel APD and PIN photoreceiving device automatic testing equipment, etc.) to perform the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (6)
1. A multipath APD and PIN light receiving device automatic test circuit is characterized in that the APD and PIN light receiving device test circuit comprises a master control single chip microcomputer, a signal detection circuit, a bias voltage adjusting circuit, a voltage conversion circuit and a signal conversion circuit;
the master control single chip microcomputer is used for generating a digital test signal and sending the digital test signal to the signal conversion circuit;
the signal conversion circuit is used for receiving the digital test signal, performing analog-to-digital conversion according to the digital test signal and generating a plurality of paths of analog voltage regulating signals;
the bias voltage regulating circuit is used for obtaining multi-path bias voltages according to the multi-path analog voltage regulating signals, applying the multi-path bias voltages to the APD and PIN light receiving devices to be tested and generating corresponding multi-path test currents;
the signal detection circuit is used for detecting the multi-path test current to obtain a detection result and sending the detection result to the signal conversion circuit;
the signal conversion circuit is also used for generating digital test information according to the detection result, and sending the digital test information to the main control single chip microcomputer so that the main control single chip microcomputer receives the digital test information and completes automatic test of the optical receiving device according to the digital test information;
the automatic test circuit for the multipath APD and PIN light receiving devices further comprises a universal bus interface circuit, wherein a signal receiving end of the universal bus interface circuit is connected with a signal sending end of the master control single chip microcomputer, and a voltage output end of the universal bus interface circuit is connected with a system voltage input end of the voltage conversion circuit;
the voltage conversion circuit is used for converting the system voltage of the universal bus interface circuit into stable power supply voltage suitable for the work of each component;
the signal detection circuit comprises an APD and PIN photodiode current detection circuit and a transimpedance amplifier current detection circuit;
the digital signal transmission end of the master control singlechip is connected with the digital signal transmission end of the signal conversion circuit, the analog signal output end of the signal conversion circuit is connected with the input end of the bias voltage regulating circuit, and the analog signal input end of the signal conversion circuit is connected with the signal output ends of the APD and PIN photodiode current detection circuit and the signal output end of the transimpedance amplifier current detection circuit;
the bias voltage adjusting circuit comprises a bias voltage adjusting chip, a first resistor and a second resistor;
the signal input end of the bias voltage adjusting chip is connected with the analog signal output end of the signal conversion circuit, the signal input end of the bias voltage adjusting chip is also connected with the first end of the first resistor and the first end of the second resistor respectively, the voltage output end of the bias voltage adjusting chip is connected with the second end of the first resistor, and the second end of the second resistor is grounded;
the voltage conversion circuit comprises a first voltage conversion chip, a sixth resistor, a sixth capacitor, a seventh capacitor and an eighth capacitor, and further comprises a second voltage conversion chip, a ninth capacitor and a tenth capacitor;
the voltage output end of the first voltage conversion chip is connected with the voltage input end of the bias voltage regulating circuit, the voltage output end of the first voltage conversion chip is further connected with the first end of the sixth resistor and the first end of the sixth capacitor respectively, the feedback end of the first voltage conversion chip is connected with the second end of the sixth resistor, the second end of the sixth capacitor is grounded, the voltage input end of the first voltage conversion chip is connected with the voltage output end of a system power supply, the voltage input end of the first voltage conversion chip is further connected with the first end of the seventh capacitor and the first end of the eighth capacitor respectively, and the second end of the seventh capacitor and the second end of the eighth capacitor are grounded respectively;
the voltage output end of the bias voltage regulating circuit is connected with the bias voltage input end of the APD and PIN photodiode current detection circuit;
the voltage input end of the second voltage conversion chip is connected with the voltage output end of the system power supply, the voltage input end of the second voltage conversion chip is respectively connected with the first end of the ninth capacitor and the first end of the tenth capacitor, the second end of the ninth capacitor and the second end of the tenth capacitor are respectively grounded, and the voltage output end of the second voltage conversion chip is respectively connected with the power supply voltage input end of the APD and PIN photodiode current detection circuit and the power supply voltage input end of the transimpedance amplifier current detection circuit.
2. The automatic test circuit for multi-channel APD and PIN photo-receiving devices according to claim 1, wherein the APD and PIN photodiode current detection circuit comprises a photodiode current detection chip, a third resistor, a first capacitor and a second capacitor;
the positive voltage input end of the photodiode current detection chip is connected with the voltage output end of the bias voltage regulation chip, the positive voltage input end of the photodiode current detection chip is further respectively connected with the first end of the first capacitor and the first end of the third resistor, the second end of the first capacitor is grounded, the negative voltage input end of the photodiode current detection chip is connected with the second end of the third resistor, the power supply voltage input end of the photodiode current detection chip is connected with the first end of the second capacitor, the second end of the second capacitor is grounded, and the signal output end of the photodiode current detection chip is connected with the analog signal input end of the signal conversion circuit.
3. The multi-channel APD and PIN photoreceiving device automatic test circuit of claim 1, wherein the transimpedance amplifier current detection circuit comprises a transimpedance amplifier current detection chip, a fourth resistor, a third capacitor and a fourth capacitor;
the positive voltage input end of the transimpedance amplifier current detection chip is respectively connected with the first end of the fourth resistor and the first end of the third capacitor, the second end of the third capacitor is grounded, the negative voltage input end of the transimpedance amplifier current detection chip is also respectively connected with the second end of the fourth resistor, the signal output end of the transimpedance amplifier current detection chip is respectively connected with the analog signal input end of the signal conversion circuit and the first end of the fourth capacitor, and the second end of the fourth capacitor is grounded.
4. The automatic test circuit for multiple APD and PIN photo-receiving devices according to claim 3, wherein the automatic test circuit for multiple APD and PIN photo-receiving devices further comprises an APD and PIN photo-receiving device to be tested, a fifth resistor and a fifth capacitor, the APD and PIN photo-receiving device comprises an APD or PIN photodiode and a transimpedance amplifier;
and the RSSI signal output ends of the APD and PIN light receiving devices are connected with the first end of the fifth resistor, the RSSI signal output ends of the APD and PIN light receiving devices are also respectively connected with the first end of the fifth capacitor and the analog signal input end of the signal conversion circuit, and the second ends of the fifth resistor and the fifth capacitor are respectively grounded.
5. The automatic test circuit for multi-channel APDs and PIN photo-receivers according to claim 1, wherein the signal conversion circuit comprises a digital-to-analog conversion circuit, the digital-to-analog conversion circuit comprises a digital-to-analog conversion chip and a seventh resistor;
the digital signal input end of the digital-to-analog conversion chip is connected with the digital signal output end of the main control single chip microcomputer, the analog signal output end of the digital-to-analog conversion chip is connected with the first end of the seventh resistor, and the second end of the seventh resistor is connected with the signal input end of the bias voltage adjusting circuit.
6. The multi-channel APD and PIN photoreceiving device automatic test circuit of claim 1, wherein the signal conversion circuit further comprises an analog-to-digital conversion circuit, the analog-to-digital conversion circuit comprising an analog-to-digital conversion chip, an eleventh capacitor and a twelfth capacitor;
the analog signal input end of the analog-to-digital conversion chip is connected with the signal output end of the signal detection circuit, the digital signal output end of the analog-to-digital conversion chip is connected with the digital signal input end of the main control single chip microcomputer, the eleventh capacitor and the twelfth capacitor are filter capacitors of the analog-to-digital conversion chip, one end of the eleventh capacitor and one end of the twelfth capacitor are grounded, and the other end of the eleventh capacitor and the twelfth capacitor are connected into the circuit.
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| CN113447750B (en) * | 2021-08-31 | 2022-03-08 | 深圳市力子光电科技有限公司 | Optical device test circuit |
| CN113589093B (en) * | 2021-09-30 | 2021-12-28 | 武汉普赛斯电子技术有限公司 | Drive test device and method for APD device |
| CN117054796B (en) * | 2023-10-11 | 2023-12-26 | 成都光创联科技有限公司 | Optical device testing circuit and method |
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