CN112420882B - Multi-chip bonding structure of LED semiconductor wafer - Google Patents

Multi-chip bonding structure of LED semiconductor wafer Download PDF

Info

Publication number
CN112420882B
CN112420882B CN202011233165.5A CN202011233165A CN112420882B CN 112420882 B CN112420882 B CN 112420882B CN 202011233165 A CN202011233165 A CN 202011233165A CN 112420882 B CN112420882 B CN 112420882B
Authority
CN
China
Prior art keywords
semiconductor wafer
carrier
pressure head
bonding structure
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202011233165.5A
Other languages
Chinese (zh)
Other versions
CN112420882A (en
Inventor
李国强
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Heyuan Tianhe Third Generation Semiconductor Industry Technology Research Institute
Original Assignee
Heyuan Tianhe Third Generation Semiconductor Industry Technology Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Heyuan Tianhe Third Generation Semiconductor Industry Technology Research Institute filed Critical Heyuan Tianhe Third Generation Semiconductor Industry Technology Research Institute
Priority to CN202011233165.5A priority Critical patent/CN112420882B/en
Publication of CN112420882A publication Critical patent/CN112420882A/en
Application granted granted Critical
Publication of CN112420882B publication Critical patent/CN112420882B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67092Apparatus for mechanical treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The invention discloses a multi-chip bonding structure of an LED semiconductor wafer, which comprises an upper pressure head, a lower pressure head, a left and a right anode and cathode sticking blocks and a semiconductor wafer carrier, wherein the upper pressure head is provided with a first pressing head; the upper and lower pressure heads are connected with an oil pump or an air pump, can be lifted up and down to provide pressure to press the semiconductor wafer in the carrier, are provided with cooling systems and temperature sensors, and can carry out cooling treatment on the semiconductor wafer in the carrier and transmit the temperature of the pressure heads at any time; the positive pole sticking block and the negative pole sticking block both comprise a cooling system, a temperature sensor and an independent PID control system, the current of each layer can be independently adjusted, and the temperature of the carrier pressing block of each layer is controlled; each carrier is internally provided with a heating plate, and the carriers can be stacked into a plurality of layers to realize the synchronous bonding of a plurality of semiconductor wafers; the heating plate of the carrier contacts with the positive and negative sticking blocks, and after the power is switched on, the heating plate of the carrier can generate heat to heat the semiconductor wafer. The invention can realize multi-chip bonding, shorten bonding time and increase bonding capacity.

Description

Multi-chip bonding structure of LED semiconductor wafer
Technical Field
The invention relates to the technical field of multi-chip bonding structures, in particular to a multi-chip bonding structure of an LED semiconductor wafer.
Background
The bonding method of LED semiconductor is a process of heating and pressing LED semiconductor wafer.
In the MEMS process, the most common are the silicon-silicon direct bonding and silicon-glass electrostatic bonding techniques, followed by a variety of new bonding techniques, such as metal-metal bonding, each of which has its drawbacks despite the continuous emergence of various techniques.
While CB8 die bonder manufactured by SUSS MicroTec, germany, has promoted the development of MEMS process to some extent, it has been found that the bonding is performed while heating the die to be bonded to a desired temperature and the bonded die is fixed by a centering fixture (centerpin) in the prior art. At present, a bonding jig can only realize a single-chip bonding structure, in the bonding process, a pressure head up-and-down heating mode is adopted for heating, the heating of the up-and-down heating bonding mode is long in cooling time and cannot directly conduct heat to a semiconductor wafer, if the bonding structure heated by the up-and-down pressure head is changed into multi-chip bonding, the LED wafer is heated and cooled unevenly due to the heat conduction and heat dissipation difference of the semiconductor wafer or the bonding jig, and finally the bonded LED wafer has the problems of cavities, severe warping, fragment breakage and the like.
Disclosure of Invention
In view of the above, in order to solve the above problems in the prior art, the present invention provides a multi-chip bonding structure of an LED semiconductor wafer, which can achieve multi-chip bonding and increase bonding productivity.
The invention solves the problems through the following technical means:
a multi-piece bonding structure of an LED semiconductor wafer, comprising: the device comprises an upper pressing head, a lower pressing head, a left and right positive and negative pole sticking blocks and a semiconductor wafer carrier;
the upper pressure head and the lower pressure head comprise an upper pressure head and a lower pressure head, the upper pressure head and the lower pressure head are connected with an oil pump or an air pump and can be lifted up and down to provide pressure for pressing the semiconductor wafer in the carrier, and the upper pressure head and the lower pressure head are provided with a cooling system and a temperature sensor, so that the semiconductor wafer in the carrier can be cooled and the temperature of the pressure heads can be transmitted at any time;
the left and right positive and negative pole sticking blocks comprise positive pole sticking blocks and negative pole sticking blocks, the positive pole sticking blocks are connected with a positive pole power supply, the negative pole sticking blocks are connected with a negative pole power supply, the positive pole sticking blocks and the negative pole sticking blocks comprise cooling systems, temperature sensors and independent PID control systems, the carriers can be cooled, the temperature of the side walls of the carriers can be transmitted in real time, and the independent PID control systems can independently adjust the current of each layer so as to control the temperature of the pressing blocks of each layer of the carriers;
the semiconductor wafer carrier carries a semiconductor wafer, each carrier is internally provided with a heating plate, and the carriers can be stacked into a plurality of layers to realize the synchronous bonding of a plurality of semiconductor wafers; in the operation process, the heating plate of the carrier is contacted with the positive and negative pole sticking blocks, and after the power supply is switched on, the heating plate of the carrier can generate heat to heat the semiconductor wafer.
Furthermore, the upper pressure head and the lower pressure head are made of graphite or 304 stainless steel materials with high strength and good heat conducting property.
Furthermore, the semiconductor wafer carrier is made of composite materials with good medium strength, insulation and heat conduction performance.
Further, the heating plate is made of a tungsten substrate or other conductive heating substrates.
Furthermore, a stacking type fixing bolt is arranged on each semiconductor wafer carrier, and stacking type fixing holes are formed in the stacking type fixing bolts in a matched mode, so that synchronous bonding of a plurality of semiconductor wafers is achieved.
Further, the diameter of stack fixed orifices is 0.1mm bigger than the stack fixed bolt.
Further, the stacked fixing pins are made of graphite or 304 stainless steel.
Furthermore, the carriers can be stacked into a plurality of layers, so as to realize the synchronous bonding of 1-10 semiconductor wafers.
Further, the upper pressure head and the lower pressure head provide a pressure of 10KGF to 20000 KGF.
Furthermore, the temperature of the heating plate of the carrier can reach 20-800 degrees.
Compared with the prior art, the invention has the beneficial effects that at least:
the invention can realize multi-chip bonding, increase bonding capacity, each semiconductor wafer has an independent heating system, can quickly and uniformly raise or lower the temperature set in the bonding process, and the whole bonding structure realizes the functions of uniformly heating and cooling the wafer, thereby solving the problems of the existing bonding structure, such as voids, serious warping, wafer breakage and the like caused by nonuniform heating and cooling. Meanwhile, the temperature rise time and the cooling time in the bonding process are reduced, the bonding time is shortened, and the productivity is improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic diagram of a conventional monolithic bonding structure;
FIG. 2 is a schematic view of a multi-wafer bonding structure of an LED semiconductor wafer according to the present invention;
FIG. 3 is a schematic diagram of the circuit heating of the present invention;
FIG. 4 is a schematic view of a semiconductor wafer carrier according to the present invention.
Description of reference numerals:
1. an upper pressure head; 2. a lower pressure head; 3. a negative electrode paste block; 4. a positive electrode paste block; 5. a semiconductor wafer carrier; 51. a stack type fixing bolt; 52. a stacked fixing hole; 53. heating plate resistors inside the multi-layer carrier; 6. a semiconductor wafer.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. It should be noted that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and all other embodiments obtained by those skilled in the art without any inventive work based on the embodiments of the present invention belong to the protection scope of the present invention.
The conventional single-wafer bonding structure is shown in fig. 1, and the conventional bonding structure at present adopts an upper and lower pressure head heating mode, which cannot accurately control the temperature of each semiconductor wafer, and has low productivity, and the semiconductor wafer carrier is a common carrier without a heating plate.
As shown in fig. 2-3, the present invention provides a multi-chip bonding structure of an LED semiconductor chip, which includes three parts, i.e., an upper and a lower pressing heads, left and right positive and negative electrode pads, and a semiconductor chip carrier 5.
The first part is an upper pressure head and a lower pressure head: including last pressure head 1 and lower pressure head 2, adopt high strength, the good material of thermal conductivity such as graphite, 304 stainless steel, upper and lower pressure head is continuous oil pump or air pump, but oscilaltion provides 10KGF ~ 20000 KGF's pressure to upper and lower pressure head is provided with cooling system and temperature-sensing ware respectively, can cool off and transmit the pressure head temperature often to the film source.
The second part is left and right positive and negative pole paster: the temperature control device comprises an anode sticking block 4 and a cathode sticking block 3, wherein the anode sticking block 4 is connected with an anode power supply, the cathode sticking block 3 is connected with a cathode power supply, the anode sticking block and the cathode sticking block both comprise a cooling system, a temperature sensor and an independent PID control system, and the current of each layer can be independently adjusted so as to control the temperature of each layer of carrier pressing block.
The third part is a semiconductor chip carrier 5: the semiconductor wafer 6 is loaded in the carrier 5, the carrier is made of a composite material with medium strength, good insulation and good heat conduction performance, a heating plate is arranged in each carrier 5, the heating plate is composed of a tungsten substrate or other conductive heating substrates, the carriers can be stacked into a plurality of layers, and the synchronous bonding of 1-10 semiconductor wafers 6 is realized. In the operation process, the heating plate of the carrier 5 is contacted with the positive and negative pole sticking blocks, and after the power supply is switched on, the electric heating plate of the carrier 5 can generate heat, and the temperature can reach 20-800 degrees.
The multi-chip bonding structure of the LED semiconductor comprises an upper pressure head, a lower pressure head, a left positive pole sticking block, a right positive pole sticking block and a semiconductor wafer carrier 5. The upper and lower platens provide a pressure and cooling system that allows for bonding and cooling of the semiconductor wafers 6 within the carrier 5, and also provides for the temperature of the platens to be constantly transmitted. The left and right positive and negative pole sticking blocks are provided with a power supply, a cooling system and an independent PID control system, so that the carrier 5 can be cooled and the temperature of the side wall of the carrier can be transmitted at any time. The heating plate embedded in the carrier contacts with the positive and negative pole sticking blocks to generate heat after conducting, and heats the semiconductor wafer 6. Whole bonding structural design can realize the multi-disc bonding, increases the bonding productivity, and each wafer has independent heating system moreover, can be fast and evenly promote, reduce the required temperature of bonding process, and whole bonding structure realizes the even heating of piece and refrigerated function, solves current bonding structure's the heating and the cooling inequality and causes the LED wafer to appear the cavity, warp seriously and broken piece scheduling problem. Meanwhile, the temperature rise time and the cooling time in the bonding process are reduced, the bonding time is shortened, and the productivity is improved.
As shown in fig. 4, each semiconductor wafer carrier 5 has a stacking type fixing pin 51 on it and a stacking type fixing hole 52 on it, so as to realize the synchronous bonding of multiple semiconductor wafers 6. The stacking type fixing holes 52 are 0.1mm larger than the diameter of the stacking type fixing bolts 51. The stacked fixing pins 51 are made of graphite or 304 stainless steel.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (10)

1. A multi-piece bonding structure of an LED semiconductor wafer, comprising: the device comprises an upper pressing head, a lower pressing head, a left and right positive and negative pole sticking blocks and a semiconductor wafer carrier;
the upper pressure head and the lower pressure head comprise an upper pressure head and a lower pressure head, the upper pressure head and the lower pressure head are connected with an oil pump or an air pump and can be lifted up and down to provide pressure for pressing the semiconductor wafer in the carrier, and the upper pressure head and the lower pressure head are provided with a cooling system and a temperature sensor, so that the semiconductor wafer in the carrier can be cooled and the temperature of the pressure heads can be transmitted at any time;
the left and right positive and negative pole sticking blocks comprise positive pole sticking blocks and negative pole sticking blocks, the positive pole sticking blocks are connected with a positive pole power supply, the negative pole sticking blocks are connected with a negative pole power supply, the positive pole sticking blocks and the negative pole sticking blocks comprise cooling systems, temperature sensors and independent PID control systems, the carriers can be cooled, the temperature of the side walls of the carriers can be transmitted in real time, and the independent PID control systems can independently adjust the current of each layer so as to control the temperature of the pressing blocks of each layer of the carriers;
the semiconductor wafer carrier carries a semiconductor wafer, each carrier is internally provided with a heating plate, and the carriers can be stacked into a plurality of layers to realize the synchronous bonding of a plurality of semiconductor wafers; in the operation process, the heating plate of the carrier is contacted with the positive and negative pole sticking blocks, and after the power supply is switched on, the heating plate of the carrier can generate heat to heat the semiconductor wafer.
2. The multi-piece bonding structure of an LED semiconductor wafer according to claim 1, wherein the upper and lower indenters are made of a high strength, high thermal conductivity material such as graphite or 304 stainless steel.
3. The multi-piece bonding structure of an LED semiconductor wafer as claimed in claim 1, wherein the semiconductor wafer carrier is made of a composite material with good medium strength, insulation and thermal conductivity.
4. The multi-piece bonding structure of an LED semiconductor wafer according to claim 1, wherein the heating plate is made of a tungsten substrate or other conductive heat-generating substrate.
5. The multi-piece bonding structure of LED semiconductor chips as defined in claim 1, wherein each semiconductor chip carrier has stacked fixing pins and stacked fixing holes thereon for synchronous bonding of multiple semiconductor chips.
6. The multi-piece bonding structure of LED semiconductor chips as defined in claim 5, wherein the stacked fixing holes are 0.1mm larger than the diameter of the stacked fixing pins.
7. The multi-piece bonding structure of LED semiconductor chips as defined in claim 5, wherein the stacked fixing pins are made of graphite or 304 stainless steel.
8. The multi-wafer bonding structure of LED semiconductor wafer as claimed in claim 1, wherein the carriers are stacked in multiple layers to achieve simultaneous bonding of 1-10 wafers.
9. The multi-piece bonding structure of an LED semiconductor wafer according to claim 1, wherein the upper and lower indenters provide a pressure of 10KGF to 20000 KGF.
10. The multi-piece bonding structure of an LED semiconductor wafer as claimed in claim 1, wherein the temperature of the heating plate of the carrier can reach 20 ° to 800 °.
CN202011233165.5A 2020-11-06 2020-11-06 Multi-chip bonding structure of LED semiconductor wafer Active CN112420882B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011233165.5A CN112420882B (en) 2020-11-06 2020-11-06 Multi-chip bonding structure of LED semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011233165.5A CN112420882B (en) 2020-11-06 2020-11-06 Multi-chip bonding structure of LED semiconductor wafer

Publications (2)

Publication Number Publication Date
CN112420882A CN112420882A (en) 2021-02-26
CN112420882B true CN112420882B (en) 2021-09-10

Family

ID=74780561

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011233165.5A Active CN112420882B (en) 2020-11-06 2020-11-06 Multi-chip bonding structure of LED semiconductor wafer

Country Status (1)

Country Link
CN (1) CN112420882B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101090082A (en) * 2006-06-15 2007-12-19 中国科学院半导体研究所 Multifunction bonding device for semiconductor chip
CN107154450A (en) * 2016-03-02 2017-09-12 映瑞光电科技(上海)有限公司 A kind of multilayer bonding method for light emitting diode (LED) chip with vertical structure
CN111635147A (en) * 2020-06-08 2020-09-08 太原理工大学 Metal glass surface in-situ metallization multilayer stacking bonding method and device based on electro-cation conduction

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100129961A1 (en) * 2008-11-25 2010-05-27 International Business Machines Corporation Multi chip stacking with reliable joining

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101090082A (en) * 2006-06-15 2007-12-19 中国科学院半导体研究所 Multifunction bonding device for semiconductor chip
CN107154450A (en) * 2016-03-02 2017-09-12 映瑞光电科技(上海)有限公司 A kind of multilayer bonding method for light emitting diode (LED) chip with vertical structure
CN111635147A (en) * 2020-06-08 2020-09-08 太原理工大学 Metal glass surface in-situ metallization multilayer stacking bonding method and device based on electro-cation conduction

Also Published As

Publication number Publication date
CN112420882A (en) 2021-02-26

Similar Documents

Publication Publication Date Title
US11798919B2 (en) Transfer carrier and manufacturing method thereof, and method for transferring light-emitting diode chip
JP3154629U (en) Electrostatic chuck
KR20090033255A (en) Wafer bonding apparatus
CN109920768B (en) High-power IGBT module water-cooling heat dissipation system considering operation conditions
US10593573B2 (en) Electrostatic chuck and substrate fixing device
WO2021179352A1 (en) High-power ipm structure based on graphene-based packaging substrate, and processing technology
JP2017504195A (en) Electrostatic chuck, chamber, and manufacturing method of electrostatic chuck
TWI475638B (en) Preparation method of heterogeneous laminated co - fired ceramics with aluminum nitride electrostatic chuck
CN112420882B (en) Multi-chip bonding structure of LED semiconductor wafer
WO2019019857A1 (en) Heat dissipation element and preparation method therefor, and igbt module
KR101619460B1 (en) Apparatus for Manufacturing Package On Package
JP4698097B2 (en) Wafer support member
CN111081566A (en) Pressure-assisted silver sintering device for power semiconductor chip
KR101619455B1 (en) Method for Manufacturing Package On Package
CN209926739U (en) Oven using waste heat of high-temperature pushed slab kiln
CN210182410U (en) High temperature resistant LED packaging structure based on ceramic substrate
KR20120094657A (en) Heating/cooling apparatus for wafer chuck and wafer bonder comprising the same
JPH10294127A (en) Manufacture and manufacturing apparatus for sodium-sulfur battery
KR101320064B1 (en) Wafer bonder using dual-cooling and wafer bonding method
CN220121779U (en) Vacuum hot pressing furnace for ceramic-monocrystalline composite substrate
KR20210133069A (en) Adhesive transfer film and method for manufacturing power module substrate using the same
CN212988030U (en) Pressing and sintering device for Al2O3 ceramic substrate
CN109047962A (en) A method of for keeping interface smooth in multi-chip package brazing process
US9165903B2 (en) Multi-functional detachable and replaceable wire bonding heating plate
CN210215543U (en) Chemical vapor deposition equipment and ceramic heating plate

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant