CN112420744A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN112420744A
CN112420744A CN202011244209.4A CN202011244209A CN112420744A CN 112420744 A CN112420744 A CN 112420744A CN 202011244209 A CN202011244209 A CN 202011244209A CN 112420744 A CN112420744 A CN 112420744A
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pattern
sub
display area
patterns
display panel
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CN202011244209.4A
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CN112420744B (en
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陈建锋
张淑媛
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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Abstract

The application provides a display panel, display panel includes display area and the non-display area around the display area, display panel includes: a first inorganic layer including a first portion located within the non-display area; a barrier pattern located within the non-display area and connected to the first portion of the first inorganic layer.

Description

Display panel and display device
Technical Field
The application relates to the technical field of display panels, in particular to a display panel and a display device.
Background
The OLED has many advantages of self-luminescence, low driving voltage, high luminous efficiency, short response time, high definition and contrast, a viewing angle of nearly 180 °, a wide temperature range, and capability of realizing flexible display and large-area full-color display, and is considered as a display panel with the most potential development in the industry. In the current market trend, the panels enter the flexible era, and in the continuous effort of developing related flexible panels, the display panel includes multiple inorganic layers and organic layers, and in a dynamically Foldable (Foldable) display panel, cracks of the inorganic layers are likely to occur near a Gate On Array (GOA) at the edge of the display panel, and when the cracks are generated and diffused, phenomena such as wire breakage and the like are caused, thereby generating poor display.
Disclosure of Invention
The embodiment of the application provides a display panel, the display panel comprises a display area and a non-display area surrounding the display area, a first inorganic layer comprises a first part located in the non-display area and a second part located in the display area, a blocking pattern connected to the first inorganic layer is arranged in the non-display area, and the blocking pattern can block crack generation and diffusion in the first inorganic layer.
The present application provides a display panel including a display area and a non-display area surrounding the display area, the display panel including:
a first inorganic layer including a first portion located within the non-display area;
a barrier pattern located within the non-display area and connected to the first portion of the first inorganic layer.
The display panel further comprises a first organic layer located on the first inorganic layer, wherein the first inorganic layer comprises a second part located in the display area, the second part is provided with a first groove, and at least one part of the first organic layer is contained in the first groove;
the barrier pattern includes a first pattern having a same size as the first groove at least in the first direction.
In the display panel of the present application, the first pattern includes at least one row of first sub-patterns, the at least one row of first sub-patterns being arranged along a direction parallel to a second direction, the second direction being parallel to a long side of the non-display area.
In the display panel of the present application, the first pattern includes at least two columns of the first sub-patterns, the first sub-patterns in the same column are arranged in a direction parallel to the second direction, the first sub-patterns in two adjacent columns are arranged in a staggered manner in a third direction, and the third direction is different from the second direction.
In the display panel of the present application, the first pattern further includes at least one column of second sub-patterns, the at least one column of second sub-patterns is arranged along a direction parallel to the second direction, and the first sub-patterns and the second sub-patterns are located on different layers.
In the display panel of the present application, the barrier pattern further includes a second pattern of a material different from the first pattern, the second pattern being located within the non-display area and between the first pattern and the display area, the second pattern being parallel to the first pattern.
In the display panel of the present application, the second pattern includes at least two columns of third sub-patterns, the third sub-patterns in two adjacent columns are arranged in a staggered manner along a third direction, the first sub-patterns and the third sub-patterns in two adjacent columns are arranged in a staggered manner along the third direction, and the third direction is different from the second direction.
In the display panel of the present application, the first pattern includes at least one of an inorganic layer, an organic layer, and a metal layer, and the second pattern includes at least one of an inorganic layer, an organic layer, and a metal layer.
In the display panel of the present application, further comprising a thin film transistor located in the display region, the thin film transistor includes: an active layer; a gate insulating layer disposed on the active layer; a gate electrode disposed on the gate insulating layer; an interlayer insulating layer disposed on the gate electrode; a source drain layer disposed on the interlayer insulating layer;
wherein the first inorganic layer includes at least one of the gate insulating layer and the interlayer insulating layer.
The application also provides a display device which comprises any one of the display panels.
The beneficial effect of this application does: the display panel comprises a display area and a non-display area surrounding the display area, the first inorganic layer comprises a first part and a second part, the first part is located in the non-display area, the second part is located in the display area, a blocking pattern connected to the first inorganic layer is arranged in the non-display area, the blocking pattern can block crack generation and diffusion in the first inorganic layer, accordingly, the phenomena of line breakage and the like are prevented, and the display quality and the reliability of the display panel are improved.
Drawings
The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present application;
fig. 2 is a schematic top view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 3 is a schematic cross-sectional view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 4 is a schematic top view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 5 is a schematic cross-sectional view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 6 is a schematic top view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 7 is a schematic cross-sectional view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 8 is a schematic top view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 9 is a schematic cross-sectional view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 10 is a schematic top view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 11 is a schematic cross-sectional view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 12 is a schematic top view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 13 is a schematic cross-sectional view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 14 is a schematic cross-sectional view illustrating a partial area of a display panel according to an embodiment of the present disclosure;
fig. 15 is a schematic cross-sectional view of a partial area of a display panel according to an embodiment of the present disclosure.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
Referring to fig. 1, 2 to 3, and 4 to 5, an embodiment of the present disclosure provides a display panel 10, in which the display panel 10 includes a display area AA and a non-display area BB surrounding the display area AA, the display panel 10 includes a first inorganic layer including a first portion located in the non-display area BB, and a barrier pattern 200 located in the non-display area BB and connected to the first portion of the first inorganic layer.
Specifically, referring to fig. 1, the display panel 10 includes a display area AA and a non-display area BB surrounding the display area AA, the non-display area BB is located around four sides of the display area AA, fig. 2 to 15 illustrate schematic top view structures or cross-sectional structure diagrams of a dashed-line frame of a local area BB11 of the display panel 10 in fig. 1, for example, fig. 3 illustrates a cross-sectional structure diagram of a dashed-line CC in fig. 2, for example, fig. 5 illustrates a cross-sectional structure diagram of a dashed-line CC in fig. 4, the non-display area BB located around four sides of the display area AA may be provided with a barrier pattern 200, for example, the non-display area BB outside one side of the display area AA is provided with a barrier pattern 200, for example, the non-display area BB outside four sides of the display area AA is provided with a barrier pattern 200, which is not limited herein.
In some embodiments, referring to fig. 2 to 3 and fig. 4 to 5, the display panel 10 further includes a first organic layer 16 disposed on the first inorganic layer, the first inorganic layer includes a second portion disposed in the display area AA, the second portion has a first groove 161, and at least a portion of the first organic layer 16 is received in the first groove 161; the barrier pattern 200 includes a first pattern 162, and the first pattern 162 has the same size as the first groove 161 at least in the first direction. The dotted line frame in fig. 2 to 3 and 4 to 5 indicates the barrier pattern 200.
Specifically, a first groove 161 is disposed in the display area AA, at least a portion of the first organic layer 16 is accommodated in the first groove 161, the first groove 161 and the portion of the first organic layer 16 accommodated therein serve as a flexible buffer structure in the display area AA, and when the display panel 10 is bent, the flexible buffer structure in the display area AA releases stress of the first inorganic layer and other inorganic layers, so that the bending resistance of the display area AA is improved, and the influence of flexible bending on the electrical property of the thin film transistor and the trace resistance is reduced.
Specifically, the barrier pattern 200 is located in the non-display area BB and connected to the first portion of the first inorganic layer, when the display panel 10 is bent, the barrier pattern 200 of the non-display area BB releases stress of the first inorganic layer and other inorganic layers, and improves the bending resistance of the non-display area BB, and particularly, when cracks occur in the first inorganic layer and other inorganic layers of the non-display area BB, the barrier pattern 162 can prevent the cracks from spreading from the non-display area BB to the display area AA.
Specifically, in some embodiments, the size of the first pattern 162 and the first groove 161 at least in the first direction is the same, which means that the size of the first pattern 162 and the first groove 161 at least in one direction is the same, the first direction may be parallel to the long side direction of the non-display area, the first direction may be perpendicular to the long side direction of the non-display area, and the first direction may be the other direction; referring to fig. 2 to 3, for example, the first direction is perpendicular to the long side direction of the non-display region, in which the length d1 of the first pattern 162 is the same as the width d3 of the first groove 161 in the first direction; referring to fig. 2 to 3, for example, the first direction is parallel to the long side direction of the non-display area, in which the length d2 of the first pattern 162 is the same as the width d4 of the first groove 161 in the first direction; referring to fig. 2 to 3, for example, the length d1 of the first pattern 162 is the same as the width d3 of the first groove 161 in the first direction, and the length d2 of the first pattern 162 is the same as the width d4 of the first groove 161 in the other direction. The first pattern 162 and the first groove 161 are at least equal in size in the first direction, so that the flexible buffer structure in the display area AA and the barrier pattern 162 in the non-display area BB are subjected to the same bending stress when the display panel 10 is bent, and cracks can be prevented from occurring in the display area AA or the non-display area BB in advance.
Specifically, in some embodiments, referring to fig. 2 to 3, the first portion has a second groove 1620, and the first pattern 162 is accommodated in the second groove 1620, at this time, the second groove 1620 and the first groove 161 have at least the same size in the first direction; further, the first pattern 162 is a portion of the first organic layer 16 accommodated in the second recess 1620 in the non-display area BB, and the second recess 1620 and the first recess 161 are preferably arranged to have the same dimension at least in the first direction, and the second recess 1620 and the first recess 161 are preferably arranged to have the same dimension in each direction, for example, the length and width of the second recess 1620 and the first recess 161 are both 2.5um, for example, the length and width of the second recess 1620 and the first recess 161 are both 3 μm, for example, the length and width of the second recess 1620 and the first recess 161 are both 5 μm, but not limited thereto.
Specifically, in some embodiments, referring to fig. 4 to 5, the barrier pattern 200 includes a first pattern 162, the first pattern is made of a metal layer, for example, the first pattern 162 is made of a metal of the first sub-gate or/and the second sub-gate layer; in some embodiments, the first pattern 162 is a strip or a plurality of islands/blocks of metal, and at this time, the first pattern 162 and the first groove 161 have the same size at least in the first direction; in some embodiments, the first pattern 162 is a strip or a plurality of islands/blocks of metal, and at this time, the first pattern 162 and the first groove 161 may have different sizes.
Specifically, referring to fig. 3 and 5, in some embodiments, the cross-sectional structure of the display panel 10 sequentially includes a substrate 11, a buffer layer 12, an active layer 21, a first sub-gate insulating layer 13, a first sub-gate 22, a second sub-gate insulating layer 14, a second sub-gate 23, an interlayer insulating layer 15, a first organic layer 16, and a source/drain electrode layer 24, where only a partial layer structure of the cross-sectional structure of the display panel 10 is illustrated in fig. 3 and 5, for example, only the cross-sectional structure of the array substrate of the display panel 10 is illustrated; the thin film transistor illustrated in fig. 3 and 5 includes an active layer 12, a gate insulating layer including two layers of a first sub-gate insulating layer 13 and a second sub-gate insulating layer 14, a gate electrode including two layers of a first sub-gate electrode 22 and a second sub-gate electrode 23, and a source drain layer 24; in some embodiments, the gate insulating layer and the gate electrode of the thin film transistor may be only one layer, respectively; in some embodiments, the thin film transistor may also have other structures, which are not limited herein; in some embodiments, the gate electrode has only 22 layers of metal, and there are an insulating layer and a capacitor electrode above 22, where the insulating layer has the same layer position as the second sub-gate insulating layer 14, and the capacitor electrode has the same layer position as the second sub-gate 23, which is not limited herein.
In some embodiments, referring to fig. 3 and fig. 5, the first pattern 162 includes at least one row of first sub-patterns 1621, where the at least one row of first sub-patterns 1621 is arranged along a direction parallel to a second direction, and the second direction is parallel to a long side of the non-display area BB.
Specifically, at least one row of the first sub-patterns 1621 is arranged in a direction parallel to the second direction, a plurality of block-shaped or island-shaped first sub-patterns 1621 in one row may be arranged in a direction parallel to the second direction, and one or more strip-shaped first sub-patterns 1621 in one row may extend in a direction parallel to the second direction.
In some embodiments, the first pattern 162 includes at least two columns of the first sub-patterns 1621, the first sub-patterns 1621 of the same column are arranged along a direction parallel to the second direction, and the first sub-patterns 1621 of adjacent columns are arranged along a third direction, which is different from the second direction, in a staggered manner.
Specifically, for example, the block-shaped or island-shaped first sub-patterns 1621 in one column are arranged in a direction parallel to the second direction, and the stripe-shaped first sub-patterns 1621 in the same column extend in a direction parallel to the second direction; when the first sub-patterns 1621 are a plurality of block-shaped or island-shaped structures, the first sub-patterns 1621 in two adjacent columns are staggered along the third direction, that is, a connection line of center points of the block-shaped or island-shaped first sub-patterns 1621 in two adjacent columns is not perpendicular to the long side of the non-display area BB.
It should be noted that, if the second direction is parallel to the long side of the non-display area BB and the four sides of the display area AA have different long side directions, the second direction is parallel to the long side of the non-display area BB and has different directions at the corresponding four sides of the non-display area BB.
It should be noted that, in the above embodiments, the second direction is parallel to the long side of the non-display area BB, and the third direction is different from the second direction, but in some embodiments, it is preferable that the third direction is perpendicular to the second direction, where the third direction is perpendicular to the long side of the non-display area BB.
In some embodiments, referring to fig. 5, the first pattern 162 further includes at least one row of second sub-patterns 1622, the at least one row of second sub-patterns 1622 is arranged along a direction parallel to the second direction, and the first sub-patterns 1621 and the second sub-patterns 1622 are located at different layers.
Specifically, referring to fig. 5, in some embodiments, the second sub-pattern 1622 and the first sub-pattern 1621 have the same structure and shape but are not in the same layer, for example, the first sub-pattern 1621 is made of a metal pattern in the same layer as the first sub-gate 22, the second sub-pattern 1622 is made of a metal pattern in the same layer as the second sub-gate 23, and the first sub-gate 22 and the second sub-gate 23 are not in the same layer.
In some embodiments, referring to fig. 6 to 7, 8 to 9, 10 to 11, and 12 to 13, respectively, the barrier pattern 200 further includes a second pattern 163, a material of the second pattern 163 is different from that of the first pattern 162, the second pattern 163 is located in the non-display area BB and between the first pattern 162 and the display area AA, and the second pattern 163 is parallel to the first pattern 162.
Specifically, in some embodiments, the first pattern 162 is the same as fig. 2 and 3, and the second pattern 163 is the same as fig. 4 and 5, that is, the first pattern 162 may be composed of the second groove 1620 and/or the portion of the first organic material, and the second pattern 163 may be composed of a metal material; in some embodiments, the first pattern 162 is the same as fig. 4 and 5, and the second pattern 163 is the same as fig. 2 and 3, that is, the second pattern 163 may be composed of the second groove 1620 and/or a portion of the first organic material, and the first pattern 162 may be composed of a metal material.
In some embodiments, referring to fig. 6 to 7 and 8 to 9, the second pattern 163 includes at least two columns of third sub-patterns 1631, the third sub-patterns 1631 in two adjacent columns are arranged in a staggered manner along a third direction, and the first sub-patterns 1621 and the third sub-patterns 1631 in two adjacent columns are arranged in a staggered manner along the third direction, where the third direction is different from the second direction.
Specifically, please refer to fig. 6 to 7, the first sub-patterns 1621 in the same column are arranged along a direction parallel to the second direction, the second direction is parallel to the long side of the non-display area BB, the third direction is different from the second direction, preferably, the third direction is perpendicular to the second direction, the first sub-patterns 1621 are in a block shape or an island shape, the third sub-patterns 1631 in two adjacent columns are arranged along the third direction in a staggered manner, and the first sub-patterns 1621 and the third sub-patterns 1631 in two adjacent columns are arranged along the third direction in a staggered manner.
Specifically, in some embodiments, please refer to fig. 10 to 11 and fig. 12 to 13, respectively, the first sub-pattern 1621 may be a stripe, and the third sub-pattern 1631 may be a stripe; in some embodiments, one of the first sub-pattern 1621 and the third sub-pattern 1631 may be block-shaped or island-shaped, and the other of the first sub-pattern 1621 and the third sub-pattern 1631 may be stripe-shaped.
Specifically, in some embodiments, referring to fig. 14 to 15, the barrier pattern 200 further includes a barrier extension 262, the barrier extension 262 is formed on the first pattern or/and the second pattern of the non-display area BB by the first organic layer, specifically, a front projection of the barrier extension 262 perpendicular to the substrate 11 at least partially covers a front projection of the first pattern or/and the second pattern on the substrate 11, and further, a front projection of the barrier extension 262 perpendicular to the substrate 11 completely covers a front projection of the first pattern or/and the second pattern on the substrate 11.
Specifically, in some embodiments, referring to fig. 15, when the first pattern 162 is formed by the second recess 1620 of the first inorganic layer in the non-display area BB or/and the first organic layer 16 accommodated by the second recess 1620, the barrier extension 262 may be integrated with the first pattern 162, and when the second pattern 163 is formed by the second recess 1620 of the first inorganic layer in the non-display area BB or/and the first organic layer 16 accommodated by the second recess 1620, the barrier extension 262 may be integrated with the second pattern 163.
In some embodiments, the first pattern 162 described above includes at least one of an inorganic layer, an organic layer, and a metal layer, and the second pattern 163 includes at least one of an inorganic layer, an organic layer, and a metal layer.
In some embodiments, the display panel 10 includes a thin film transistor located in the display area AA, and the thin film transistor includes: an active layer 21; a gate insulating layer disposed on the active layer; a gate electrode disposed on the gate insulating layer; an interlayer insulating layer 15 provided on the gate electrode; a source drain layer 24 provided on the interlayer insulating layer 15; wherein the first inorganic layer includes at least one of a gate insulating layer and an interlayer insulating layer, for example, the first inorganic layer includes a gate insulating layer, for example, the first inorganic layer includes an interlayer insulating layer, for example, the first inorganic layer includes a first sub-gate insulating layer 13 and a second sub-gate insulating layer 14, for example, the first inorganic layer includes a gate insulating layer and an interlayer insulating layer, for example, the first inorganic layer includes a first sub-gate insulating layer 13, a second sub-gate insulating layer 14, and an interlayer insulating layer 15; in the above embodiments, the case where the first inorganic layer includes the first sub-gate insulating layer 13, the second sub-gate insulating layer 14, and the interlayer insulating layer 15 is exemplified, but not limited thereto, for example, in some embodiments, the gate insulating layer and the gate electrode of the thin film transistor may be only one layer, respectively, for example, in some embodiments, the gate electrode has only 22 layers of metal, and has an insulating layer and a capacitor electrode above 22, the layer position of the insulating layer is the same as that of the second sub-gate insulating layer 14, and the layer position of the capacitor electrode is the same as that of the second sub-gate 23, which is not limited herein.
Specifically, in some embodiments, the non-display area BB of the display panel 10 further includes a GOA circuit (gate driving circuit) 300, and a blocking pattern may be disposed on the non-display area BB of the GOA circuit 300 on a side away from the display area AA to block cracks in the first inorganic layer or/and other inorganic layers from spreading toward the GOA circuit 300 and the display area AA.
Specifically, in some embodiments, the display panel 10 further includes a planarization layer disposed on the source/drain layer 24, the buffer layer 12, the gate insulating layer, and the interlayer insulating layer 15 are further disposed on a side of the non-display area BB away from the barrier pattern 200, and further include a third groove 311, the third groove 311 may include one or more third sub-grooves parallel to the second direction, the third groove 311 is used to accommodate the planarization layer to form another crack barrier and buffer structure, and the planarization layer is made of an organic material.
In an embodiment of the present application, a display panel 10 is provided, where the display panel 10 includes a display area AA and a non-display area BB surrounding the display area AA, a first inorganic layer includes a first portion located in the non-display area BB and a second portion located in the display area AA, a blocking pattern 200 connected to the first inorganic layer is disposed in the non-display area BB, and the blocking pattern 200 can block generation and diffusion of cracks in the first inorganic layer, thereby preventing phenomena such as trace breakage, and improving display quality and reliability of the display panel.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The above embodiments of the present application are described in detail, and specific examples are applied in the present application to explain the principles and implementations of the present application, and the description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims (10)

1. A display panel comprising a display area and a non-display area surrounding the display area, the display panel comprising:
a first inorganic layer including a first portion located within the non-display area;
a barrier pattern located within the non-display area and connected to the first portion of the first inorganic layer.
2. The display panel of claim 1,
the display panel further comprises a first organic layer positioned on the first inorganic layer, wherein the first inorganic layer comprises a second part positioned in the display area, the second part is provided with a first groove, and at least one part of the first organic layer is contained in the first groove;
the barrier pattern includes a first pattern having a same size as the first groove at least in the first direction.
3. The display panel of claim 2,
the first pattern comprises at least one row of first sub-patterns, the at least one row of first sub-patterns are arranged along a direction parallel to a second direction, and the second direction is parallel to the long side of the non-display area.
4. The display panel of claim 3,
the first pattern comprises at least two columns of the first sub-patterns, the first sub-patterns in the same column are arranged along a direction parallel to the second direction, the first sub-patterns in two adjacent columns are arranged along a third direction in a staggered mode, and the third direction is different from the second direction.
5. The display panel of claim 3,
the first pattern further comprises at least one column of second sub-patterns, the at least one column of second sub-patterns are arranged along a direction parallel to the second direction, and the first sub-patterns and the second sub-patterns are located on different layers.
6. The display panel of claim 3,
the barrier patterns further include a second pattern of a material different from the first pattern, the second pattern being located within the non-display area and between the first pattern and the display area, the second pattern being parallel to the first pattern.
7. The display panel of claim 6,
the second pattern comprises at least two columns of third sub-patterns, the third sub-patterns of two adjacent columns are arranged in a staggered mode along a third direction, the first sub-patterns and the third sub-patterns of two adjacent columns are arranged in a staggered mode along the third direction, and the third direction is different from the second direction.
8. The display panel of claim 6,
the first pattern includes at least one of an inorganic layer, an organic layer, and a metal layer, and the second pattern includes at least one of an inorganic layer, an organic layer, and a metal layer.
9. The display panel of claim 1,
further comprising a thin film transistor in the display area, the thin film transistor comprising: an active layer; a gate insulating layer disposed on the active layer; a gate electrode disposed on the gate insulating layer; an interlayer insulating layer disposed on the gate electrode; a source drain layer disposed on the interlayer insulating layer;
wherein the first inorganic layer includes at least one of the gate insulating layer and the interlayer insulating layer.
10. A display device comprising the display panel according to any one of claims 1 to 9.
CN202011244209.4A 2020-11-10 2020-11-10 Display panel and display device Active CN112420744B (en)

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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150091030A1 (en) * 2013-09-30 2015-04-02 Samsung Display Co., Ltd. Display devices and methods of manufacturing display devices
CN106997930A (en) * 2017-03-03 2017-08-01 上海天马有机发光显示技术有限公司 Flexible display panels and display device
CN108766996A (en) * 2018-06-25 2018-11-06 上海天马微电子有限公司 A kind of flexible display panels and flexible display apparatus
CN109346484A (en) * 2018-10-12 2019-02-15 武汉华星光电半导体显示技术有限公司 Folding display screen and preparation method thereof
CN109860258A (en) * 2019-02-27 2019-06-07 武汉华星光电半导体显示技术有限公司 Flexible organic light-emitting diode (OLED) display screen
CN110620132A (en) * 2019-08-30 2019-12-27 武汉华星光电半导体显示技术有限公司 Display panel
KR20200039272A (en) * 2018-10-05 2020-04-16 엘지디스플레이 주식회사 Display device
CN111261642A (en) * 2020-02-10 2020-06-09 武汉华星光电半导体显示技术有限公司 Flexible display panel
CN111384069A (en) * 2020-03-25 2020-07-07 京东方科技集团股份有限公司 Display substrate, preparation method thereof and display panel
CN111755624A (en) * 2020-06-24 2020-10-09 武汉华星光电半导体显示技术有限公司 Display panel and display device

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150091030A1 (en) * 2013-09-30 2015-04-02 Samsung Display Co., Ltd. Display devices and methods of manufacturing display devices
CN106997930A (en) * 2017-03-03 2017-08-01 上海天马有机发光显示技术有限公司 Flexible display panels and display device
CN108766996A (en) * 2018-06-25 2018-11-06 上海天马微电子有限公司 A kind of flexible display panels and flexible display apparatus
KR20200039272A (en) * 2018-10-05 2020-04-16 엘지디스플레이 주식회사 Display device
CN109346484A (en) * 2018-10-12 2019-02-15 武汉华星光电半导体显示技术有限公司 Folding display screen and preparation method thereof
CN109860258A (en) * 2019-02-27 2019-06-07 武汉华星光电半导体显示技术有限公司 Flexible organic light-emitting diode (OLED) display screen
CN110620132A (en) * 2019-08-30 2019-12-27 武汉华星光电半导体显示技术有限公司 Display panel
CN111261642A (en) * 2020-02-10 2020-06-09 武汉华星光电半导体显示技术有限公司 Flexible display panel
CN111384069A (en) * 2020-03-25 2020-07-07 京东方科技集团股份有限公司 Display substrate, preparation method thereof and display panel
CN111755624A (en) * 2020-06-24 2020-10-09 武汉华星光电半导体显示技术有限公司 Display panel and display device

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