CN110993670A

CN110993670A - OLED display panel

Info

Publication number: CN110993670A
Application number: CN201911296379.4A
Authority: CN
Inventors: 周思思
Original assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Current assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date: 2019-12-16
Filing date: 2019-12-16
Publication date: 2020-04-10

Abstract

The application discloses an OLED display panel, which is provided with a display area and a non-display area, and further comprises a substrate base plate and a flattening layer arranged on one side of the substrate base plate, wherein the substrate base plate corresponds to the display area, a thin film transistor array layer is arranged on one side of the substrate base plate, which is far away from the flattening layer, and a GOA circuit is arranged on one side of the substrate base plate, which corresponds to the non-display area and faces the flattening layer; the surface of the planarization layer, which corresponds to the non-display area and is away from the substrate, is provided with an anode metal layer; the anode metal layer is provided with a plurality of anode openings, and the orthographic projection of each anode opening on the substrate does not cover the orthographic projection of the thin film transistor array layer on the substrate.

Description

OLED display panel

Technical Field

The application relates to the technical field of display, in particular to an OLED display panel.

Background

An AMOLED (Active-matrix organic light-emitting diode) display panel is gradually becoming a new generation of display technology due to its characteristics of high contrast, wide color gamut, low power consumption, and being foldable. Compared with the LCD (Liquid Crystal Display) technology, the AMOLED has a great advantage that it can be applied to a flexible Display panel, and particularly, the lower frame of the panel can be bent to the rear of the panel by the so-called pad bending (panel bending) technology, so as to achieve the purpose of reducing the frame. The lower frame of the front surface of the bent panel is only provided with WOA (wire on Array, multiple sector Array substrate wires) at the left and right sides for transmitting a Gate Driver on Array (GOA) signal.

However, the GOA circuit has a complex structure, and when the GOA circuit is miniaturized and integrated in the non-display area of the array substrate, the GOA circuit is easily damaged by static electricity, resulting in a fatal or potential failure of the GOA circuit.

In summary, in the conventional OLED display panel, during the static test, the thin film transistor array region located around the opening of the entire anode metal layer passes through the GOA circuit and discharges static electricity, so that the GOA circuit is easily damaged by static electricity, which causes a fatal failure or a potential failure of the GOA circuit, and further affects the display effect of the OLED display panel.

Disclosure of Invention

The embodiment of the application provides a liquid crystal display panel, can prevent that flexible OLED display from being damaged at static test in-process thin film transistor, with the OLED display panel who solves now, because when static test, the trompil peripheral position that is located whole face anode metal layer passes through the thin film transistor array region and the static electricity discharge of GOA circuit, make GOA circuit take place electrostatic damage easily, lead to GOA circuit to produce fatal inefficacy or potential inefficacy, further influence the technical problem of OLED display panel's display effect.

The embodiment of the application provides an OLED display panel, which is provided with a display area and a non-display area, and further comprises a substrate base plate and a planarization layer arranged on one side of the substrate base plate, wherein the substrate base plate corresponds to the display area, one side far away from the planarization layer is provided with a thin film transistor array layer, and one side, corresponding to the non-display area and facing the planarization layer, of the substrate base plate is provided with a GOA circuit;

the surface of the planarization layer, which corresponds to the non-display area and is away from the substrate, is provided with an anode metal layer; the anode metal layer is provided with a plurality of anode openings, and the orthographic projection of each anode opening on the substrate does not cover the orthographic projection of the thin film transistor array layer on the substrate.

In some embodiments, the non-display area is provided with a plurality of metal wires, and the metal wires are positioned on one side of the planarization layer facing the substrate base plate; the orthographic projection of the plurality of anode openings on the substrate base plate does not cover the orthographic projection of the metal routing on the substrate base plate.

In some embodiments, the metal wirings include a cathode wiring, a data line wiring, a gate line wiring, a clock signal line, and a power supply wiring.

In some embodiments, the display region is provided with data lines on a side of the planarization layer facing the substrate base plate.

In some embodiments, the anode metal layer is composed of a first ITO layer, a silver metal layer, and a second ITO layer stacked from bottom to top.

In some embodiments, the material of the planarization layer is an organic resin.

In some embodiments, a surface of the planarization layer corresponding to the display area and facing away from the substrate is provided with an OLED device layer comprising an anode and a cathode oppositely disposed, and a light emitting layer disposed between the anode and the cathode; the anode metal layer and the anode of the OLED are arranged on the same layer.

In some embodiments, a pixel defining layer is formed between the anode metal layer and the cathode of the OLED.

In some embodiments, the thin film transistor array layer includes an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a drain electrode, and a source electrode.

In some embodiments, the active layer is made of indium gallium zinc oxide or low temperature polysilicon, the gate insulating layer and the interlayer insulating layer are made of silicon nitride or silicon oxide, and the gate electrode, the source electrode and the drain electrode are made of one or more of copper, molybdenum and titanium.

According to the OLED display panel, the opening area of the anode metal layer is avoided from the thin film transistor array area, the thin film transistor of the OLED display panel is effectively prevented from being damaged in the static test process, the yield of the OLED display panel is improved, the display stability of the OLED display panel is guaranteed, and the display effect of the OLED display panel is enhanced.

Drawings

The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic plan view of an OLED display panel according to an embodiment of the present disclosure.

Fig. 2 is a schematic cross-sectional structure diagram of an OLED display panel provided in an embodiment of the present application.

Fig. 3 is a schematic view of a lower arc of an OLED display panel according to an embodiment of the present disclosure.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials. A

The embodiment of the application aims at the existing OLED display panel, because when static electricity is tested, the periphery of the opening hole of the anode metal layer on the whole surface passes through the thin film transistor array area of the GOA circuit and static electricity is released, the GOA circuit is easy to generate static electricity damage, so that the GOA circuit is caused to generate fatal failure or potential failure, and the technical problem of further influencing the display effect of the OLED display panel is solved.

Fig. 1 is a schematic plane structure diagram of an OLED display panel according to an embodiment of the present disclosure. The OLED display panel includes a substrate base plate 10, and has a display region 11 and a non-display region 12. A plurality of pixel units are arranged in the display region 11 in an array shape, each pixel unit in the same row shares one gate line, and each pixel unit in the same column shares one data line. Each pixel unit comprises an OLED and a pixel driving circuit connected with the anode of the OLED, and the pixel driving circuit is driven by a GOA circuit arranged in the non-display area 12.

Specifically, an anode metal layer 13 is disposed in the non-display region 12, a plurality of anode openings 131 are disposed on the anode metal layer 13, and the anode openings 131 are used for relieving stress on the surface of the anode metal layer 13 with a large area and reducing a peeling risk.

Fig. 2 is a schematic cross-sectional view of an OLED display panel according to an embodiment of the present disclosure. The OLED display panel is provided with a display area 11 and a non-display area 12, and further comprises a substrate base plate 21 and a planarization layer 23 arranged on one side of the substrate base plate 21, wherein the substrate base plate 21 corresponds to the display area 11, a thin film transistor array layer 22 is arranged on one side, away from the planarization layer 23, of the substrate base plate 21, and a GOA circuit 29 is arranged on one side, corresponding to the non-display area 12, of the substrate base plate 21, facing the planarization layer 23;

wherein, the surface of the planarization layer 23, which corresponds to the non-display region 12 and is away from the substrate 21, is provided with an anode metal layer 26; a plurality of anode openings 261 are disposed on the anode metal layer 26, and an orthogonal projection of each anode opening 261 on the substrate 21 does not cover an orthogonal projection of the thin film transistor array layer 22 on the substrate 21.

In the OLED display panel provided in the embodiment of the present invention, the anode metal layer 26 is disposed on the surface of the planarization layer 23 corresponding to the non-display region 12 and away from the substrate 21, the plurality of anode openings 261 are disposed on the anode metal layer 26, and the positions of the anode openings 261 are away from the position of the thin film transistor array layer 22, so that the thin film transistors of the OLED display panel are effectively prevented from being damaged in the static test process, the yield of the OLED display panel is improved, the display stability of the OLED display panel is ensured, and the display effect of the OLED display panel is enhanced.

Preferably, the non-display area 12 is provided with a plurality of metal traces, and the metal traces are located on one side of the planarization layer 23 facing the substrate 21; the orthographic projection of the plurality of anode openings 261 on the substrate base 21 does not cover the orthographic projection of the metal traces on the substrate base 21. The metal traces include a cathode trace 27, a data line lead, a gate line lead, a clock signal line, and a power supply lead.

Specifically, the display region 11 is provided with a data line 28, and the data line 28 is located on a side of the planarization layer 23 facing the substrate base plate 21.

Preferably, the anode metal layer 26 is formed by stacking a first ITO layer, a silver metal layer, and a second ITO layer from bottom to top.

Preferably, the surface of the planarization layer 23 corresponding to the display region 11 and facing away from the substrate base plate 21 is provided with an OLED device layer 25, the OLED device layer 25 includes an anode 251 and a cathode 253 oppositely arranged, and a light emitting layer 252 arranged between the anode 251 and the cathode 253; the anode metal layer 26 is disposed in the same layer as the anode 251 of the OLED.

The cathode 253 is typically made of a metal material, such as aluminum (Al) or silver (Ag); the anode 251 is made of the same material as the anode metal layer 26 and can be formed in a single patterning process. The light emitting layer 252 may have a single-layer structure or a multi-layer structure; the single-layer structure means that the light-emitting layer 252 is formed by an organic light-emitting layer; the multilayer structure refers to a film structure in which the light-emitting layer 252 includes at least two layers, i.e., an organic light-emitting layer and a hole transport layer, or an organic light-emitting layer and a hole transport layer.

Preferably, the cathode 253 is connected to the cathode trace 7 through a via. A pixel defining layer 24 is formed between the anode metal layer 26 and the cathode 253 of the OLED.

Preferably, the thin film transistor array layer 22 includes an active layer 221, a gate insulating layer 222, a gate electrode 223, an interlayer insulating layer 224, a drain electrode 225, and a source electrode 226. The active layer is made of indium gallium zinc oxide or low-temperature polycrystalline silicon, the gate insulating layer and the interlayer insulating layer are made of silicon nitride or silicon oxide, and the gate electrode, the source electrode and the drain electrode are made of one or more of copper, molybdenum and titanium.

Fig. 3 is a schematic view of a lower arc of the OLED display panel according to the embodiment of the present application. The area of the GOA circuit with the thin film transistor array is avoided by the anode opening of the anode metal layer, so that the thin film transistor of the flexible OLED display is prevented from being damaged in the static test process.

According to the OLED display panel, the opening area of the anode metal layer is avoided from the thin film transistor array area, so that the thin film transistor of the OLED display panel is effectively prevented from being damaged in the static test process, the yield of the OLED display panel is improved, the display stability of the OLED display panel is guaranteed, and the display effect of the OLED display panel is enhanced.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The OLED display panel provided in the embodiments of the present application is described in detail above, and specific examples are applied herein to explain the principles and embodiments of the present application, and the description of the embodiments is only used to help understanding the technical solutions and core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims

1. The OLED display panel is characterized by further comprising a substrate base plate and a planarization layer arranged on one side of the substrate base plate, wherein the substrate base plate corresponds to the display area, a thin film transistor array layer is arranged on one side, away from the planarization layer, of the substrate base plate, and a GOA circuit is arranged on one side, facing the planarization layer, of the substrate base plate, and corresponds to the non-display area;

2. The OLED display panel of claim 1, wherein the non-display area is provided with a plurality of metal traces on a side of the planarization layer facing the substrate; the orthographic projection of the plurality of anode openings on the substrate base plate does not cover the orthographic projection of the metal routing on the substrate base plate.

3. The OLED display panel of claim 2, wherein the metal traces include cathode traces, data line leads, gate line leads, clock signal lines, and power supply leads.

4. The OLED display panel of claim 1, wherein the display area is provided with data lines on a side of the planarization layer facing the substrate base plate.

5. The OLED display panel according to claim 1, wherein the anode metal layer is composed of a first ITO layer, a silver metal layer, and a second ITO layer, which are stacked from bottom to top.

6. The OLED display panel of claim 1, wherein the material of the planarization layer is an organic resin.

7. The OLED display panel of claim 1, wherein a surface of the planarization layer corresponding to the display area and facing away from the substrate is provided with an OLED device layer including oppositely disposed anodes and cathodes, and a light emitting layer disposed between the anodes and cathodes; the anode metal layer and the anode of the OLED are arranged on the same layer.

8. The OLED display panel of claim 1, wherein a pixel defining layer is formed between the anode metal layer and a cathode of the OLED.

9. The OLED display panel of claim 1, wherein the thin film transistor array layer includes an active layer, a gate insulating layer, a gate electrode, an interlayer insulating layer, a drain electrode, and a source electrode.

10. The OLED display panel of claim 9, wherein the active layer is made of indium gallium zinc oxide or low temperature polysilicon, the gate insulating layer and the interlayer insulating layer are made of silicon nitride or silicon oxide, and the gate electrode, the source electrode and the drain electrode are made of one or more of copper, molybdenum and titanium.