CN112420526A - Double-substrate laminated structure and packaging method thereof - Google Patents
Double-substrate laminated structure and packaging method thereof Download PDFInfo
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- CN112420526A CN112420526A CN201910767399.9A CN201910767399A CN112420526A CN 112420526 A CN112420526 A CN 112420526A CN 201910767399 A CN201910767399 A CN 201910767399A CN 112420526 A CN112420526 A CN 112420526A
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- 239000000758 substrate Substances 0.000 title claims abstract description 259
- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 21
- 239000003292 glue Substances 0.000 claims abstract description 15
- 238000003825 pressing Methods 0.000 claims abstract description 7
- 229910000679 solder Inorganic materials 0.000 claims description 23
- 239000000853 adhesive Substances 0.000 claims description 21
- 230000001070 adhesive effect Effects 0.000 claims description 21
- 230000009977 dual effect Effects 0.000 claims description 14
- 239000011248 coating agent Substances 0.000 claims description 7
- 238000000576 coating method Methods 0.000 claims description 7
- 239000007787 solid Substances 0.000 claims description 4
- 230000000694 effects Effects 0.000 abstract description 2
- 239000000463 material Substances 0.000 description 9
- 230000005540 biological transmission Effects 0.000 description 7
- 239000012811 non-conductive material Substances 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000011231 conductive filler Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/50—Structural association of antennas with earthing switches, lead-in devices or lightning protectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
The invention discloses a double-substrate laminated structure and a packaging method, wherein the packaging method of the double-substrate laminated structure comprises the following steps: s1, providing an upper substrate and a lower substrate; s2, forming a through hole on the upper substrate along the thickness direction of the upper substrate; s3, implanting a plurality of supporting pieces with the same height on one surface of the upper substrate facing the lower substrate; s4, combining the upper substrate and the lower substrate, and applying pressure on the upper substrate to enable the supports with the same height to simultaneously abut against the lower substrate, so that a plurality of cavities are formed between the upper substrate and the lower substrate; and S5, injecting glue into the cavity through the through hole, baking and curing after the glue is dispensed, and connecting the upper substrate and the lower substrate to form a double-substrate laminated structure. In the process of combining the upper substrate and the lower substrate, the pressure is applied to the upper substrate and the effect of the support piece, so that the height of the cavity between the upper substrate and the lower substrate can be kept consistent, the influence of warping of the upper substrate/or/and the lower substrate is avoided, and the yield and the stability of products are improved.
Description
Technical Field
The invention belongs to the field of semiconductor manufacturing, and particularly relates to a double-substrate laminated structure and a packaging method.
Background
When the 5G high-speed communication era comes, millimeter wave frequency band transmission is not suitable for long-distance transmission, and path super-long signal attenuation is larger, so that millimeter wave frequency band transmission becomes a mainstream transmission technology of the 5G era, and correspondingly, higher requirements are also placed on a millimeter wave antenna, and the millimeter wave frequency band transmission mainly has two structures at present, one is a traditional IC + PCB + antenna structure, and the other is a newer AiP technology, which is an integrated structure of an IC + packaged antenna.
The transmission of the millimeter wave frequency band realizes high gain through the antenna array, and the EIRP value of the wireless system can be maximized due to the extremely short path of the antenna feeder line, thereby being beneficial to wider coverage. In addition, the wavelength of the millimeter wave band is extremely short, and any error in processing precision can cause impedance mismatch and further cause signal reflection, so that higher processing precision is required to meet the requirement of stable electrical performance; the traditional PCB processing technology cannot meet the millimeter wave processing precision requirement, so that the packaging processing technology with higher processing precision becomes a main processing mode for millimeter wave frequency band transmission.
The double-substrate packaging structure for realizing the 10G-40 GHz frequency band millimeter wave antenna and the antenna array in the packaging body is mainly formed by stacking two substrates, wherein the upper substrate is the antenna, the lower substrate is the main line, the consistent cavity height is kept between the upper substrate and the lower substrate, and the biggest difficulty of the structure is to realize the consistent height on a product with larger size due to the warping of the upper substrate and the lower substrate.
Disclosure of Invention
The present invention is directed to a dual substrate stack structure and a packaging method for solving the above problems.
In order to achieve one of the above objects, an embodiment of the present invention provides an encapsulation method for a dual substrate stacked structure, including: s1, providing an upper substrate and a lower substrate;
s2, forming a through hole on the upper substrate along the thickness direction of the upper substrate;
s3, implanting a plurality of supporting pieces with the same height on one surface of the upper substrate facing the lower substrate;
s4, combining the upper substrate and the lower substrate, and applying pressure on the upper substrate to enable the supports with the same height to simultaneously abut against the lower substrate, so that a plurality of cavities are formed between the upper substrate and the lower substrate;
and S5, injecting glue into the cavity through the through hole, baking and curing after the glue is dispensed, and connecting the upper substrate and the lower substrate to form a double-substrate laminated structure.
As a further improvement of an embodiment of the present invention, step S1 specifically includes: the provided upper substrate is an antenna substrate;
step S2 specifically includes: a through hole is formed in a non-antenna region of the upper substrate along a thickness direction of the upper substrate.
As a further improvement of an embodiment of the present invention, step S2 specifically includes: through holes are arranged in the central area and/or the four corners of the upper substrate.
As a further improvement of an embodiment of the present invention, the supporting member is a solder ball;
step S3 specifically includes: and implanting a plurality of solder balls with the same diameter on one surface of the upper substrate facing the lower substrate.
As a further improvement of an embodiment of the present invention, before step S4, the method further includes: and coating conductive adhesive on one side of the lower substrate facing the upper substrate and/or coating the conductive adhesive on the pad positions of the lower substrate corresponding to the solder balls.
As a further improvement of an embodiment of the present invention, step S4 specifically includes: providing a plate-shaped jig; and pressing a plate-shaped jig on the surface of the upper substrate far away from the lower substrate to apply pressure on the surface of the upper substrate far away from the lower substrate.
As a further improvement of an embodiment of the present invention, step S5 specifically includes: and if the position of any through hole corresponding to the lower substrate is a pad area, injecting conductive adhesive into the cavity through the current through hole.
In order to achieve the above object, according to another embodiment of the present invention, there is provided a dual substrate stack structure including: a lower substrate;
an upper substrate forming a cavity with the lower substrate, wherein the upper substrate is provided with a plurality of through holes along the thickness direction;
the support piece is formed in the cavity, fixedly connected to the upper substrate and abutted or connected to the lower substrate;
and the solid glue is arranged in the cavity, corresponds to the through hole and is connected with the upper substrate and the lower substrate.
As a further improvement of an embodiment of the present invention, the upper substrate is an antenna substrate, and the through hole is opened in a non-antenna region of the upper substrate.
As a further improvement of an embodiment of the present invention, the supporting element is a solder ball, the lower substrate is a pad area corresponding to the solder ball, and the solder ball is connected to the pad area through a conductive adhesive.
Compared with the prior art, the double-substrate laminated structure and the packaging method thereof can keep the height of the cavity between the upper substrate and the lower substrate consistent by applying pressure on the upper substrate and the action of the supporting piece in the process of combining the upper substrate and the lower substrate, avoid the influence of warping of the upper substrate and/or the lower substrate, and improve the yield and stability of products.
Drawings
Fig. 1 is a schematic flow chart illustrating a packaging method of a dual-substrate stacked structure according to an embodiment of the present invention;
FIG. 2 is a schematic step diagram of the packaging method of FIG. 1 according to the present invention;
FIG. 3 is a schematic view of another direction of the upper substrate after forming a through hole thereon according to an embodiment of the present invention;
fig. 4 and 5 are schematic structural diagrams of a dual-substrate stacked structure packaged by the packaging method described in fig. 1.
Detailed Description
The present invention will be described in detail below with reference to specific embodiments shown in the drawings. These embodiments are not intended to limit the present invention, and structural, methodological, or functional changes made by those skilled in the art according to these embodiments are included in the scope of the present invention.
It is noted that terms used herein such as "upper", "lower", etc., which denote relative positions in space, are described for convenience of description; the relationship of one element or feature to another element or feature being illustrated in the accompanying drawings. The spatially relative positional terms may be intended to encompass different orientations of the two-substrate stack structure in use or operation in addition to the orientation depicted in the figures. The package structure may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Referring to fig. 1 and 2, an embodiment of the present invention provides a method for packaging a dual substrate stack structure, where the method includes:
s1, providing an upper substrate 10 and a lower substrate 20;
s2, forming a through hole 11 in the upper substrate 10 along the thickness direction of the upper substrate 10;
s3, implanting a plurality of supporting members 13 with the same height on one surface of the upper substrate 10 facing the lower substrate 20;
s4, combining the upper substrate 10 and the lower substrate 20, and applying pressure on the upper substrate 10 to make the supports 13 with the same height abut against the lower substrate 20 at the same time, so that a plurality of cavities 30 are formed between the upper substrate 10 and the lower substrate 20;
s5, dispensing glue through the through hole 11, baking and curing after dispensing, so that the upper substrate 10 and the lower substrate 20 are connected to each other to form a double-substrate stacked structure.
In an implementation manner of the present invention, the upper substrate 10 and the lower substrate 20 may be both package boards made of metal, and the materials thereof are, for example: copper, iron; the upper substrate 10 and the lower substrate 20 may be made of the same material or different materials. In the embodiment of the present invention, the upper substrate 10 is an antenna substrate, and the lower substrate 20 is a main circuit board.
It should be noted that the size, shape, number, and opening position of the through holes 11 are not specifically limited, and the size, number, and shape can be specifically set according to the needs; for example: the through holes 11 are round holes, square holes, opposite-shaped holes and strip holes; the opening sizes of the through holes 11 are sequentially decreased progressively or sequentially increased progressively or are kept unchanged along the thickness direction of the substrate.
Referring to step S2, referring to fig. 3, in the preferred embodiment of the present invention, a through hole 11 is formed in the non-antenna region of the upper substrate 10 along the thickness direction of the upper substrate 10; in addition, in order to ensure the consistency of the height difference of the cavity 30 between the upper substrate 10 and the lower substrate 20 in the double-substrate stacked structure, the through holes 11 are preferably arranged in a uniform manner; in an embodiment of the present invention, step S2 specifically includes: through holes 11 are formed in the center area and/or four corners of the upper substrate 10.
Preferably, step S2 specifically includes: the number of the through holes 11 is proportional to the area of the upper substrate 10, i.e., the larger the area of the upper substrate 10, the larger the number thereof.
For step S3, the supporting member 13 may be made of a conductive material or a non-conductive material according to the connection relationship between the upper substrate 10 and the lower substrate 20; the selection of the material can be specifically adjusted according to actual needs, for example: when the upper substrate 10 and the lower substrate 20 are electrically connected at least at the supporting member 13, the supporting member 13 is made of a conductive material, and when the upper substrate 10 and the lower substrate 20 are electrically connected at least at the supporting member 13, the supporting member 13 is made of a non-conductive material, the shape of the supporting member 13 is not particularly limited, and the requirement can be met only by ensuring the height of the supporting member to be consistent.
In a preferred embodiment of the present invention, when the upper substrate 10 and the lower substrate 20 are electrically connected at least at the supporting element 13, the supporting element 13 may be a conductive solder ball, such as: solder balls, alloy balls, balls with cores, etc.; correspondingly, step S3 specifically includes: a plurality of solder balls with the same diameter are implanted on one surface of the upper substrate 10 facing the lower substrate 20, so that the heights of the supporting elements 13 are ensured to be the same through the consistency of the diameters of the solder balls, and the consistency of the heights of the cavities 30 between the upper substrate 10 and the lower substrate 20 is further ensured. In this embodiment, the position of the lower substrate 20 corresponding to the solder ball is generally pad area; of course, when the upper substrate 10 and the lower substrate 20 are non-electrically connected at least at the support 13, the support 13 may also be made in the shape of a solder ball, as long as the material is replaced with a non-conductive material.
Further, when the upper substrate 10 and the lower substrate 20 are electrically connected at least at the support 13, before the step S4, the method further includes: coating conductive adhesive on one side of the lower substrate 20 facing the upper substrate 10 and/or coating conductive adhesive 21 on the pad position of the lower substrate 20 corresponding to the solder balls; the conductive paste 21 may be applied in various ways, for example: the method is realized by adopting various modes such as spraying, printing and the like; the conductive adhesive can be a glue material with conductive filler and resin, a sintered adhesive and the like; when the step S4 is performed, the upper substrate 10 and the lower substrate 20 may be preliminarily connected by the conductive paste 21. It should be noted that, when the upper substrate 10 and the lower substrate 20 are non-conductive at the supporting member 13, the supporting member 13 is made of non-conductive material, and the step of coating the conductive adhesive 21 can be omitted; the conductive adhesive may also be replaced by a common non-conductive adhesive, which is not described herein again.
In addition, since the lower substrate 20 is a main circuit board, according to different usage scenarios of the dual-substrate stacked structure, the functional chip 23 and/or the ball 25 are usually mounted on the surface of the lower substrate 20 away from the upper substrate 10 to meet different requirements; if the functional chip and/or the ball mount is packaged on the side of the lower substrate 20 close to the upper substrate 10, the step is necessarily performed before the step S4; if the functional chips and/or the solder balls are packaged on the side of the lower substrate 20 away from the upper substrate 10, the step may be performed before or after step S4, which is not further described herein.
For step S4, the pressure may be applied to the upper substrate 10 in various ways, such as: an electric mechanical device is adopted to clamp the upper substrate 10 and can drive the upper substrate 10 to reciprocate in the thickness direction; in a preferred embodiment of the present invention, a plate-shaped jig 50 is provided; the plate-shaped jig 50 is pressed on the surface of the upper substrate 10 away from the lower substrate 20 to apply pressure on the surface of the upper substrate 10 away from the lower substrate 20.
In this embodiment, the pressure applied to the upper substrate 10 may be formed by the self-weight of the plate jig 50 or may be formed by the assistance of another mechanical structure; the support 13 can sufficiently contact the lower substrate 20 by the pressure applied to the upper substrate 10 without causing significant deformation of the support 13. In a specific embodiment of the present invention, the method further comprises: reserving an opening area 51 at a position of the provided plate-shaped jig 50 corresponding to the through hole 11, so as to inject glue into the cavity 30 of the upper and lower substrates 20 through the opening area 51 and the through hole 11; further, the plate-shaped jig 50 may be reserved with a substrate mark or a positioning hole area to facilitate the combination of the upper and lower substrates 20.
In step S5, a dispensing adhesive is injected from the through hole 11 of the upper substrate 10 into the cavity 30 between the upper and lower substrates 20, so as to connect the upper and lower substrates 10 and 20 by the dispensing adhesive and fix their relative positions. In the preferred embodiment of the present invention, the requirement for the glue material is to be able to stand to form the connection between the upper and lower substrates 20. Baking and curing are carried out after the dispensing is finished, so that the upper substrate 10 and the lower substrate 20 are connected with each other, and a double-substrate laminated structure is formed; the step S5 is performed to fix the upper and lower substrates 20 formed in the step S4 by the adhesive material in accordance with the height difference therebetween; it should be noted that the dispensing material here also has a difference between electrical conductivity and non-electrical conductivity, and if the upper and lower substrates 20 require electrical connection, a conductive adhesive is selected, and if the upper and lower substrates 20 require non-electrical connection, a non-conductive adhesive is selected, which is not further described herein.
In a preferred embodiment of the present invention, if the position of any through hole 11 corresponding to the lower substrate 20 is a pad region, the position is usually electrically connected, so that conductive glue is injected into the cavity 30 through the current through hole 11.
It should be noted that, if the plate-shaped jig 50 is used to apply pressure to the upper substrate 10 in the above flow, the plate-shaped jig 50 needs to be removed after baking and curing, which is not further described herein.
Referring to fig. 4 and 5, an embodiment of the present invention provides a dual substrate stacked structure formed by the method described above; the double substrate lamination structure includes: a lower substrate 20; an upper substrate 10 forming a cavity 30 with a lower substrate 20, the upper substrate 10 having a plurality of through holes 11 along a thickness direction thereof; a support 13 formed in the cavity 30, wherein the support 13 is fixedly connected to the upper substrate 10, and abuts against or is connected to the lower substrate 20; and the solid glue 15 is arranged in the cavity 30, and the solid glue 15 is arranged corresponding to the through hole 11 and is connected with the upper substrate 10 and the lower substrate 20.
In a preferred embodiment of the present invention, the upper substrate 10 is an antenna substrate, and the through hole 11 is opened in a non-antenna region of the upper substrate 10; preferably, the through holes 11 are formed in the central area and/or four corners of the upper substrate 10; preferably, the number of the through holes 11 is proportional to the area of the upper substrate 10.
Preferably, the lower substrate 20 is a main circuit board.
Preferably, the supporting member 13 can be made of a conductive material or a non-conductive material according to requirements.
In a preferred embodiment of the present invention, the supporting elements 13 are solder balls, the lower substrate 20 is a Pad area corresponding to the solder balls, and the solder balls are connected to the Pad area through a conductive adhesive.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific structure of the above-described dual-substrate stacked structure and the replacement manner of each component may refer to the corresponding description in the foregoing method embodiments, and will not be described herein again.
In summary, in the dual-substrate stacked structure and the packaging method of the present invention, by applying pressure on the upper substrate and the lower substrate during the process of bonding the upper substrate and the lower substrate and the effect of the supporting member, the height of the cavity between the upper substrate and the lower substrate can be kept consistent, and meanwhile, the influence of warpage of the upper substrate/or the lower substrate is avoided, and the yield and the stability of the product are improved.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above-listed detailed description is only a specific description of a possible embodiment of the present invention, and they are not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention should be included in the scope of the present invention.
Claims (10)
1. A method for packaging a dual substrate stack, the method comprising:
s1, providing an upper substrate and a lower substrate;
s2, forming a through hole on the upper substrate along the thickness direction of the upper substrate;
s3, implanting a plurality of supporting pieces with the same height on one surface of the upper substrate facing the lower substrate;
s4, combining the upper substrate and the lower substrate, and applying pressure on the upper substrate to enable the supports with the same height to simultaneously abut against the lower substrate, so that a plurality of cavities are formed between the upper substrate and the lower substrate;
and S5, injecting glue into the cavity through the through hole, baking and curing after the glue is dispensed, and connecting the upper substrate and the lower substrate to form a double-substrate laminated structure.
2. The packaging method of a dual substrate stack structure according to claim 1,
step S1 specifically includes: the provided upper substrate is an antenna substrate;
step S2 specifically includes: a through hole is formed in a non-antenna region of the upper substrate along a thickness direction of the upper substrate.
3. The method for packaging a dual substrate stack structure according to claim 1, wherein step S2 specifically includes: through holes are arranged in the central area and/or the four corners of the upper substrate.
4. The packaging method of claim 1, wherein the supporting members are solder balls;
step S3 specifically includes: and implanting a plurality of solder balls with the same diameter on one surface of the upper substrate facing the lower substrate.
5. The method for encapsulating a dual substrate stack according to claim 4, wherein before step S4, the method further comprises: and coating conductive adhesive on one side of the lower substrate facing the upper substrate and/or coating the conductive adhesive on the pad positions of the lower substrate corresponding to the solder balls.
6. The method for packaging a dual substrate stack structure according to claim 1, wherein step S4 specifically includes: providing a plate-shaped jig 50; a plate-shaped jig 50 is pressed on the surface of the upper substrate on the side away from the lower substrate to apply pressure on the surface of the upper substrate away from the lower substrate.
7. The method for packaging a dual substrate stack structure according to claim 1, wherein step S5 specifically includes: and if the position of any through hole corresponding to the lower substrate is a pad area, injecting conductive adhesive into the cavity through the current through hole.
8. A dual substrate stack structure, comprising:
a lower substrate;
an upper substrate forming a cavity with the lower substrate, wherein the upper substrate is provided with a plurality of through holes along the thickness direction;
the support piece is formed in the cavity, fixedly connected to the upper substrate and abutted or connected to the lower substrate;
and the solid glue is arranged in the cavity, corresponds to the through hole and is connected with the upper substrate and the lower substrate.
9. The dual substrate stack structure of claim 8,
the upper substrate is an antenna substrate, and the through hole is formed in a non-antenna area of the upper substrate.
10. The dual substrate stack structure of claim 8,
the support elements are solder balls, the lower substrate is a pad area corresponding to the solder balls, and the solder balls are connected to the pad area through conductive adhesive.
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| CN201910767399.9A CN112420526A (en) | 2019-08-20 | 2019-08-20 | Double-substrate laminated structure and packaging method thereof |
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| CN201910767399.9A CN112420526A (en) | 2019-08-20 | 2019-08-20 | Double-substrate laminated structure and packaging method thereof |
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