CN112416104A - Device for realizing last state of universal server power supply and recovery method - Google Patents
Device for realizing last state of universal server power supply and recovery method Download PDFInfo
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- CN112416104A CN112416104A CN202011414447.5A CN202011414447A CN112416104A CN 112416104 A CN112416104 A CN 112416104A CN 202011414447 A CN202011414447 A CN 202011414447A CN 112416104 A CN112416104 A CN 112416104A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/266—Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/81—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations
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Abstract
The invention provides a device and a recovery method for realizing a last state of a universal server power supply, wherein the device comprises the following steps: a central processor comprising an x86 architecture and an arm architecture; the power supply is connected with the central processing unit; the power management chip is connected with the power supply and is in communication connection with the central processing unit; and the storage chip is arranged on the periphery of the power management chip and is in communication connection with the power management chip. By adding the nonvolatile memory chip on the periphery of the power management chip, the problem of state preservation of last state of all platform server power supplies is solved without depending on RTC batteries, and the power management chip has the technical effects of higher reliability and stronger adaptability.
Description
Technical Field
The invention relates to the technical field of server power last state, in particular to a device for realizing the universal server power last state and a recovery method.
Background
Current generic servers are divided into two main types based on the x86 architecture and on the arm architecture. Based on the server of x86 framework, in order to realize the state save of server power last state, integrated a slice in x86 CPU through the cache of RTC battery power supply on the mainboard, after the AC power input of server complete machine disappears, the cache in CPU still can normally work owing to can pass through RTC button cell power supply on the mainboard, last state register content on the cache can not lose. Therefore, after the AC power supply of the whole machine is restored again, the power control chip on the mainboard can judge to directly enable the power on of the server or wait for the starting instruction of the user to carry out the power on by reading the last state register on the CPU cache. However, the server based on the arm architecture does not implement a mature solution of the server power last state to meet the use and maintenance requirements of the client.
However, in the process of implementing the technical solution in the embodiment of the present application, the inventor of the present application finds that the above prior art has at least the following technical problems:
in the prior art, because the state of the server power last state of the x86 architecture needs to be saved by relying on an RTC battery for power supply, if the RTC battery is exhausted, the problem that the state of the power last state cannot be saved is caused, and meanwhile, the technical problem that the server power last state depends on a CPU platform and cannot be expanded to other general servers exists.
Disclosure of Invention
The embodiment of the invention provides a device and a recovery method for realizing a universal server power last state, which are used for solving the technical problems that in the prior art, the state of the server power last state of an x86 framework needs to be supplied by an RTC battery, and the state of the power last state cannot be stored if the RTC battery is exhausted, and the device and the recovery method depend on a CPU platform and cannot be expanded to other universal servers. By adding the nonvolatile storage chip on the periphery of the power management chip, the state preservation problem of last state of the power supply of all platform servers is achieved without depending on RTC batteries, and the platform server power supply management chip has the technical effects of higher reliability and stronger adaptability.
In view of the foregoing problems, the embodiments of the present application are proposed to provide an apparatus and a recovery method for implementing a last state of a universal server power supply.
In a first aspect, the present invention provides an apparatus for implementing a last state of a universal server power supply, where the apparatus includes: a central processor comprising an x86 architecture and an arm architecture; the power supply is connected with the central processing unit; the power management chip is connected with the power supply and is in communication connection with the central processing unit; and the storage chip is arranged on the periphery of the power management chip and is in communication connection with the power management chip.
Preferably, the memory chip is a nonvolatile memory chip.
In a second aspect, the present invention further provides a method for implementing recovery of a last state of a universal server power supply, where the method includes: obtaining the running state of the central processing unit, wherein the running state comprises a starting-up state and a shutdown state; according to the running state, the central processing unit sends a state indicating signal to the power management chip; after receiving the state indication signal, the power management chip rewrites a last state through an access interface of the memory chip; when the power supply is accidentally powered off and recovered, the power supply management chip reads the last state; according to the read last state, the power supply management chip controls the on-off state of the power supply, wherein the on-off state of the power supply comprises opening and closing; judging whether the on-off state of the power supply is an on state; if the on-off state of the power supply is an on state, the central processing unit is directly electrified and started; and if the on-off state of the power supply is not the on-state, the central processing unit is started after waiting for a starting-up instruction.
Preferably, the sending, by the central processing unit, a status indication signal to the power management chip according to the operating status includes: judging whether the running state of the central processing unit is a starting state or not; and if the running state of the central processing unit is the starting-up state, the central processing unit sends a starting-up state indicating signal to the power management chip.
Preferably, the determining whether the running state of the central processing unit is a power-on state further includes: and if the running state of the central processing unit is not the starting-up state, the central processing unit sends a shutdown state indicating signal to the power management chip.
Preferably, after receiving the status indication signal, the power management chip rewrites a last state through an access interface of the memory chip, including: judging whether the received state indicating signal is the starting state indicating signal or not; if the received state indication signal is the boot state indication signal, the power management chip writes the last state as "on" through an access interface of the memory chip.
Preferably, the determining whether the received status indication signal is the power-on status indication signal further includes: if the received status indication signal is not the power-on status indication signal, the power management chip writes the last state to "off" through the access interface of the memory chip.
Preferably, the controlling, by the power management chip, the on-off state of the power supply according to the read last state includes: when the last state is read as 'on', the power management chip controls the power supply to be in an on state; when the last state is read as off, the power management chip controls the power to be in the off state.
Preferably, the last state after the power supply in the memory chip is restored is consistent with the last state before the power failure.
One or more technical solutions in the embodiments of the present application have at least one or more of the following technical effects:
the embodiment of the invention provides a device and a recovery method for realizing a last state of a universal server power supply, wherein the device comprises: a central processor comprising an x86 architecture and an arm architecture; the power supply is connected with the central processing unit; the power management chip is connected with the power supply and is in communication connection with the central processing unit; and the storage chip is arranged on the periphery of the power management chip and is in communication connection with the power management chip. The problem of because the state of the server power last state of x86 framework is preserved and need rely on RTC battery power supply among the prior art, when meetting RTC battery power exhaustion condition, thereby cause the unable preserved state of power last state's problem, there is the CPU platform of dependence simultaneously, can't expand the technical problem to other general servers. By adding the nonvolatile memory chip on the periphery of the power management chip, the problem of state preservation of last state of all platform server power supplies is solved without depending on RTC batteries, and the power management chip has the technical effects of higher reliability and stronger adaptability.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
Fig. 1 is a schematic structural diagram of an apparatus for implementing a last state of a universal server power supply in an embodiment of the present invention;
fig. 2 is a schematic flowchart of a method for implementing a last state recovery of a universal server power supply according to an embodiment of the present invention;
fig. 3 is a schematic flow chart of a method for recovering a last state of a cpu power supply in a boot state according to an embodiment of the present invention;
fig. 4 is a schematic flow chart of a method for recovering a last state of a power supply of a central processing unit in a shutdown state according to an embodiment of the present invention.
Description of reference numerals: the system comprises a central processing unit 1, a power supply 2, a power supply management chip 3 and a storage chip 4.
Detailed Description
The embodiment of the invention provides a device and a recovery method for realizing a universal server power last state, which solve the technical problems that in the prior art, the state of the server power last state of an x86 architecture needs to be stored by relying on an RTC battery for power supply, and the power last state cannot be stored if the RTC battery is exhausted, and cannot be expanded to other universal servers by relying on a CPU platform.
The technical scheme provided by the invention has the following general idea: a central processor comprising an x86 architecture and an arm architecture; the power supply is connected with the central processing unit; the power management chip is connected with the power supply and is in communication connection with the central processing unit; and the storage chip is arranged on the periphery of the power management chip and is in communication connection with the power management chip. By adding the nonvolatile memory chip on the periphery of the power management chip, the problem of state preservation of last state of all platform server power supplies is solved without depending on RTC batteries, and the power management chip has the technical effects of higher reliability and stronger adaptability.
The technical solutions of the present invention are described in detail below with reference to the drawings and specific embodiments, and it should be understood that the specific features in the embodiments and examples of the present invention are described in detail in the technical solutions of the present application, and are not limited to the technical solutions of the present application, and the technical features in the embodiments and examples of the present application may be combined with each other without conflict.
The term "and/or" herein is merely an association describing an associated object, meaning that three relationships may exist, e.g., a and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
Example one
Fig. 1 is a schematic structural diagram of an apparatus for implementing a last state of a universal server power supply in an embodiment of the present invention. As shown in fig. 1, an embodiment of the present invention provides an apparatus for implementing a last state of a universal server power supply, where the apparatus includes:
a central processor 1, said central processor 1 comprising an x86 architecture and an arm architecture;
the power supply 2 is connected with the central processing unit 1;
the power management chip 3 is connected with the power supply 2 and is in communication connection with the central processing unit 1;
and the storage chip 4 is arranged at the periphery of the power management chip 3 and is in communication connection with the power management chip 3.
Further, the memory chip 4 is a nonvolatile memory chip 4.
Specifically, last state literally means the last state, here meaning the state before the power down or interruption occurred to restore the server. In the embodiment of the present invention, the central processing unit 1, abbreviated as CPU, may be a server based on an x86 architecture or an arm architecture, where the x86 architecture adopts a complex instruction set, and instructions in the instruction set are complex, that is, a very long instruction may have many functions; the arm architecture is a simplified instruction set, the instructions in the instruction set are simplified, that is, several simplified instructions are needed to complete many functions, or any general-purpose server except x86 and arm architecture, and has strong universality, the power supply 2 is used for supplying power to the central processing unit 1, the power management chip 3 is arranged inside the power supply 2 and is electrically connected with the power supply 2, wherein the power management chip 3 is used for carrying out conversion, distribution, detection and other processing on the electric energy provided by the power supply 2 in the device, is mainly used for controlling and stabilizing the power supply voltage of the central processing unit 1, a nonvolatile memory chip 4 is added at the periphery of the power management chip 3, the nonvolatile memory chip 4 is mainly used for storing the last state of the whole server, is used for replacing the RTC battery in the traditional technology, and overcomes the problem that the last state of the power supply 2 cannot be stored due to the exhaustion of the RTC battery, therefore, the state storage problem of all platform server power supplies 2last state is achieved without depending on RTC batteries, and the technical effects of higher reliability and stronger adaptability are achieved.
Example two
The embodiment of the present invention further provides a method for implementing recovery of a universal server power supply 2last state, as shown in fig. 2, the method includes:
step 110: obtaining the running state of the central processing unit 1, wherein the running state comprises a starting-up state and a shutdown state;
step 120: according to the running state, the central processing unit 1 sends a state indicating signal to the power management chip 3;
step 130: after receiving the state indication signal, the power management chip 3 rewrites a last state through an access interface of the memory chip 4;
step 140: when the power supply 2 is unexpectedly powered down and recovered, the power supply management chip 3 reads the last state;
step 150: according to the read last state, the power management chip 3 controls the on-off state of the power supply 2, wherein the on-off state of the power supply 2 comprises on and off;
step 160: judging whether the on-off state of the power supply 2 is an on state;
step 170: if the on-off state of the power supply 2 is the on-state, the central processing unit 1 is directly electrified and started;
step 180: if the on-off state of the power supply 2 is not the on state, the central processing unit 1 is started after waiting for a starting instruction.
Specifically, the operation state of the central processing unit 1 includes two states of power on and power off, and the embodiment of the present invention can realize the last state problem of the power supply 2 of the central processing unit 1 in the two states, specifically, according to the operation state of the central processing unit 1, a corresponding state indication signal is sent to the power supply management chip 3, after receiving the state indication signal, the power supply management chip 3 writes the last state into the corresponding state through an access interface of the nonvolatile memory chip 4, when the power supply 2 is unexpectedly powered down and restored, the power supply management chip 3 is started, and then reads the last state, wherein the last state read after the power supply 2 in the memory chip 4 is restored and the last state before the power down are kept unchanged, so as to control the switch of the power supply 2 to be in the on or off state, when the switch of the power supply 2 is turned on, the central processing unit 1 is directly electrified and started; when the switch of the power supply 2 is turned off, the central processing unit 1 can be started only after waiting for a user starting instruction, so that the problem of state preservation of all platform server power supplies 2last state without depending on RTC batteries is solved, and the technical effects of higher reliability and stronger adaptability are achieved.
Further, fig. 3 is a flow chart of a method for recovering the last state of the power supply 2 of the cpu 1 in the power-on state, specifically, when the central processing unit 1 is in the power-on state, the central processing unit 1 sends a power-on state indicating signal to the power management chip 3, after receiving the power-on state indication signal, the power management chip 3 writes the last state as "on" through the access interface of the memory chip 4, when the AC input of the central processing unit 1 is powered off accidentally, wherein the AC input means the input of the AC power supply 2, namely, when the power supply 2 responsible for supplying power is unexpectedly powered down, the central processing unit 1, the power supply management chip 3 and the memory chip 4 are all powered down, and at the moment, the last state inside the memory chip 4 is kept unchanged and still remains "on"; when the power supply 2 recovers, the power management chip 3 is started, then the last state inside the storage chip 4 is read, because the last state before the power supply 2 is powered down is "on", then the last state read by the power management chip 3 is still "on", according to the read last state, the power management chip 3 can directly control to turn on the switch of the power supply 2, the central processing unit 1 is directly powered on to be started, so that the central processing unit 1 recovers the state before the power down, and the problem of saving the last state of the power supply 2 in the starting state of all the platform servers is further solved.
Further, fig. 4 is a schematic flow chart of a method for recovering a last state of a power supply 2 of a central processing unit 1 in a shutdown state, specifically, when a user of the central processing unit 1 normally shuts down the central processing unit, the central processing unit 1 sends a shutdown state indication signal to the power management chip 3, after receiving the shutdown state indication signal, the power management chip 3 writes the last state to "off" through an access interface of the storage chip 4, and turns off an internal "power supply 2" switch according to a shutdown flow, a server normally shuts down the central processing unit, when an AC input of the central processing unit 1 unexpectedly fails, where the AC input means an AC power supply 2 input, that is, when the power supply 2 responsible for supplying power unexpectedly fails, the central processing unit 1, the power management chip 3, and the storage chip 4 all fail, at this time, the last state inside the memory chip 4 is kept as the last written off state; when the power supply 2 recovers, the power management chip 3 is started, then the last state inside the storage chip 4 is read, because the last state before the power supply 2 is powered down is "off", then the last state read by the power management chip 3 is still "off", according to the read last state, the power management chip 3 can control the power supply 2 to be in an off state, the central processing unit 1 waits for a user power-on instruction to realize the startup, and thus the central processing unit 1 recovers the state before the power down, and further the problem of saving the power supply 2last state in the power-off state of all platform servers is solved.
One or more technical solutions in the embodiments of the present application have at least one or more of the following technical effects:
the embodiment of the invention provides a device and a recovery method for realizing a last state of a universal server power supply, wherein the device comprises: a central processor comprising an x86 architecture and an arm architecture; the power supply is connected with the central processing unit; the power management chip is connected with the power supply and is in communication connection with the central processing unit; and the storage chip is arranged on the periphery of the power management chip and is in communication connection with the power management chip. The problem of because the state of the server power last state of x86 framework is preserved and need rely on RTC battery power supply among the prior art, when meetting RTC battery power exhaustion condition, thereby cause the unable preserved state of power last state's problem, there is the CPU platform of dependence simultaneously, can't expand the technical problem to other general servers. By adding the nonvolatile memory chip on the periphery of the power management chip, the problem of state preservation of last state of all platform server power supplies is solved without depending on RTC batteries, and the power management chip has the technical effects of higher reliability and stronger adaptability.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. An apparatus for implementing a universal server power last state, the apparatus comprising:
a central processor comprising an x86 architecture and an arm architecture;
the power supply is connected with the central processing unit;
the power management chip is connected with the power supply and is in communication connection with the central processing unit;
and the storage chip is arranged on the periphery of the power management chip and is in communication connection with the power management chip.
2. The apparatus of claim 1, wherein the memory chip is a non-volatile memory chip.
3. A recovery method for implementing a last state of a universal server power supply, the method comprising:
obtaining the running state of the central processing unit, wherein the running state comprises a starting-up state and a shutdown state;
according to the running state, the central processing unit sends a state indicating signal to the power management chip;
after receiving the state indication signal, the power management chip rewrites a last state through an access interface of the memory chip;
when the power supply is accidentally powered off and recovered, the power supply management chip reads the last state;
according to the read last state, the power supply management chip controls the on-off state of the power supply, wherein the on-off state of the power supply comprises opening and closing;
judging whether the on-off state of the power supply is an on state;
if the on-off state of the power supply is an on state, the central processing unit is directly electrified and started;
and if the on-off state of the power supply is not the on-state, the central processing unit is started after waiting for a starting-up instruction.
4. The method of claim 3, wherein said sending a status indication signal from said central processor to said power management chip based on said operational status comprises:
judging whether the running state of the central processing unit is a starting state or not;
and if the running state of the central processing unit is the starting-up state, the central processing unit sends a starting-up state indicating signal to the power management chip.
5. The method of claim 4, wherein said determining whether the operating state of the central processing unit is a boot state further comprises:
and if the running state of the central processing unit is not the starting-up state, the central processing unit sends a shutdown state indicating signal to the power management chip.
6. The method of claim 5, wherein the receiving the status indication signal, the power management chip overwriting a last state status via an access interface of the memory chip comprises:
judging whether the received state indicating signal is the starting state indicating signal or not;
if the received state indication signal is the boot state indication signal, the power management chip writes the last state as "on" through an access interface of the memory chip.
7. The method of claim 6, wherein said determining whether the received status indication signal is the power-on status indication signal further comprises:
if the received status indication signal is not the power-on status indication signal, the power management chip writes the last state to "off" through the access interface of the memory chip.
8. The method as claimed in claim 7, wherein the power management chip controls the on/off state of the power supply according to the read last state, comprising:
when the last state is read as 'on', the power management chip controls the power supply to be in an on state;
when the last state is read as off, the power management chip controls the power to be in the off state.
9. The method of claim 3, wherein a last state after power restoration within the memory chip is consistent with a last state prior to power loss.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN1291737A (en) * | 1999-09-16 | 2001-04-18 | 国际商业机器公司 | Computer and power source control method thereof |
| CN103926991A (en) * | 2013-01-14 | 2014-07-16 | 鸿富锦精密工业（深圳）有限公司 | Automatic power-on system and automatic power-on method |
| CN111475343A (en) * | 2020-04-15 | 2020-07-31 | 中国长城科技集团股份有限公司 | Computer state power failure recovery method and device and terminal equipment |
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2020
- 2020-12-04 CN CN202011414447.5A patent/CN112416104A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1291737A (en) * | 1999-09-16 | 2001-04-18 | 国际商业机器公司 | Computer and power source control method thereof |
| CN103926991A (en) * | 2013-01-14 | 2014-07-16 | 鸿富锦精密工业（深圳）有限公司 | Automatic power-on system and automatic power-on method |
| CN111475343A (en) * | 2020-04-15 | 2020-07-31 | 中国长城科技集团股份有限公司 | Computer state power failure recovery method and device and terminal equipment |
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