CN112331741A - Crystalline silicon solar cell, crystalline silicon solar cell module and manufacturing method of crystalline silicon solar cell module - Google Patents
Crystalline silicon solar cell, crystalline silicon solar cell module and manufacturing method of crystalline silicon solar cell module Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/05—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells
- H01L31/0504—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
A crystalline silicon solar cell, a crystalline silicon solar cell module and a manufacturing method of the crystalline silicon solar cell module belong to the field of solar cells. The manufacturing method of the crystalline silicon solar cell comprises the following steps: providing a battery having a transparent conductive film on a surface thereof; slicing the battery to form a sliced battery; and manufacturing a dielectric film on the transparent conductive film on the surface of the segmented cell. The crystalline silicon solar cell manufactured by the method can improve the conversion efficiency of the cell and effectively avoid the efficiency loss caused by slicing operation.
Description
Technical Field
The application relates to the field of solar cells, in particular to a crystalline silicon solar cell, a crystalline silicon solar cell module and a manufacturing method of the crystalline silicon solar cell module.
Background
The heterojunction solar cell is known as the highest point of the future photovoltaic power generation technology due to the excellent performances of high efficiency, low attenuation rate, simple process, good structure ductility and the like. But its cost is high, thus limiting its large-scale development.
Compared with PERC (Passivated emitter and reactor Contact Solar Cells), the open circuit voltage of the heterojunction cell is up to 740mV or more due to the excellent passivation performance of amorphous silicon, but the current density is low. How to further increase the current density becomes a key to further improve the efficiency of the heterojunction cell.
Currently, the photovoltaic industry generally prepares slice assemblies by laser slicing to reduce power loss. However, laser dicing operations produce a loss in efficiency of the resulting cell compared to the cell before dicing, and such problems are particularly acute in heterojunction cells. After the heterojunction battery is subjected to laser slicing, the efficiency loss is more than 0.3%.
How to recover or reduce the efficiency lost by laser dicing becomes an urgent problem to be solved.
Disclosure of Invention
Based on the defects, the application provides a crystalline silicon solar cell, a crystalline silicon solar cell module and a manufacturing method of the crystalline silicon solar cell module, so as to partially or completely improve and even solve the problems of damage, efficiency loss and the like existing after cell cutting.
The application is realized as follows:
in a first aspect, examples of the present application provide a method of fabricating a crystalline silicon solar cell.
The manufacturing method comprises the following steps:
providing a battery, wherein the battery is provided with a transparent conductive film positioned on the surface;
slicing the battery to form a sliced battery;
and manufacturing a dielectric film on the transparent conductive film on the surface of the segmented cell.
Aiming at the condition that efficiency damage is generated after slicing operation (such as laser slicing), and the battery efficiency after slicing is different from the battery efficiency of a primary battery (before being sliced), in the scheme of the application, the dielectric film is manufactured after slicing, so that the effects of repairing the damage and making up the efficiency loss can be achieved.
Damage to the cell after laser dicing can be repaired by passivation by deposition of a dielectric film such as SiN, particularly SiN deposited at the edges of the cell. In addition, the dielectric film with good passivation effect can repair the damage caused by laser slicing and improve the conversion efficiency of the battery. In addition, the split battery with accurate efficiency can be obtained by testing and sorting after the dielectric film is manufactured.
According to some examples of the present application, the battery is formed into two or more sliced batteries through a slicing operation; optionally, the dicing operation is achieved by laser dicing.
According to some examples of the present application, the cell is formed into two divided cells by a half-cut operation, wherein the transparent conductive film is ITO and the dielectric film is SiN.
According to some examples of the present application, the battery comprises a heterojunction battery.
According to some examples of the present application, a heterojunction cell comprises:
respectively manufacturing a first intrinsic amorphous silicon layer, a first doped amorphous silicon layer, a first transparent conductive film and a first electrode on the front surface of the substrate;
respectively manufacturing a second intrinsic amorphous silicon layer, a second doped amorphous silicon layer, a second transparent conductive film and a second electrode on the back surface of the substrate;
dielectric films are manufactured on the first transparent conductive film and the second transparent conductive film.
According to some examples of the present application, the heterojunction cell comprises one or more of the following limitations:
respectively manufacturing the front surface and the back surface of the first limiting substrate to form a light trapping structure;
the second limited, intrinsic amorphous silicon layer and the doped amorphous silicon layer are manufactured by a plasma enhanced chemical vapor deposition method; optionally, the growth temperature of the intrinsic amorphous silicon layer and the doped amorphous silicon layer is 100 ℃ to 300 ℃;
the third limiting transparent conducting film is manufactured by a magnetron sputtering method, a reactive plasma deposition method or an electron beam evaporation method; optionally, the growth temperature of the transparent conductive film is 25 ℃ to 300 ℃;
the fourth limiting electrode, the first electrode and the second electrode are respectively manufactured by screen printing and curing; optionally, the material of the electrode is low-temperature silver paste;
a fifth limiting dielectric film is manufactured by a plasma enhanced chemical vapor deposition method or an atomic layer deposition method; optionally, the growth temperature of the dielectric film is 25 ℃ to 300 ℃.
In a second aspect, an embodiment of the present application provides a method for manufacturing a crystalline silicon solar cell module, where the method includes:
implementing the manufacturing method of the crystalline silicon solar cell to obtain the sliced and coated segmented cell;
testing and sorting the crystalline silicon solar cells, selecting the crystalline silicon solar cells with the same efficiency, and directly performing series welding, typesetting, laminating, gluing, framing and power testing.
In a third aspect, embodiments of the present application provide a crystalline silicon solar cell, which includes a segmented cell and a dielectric film. The split battery is formed by slicing the battery, and the surface of the split battery is provided with a transparent conductive film for conducting electricity. The dielectric film is formed on the transparent conductive film on the surface of the segmented cell and is used as an antireflection layer for light trapping.
According to some examples of the present application, the battery is a heterojunction battery.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the prior art of the present application, the drawings used in the description of the embodiments or the prior art will be briefly described below.
Fig. 1 is a schematic structural view of a conventional sliced battery;
fig. 2 shows a schematic structural diagram of a crystalline silicon solar cell provided by an example of the present application;
fig. 3 shows a process flow diagram for manufacturing a crystalline silicon solar cell module in an example of the present application.
Detailed Description
Embodiments of the present application will be described in detail below with reference to examples, but those skilled in the art will appreciate that the following examples are only illustrative of the present application and should not be construed as limiting the scope of the present application. The examples, in which specific conditions are not specified, were conducted under conventional conditions or conditions recommended by the manufacturer. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products available commercially.
In order to investigate the problems of the sliced cell and its components, the inventors made an existing heterojunction cell and a component based thereon.
The conventional method for manufacturing a heterojunction battery is briefly described as follows:
cleaning and texturing by using an N-type silicon wafer (represented by N-Si);
intrinsic amorphous silicon thin films (represented by alpha-Si (i)) are respectively deposited on two sides (front side and back side) of the silicon wafer, and then a doped p-type amorphous silicon thin film (represented by alpha-Si (p)) and a doped n-type amorphous silicon thin film (represented by alpha-Si (n)) are respectively deposited on the surfaces of the two intrinsic amorphous silicon thin films;
then depositing transparent conductive films (e.g., ITO) on both sides;
then screen printing low temperature silver paste (as represented by metal electrode), drying and curing, and finally testing and sorting.
The structure of the heterojunction cell is shown in fig. 1.
A battery module based on the heterojunction battery of fig. 1 can be fabricated by the following method.
The preparation method of the heterojunction battery assembly comprises the following steps:
after testing and sorting the heterojunction battery shown in the figure 1, carrying out laser slicing, series welding, typesetting, laminating, gluing, framing and power testing on the sorted battery.
As a result of research, the inventors found that the above-described heterojunction cell and its components have some drawbacks as described below.
(1) The transparent conductive film (ITO) has large dosage. Due to the use of rare metal elements (In, indium) In ITO, the price of the target material for making ITO is increased, which In turn increases the cost of the heterojunction cell.
(2) The transparent conductive film (such as ITO) plays a role in both carrier transport and light trapping as an anti-reflection film layer. However, due to the nature of ITO, its electrical conductivity and optical properties are traded off. In other words, it is difficult to achieve both the improvement of the conductivity of ITO and the decrease of the conductivity due to the increase of the optical transmittance at the expense of the optical transmittance.
(3) And laser dicing the heterojunction battery into a diced battery, and then manufacturing the assembly. However, laser dicing can cause damage to the heterojunction cell. For example, the efficiency of sliced cells obtained after slicing may vary. Therefore, if the assembly is made directly from the sliced cells, the efficiency mismatch between the cells is serious, and the power of the assembly is reduced. If after slicing, test sorting is performed and then the assembly is fabricated. This can avoid a mismatch in cell efficiency after dicing, but such test sorting can result in increased production costs.
Based on the above-mentioned insights, the inventors propose a new solution to solve the efficiency impairment existing after the dicing operation or caused by dicing, the problem of efficiency mismatch between the diced cells in the assembly, and the problem of power drop of the assembly due to efficiency mismatch.
This solution, in general, relates to the modification of the structure of the cell and of the assembly and accordingly proposes a method for the production of these new structures, so that the person skilled in the art will be more apt to carry out the solution of the present application.
Among them, mainly, one of the improvements of the structure of the crystalline silicon solar cell is an antireflection layer. As described above, transparent conductive films generally employ transparent conductive oxide films (e.g., ITO, indium selenide oxide). In the scheme of the application, a dielectric film is selected to be manufactured on a transparent conductive film, and the dielectric film is selected to be manufactured after slicing. Therefore, in such a case, the crystalline silicon solar cell and the crystalline silicon solar cell module have a stacked antireflection structure, for example, a stacked antireflection structure of ITO and SiN together.
The scheme of the application adopts that after slicing, a laminated antireflection structure is manufactured to be different from the existing single ITO antireflection layer, and therefore the following advantages can be obtained.
1. The laminated antireflection structure can reduce the reflectivity of the crystalline silicon solar cell (correspondingly increase incident light), so that the crystalline silicon solar cell with improved current density is obtained, and the efficiency of the crystalline silicon solar cell is improved.
2. The design of the laminated antireflection structure can reduce the use of ITO. For example, for a pure ITO reflective layer and a stacked antireflection structure of the same thickness, it is clear that the amount of ITO used in the stacked antireflection structure is less. And the cost of SiN is lower than that of ITO, so that the cost of the crystalline silicon solar cell and the crystalline silicon solar cell module can be reduced.
3. In a stacked antireflection structure, ITO can be biased toward conductive properties, while optical light trapping (antireflection or antireflection) can be achieved with SiN. Therefore, ITO and SiN can be adjusted in terms of their respective primary functions, such as microstructure or physical properties, to further optimize their efficacy, thereby achieving both electrical conductivity and optical properties. For example, the refractive index, thickness, etc. of SiN are changed, so that a colored crystalline silicon solar cell and module can be prepared, and a product except single blue and blue black can be obtained, and further, the colored crystalline silicon solar cell and module can be used for Building Integrated Photovoltaic (BIPV) applications such as roof photovoltaics, and the efficiency of the cell is not influenced.
4. After dicing, dielectric films (e.g., SiN) are formed, and passivation of SiN, particularly SiN with a wrap around deposit at the edges, repairs damage from the dicing operation.
To the best of the inventors' knowledge, the general fabrication method of the prior art heterojunction cell assembly is as follows: cleaning and texturing an N-type silicon wafer, respectively depositing an intrinsic amorphous silicon film and doped p-type and N-type amorphous silicon films on two sides of the silicon wafer, then depositing a transparent conductive film ITO on the two sides, screen-printing low-temperature silver paste, drying and curing, and finally testing and sorting. And carrying out laser slicing, series welding, typesetting, laminating, gluing, framing and power testing on the tested and sorted batteries.
The manufacturing method of the crystalline silicon solar cell module comprises the following steps: the method comprises the following steps of cleaning and texturing an N-type silicon wafer, depositing an intrinsic amorphous silicon film and doped p-type and N-type amorphous silicon films on two sides of the N-type silicon wafer respectively, depositing a transparent conductive film ITO on the two sides, then screen-printing low-temperature silver paste, drying and curing, laser slicing, depositing an SiN film, and finally testing and sorting. And (4) performing series welding, typesetting, laminating, gluing, framing and power testing on the batteries subjected to test and sorting.
In other words, in the conventional scheme, a whole battery is manufactured, tested and sorted, then the battery is cut into pieces to form a battery assembly, and then the battery assembly is manufactured. According to the scheme, slicing operation is introduced in the manufacturing process of the battery, slicing is carried out before the battery is manufactured, then the laminated anti-reflection structure is manufactured to complete battery preparation, then testing and sorting are carried out, and then the segmented battery component is manufactured.
When the battery after the slicing operation has conditions such as loss of efficiency, fluctuation, and the like, the yield of the battery assembly obtained by the above-described conventional method may be relatively low. According to the scheme, the damage to the slices is repaired by firstly slicing and then manufacturing the laminated anti-reflection structure, and then screening is performed, so that the yield of manufactured assemblies is improved.
The following detailed description is made for a crystalline silicon solar cell, a crystalline silicon solar cell module, and a method for manufacturing the crystalline silicon solar cell module according to embodiments of the present application:
the method for manufacturing the sliced battery provided in the present application includes the following steps.
Step S101, providing a battery, wherein the battery is provided with a transparent conductive film on the surface.
The cell can be various types of cells, such as a heterojunction cell, and those skilled in the art can select different types of cells according to needs, but the surface of the cell is limited to have a transparent conductive film.
ThereinThe transparent conductive film can be made of various materials. In some examples, the transparent conductive film can be fabricated as a corresponding thin film using a conductive oxide. Such as ITO film, IWO film, AZO film, FTO film, In2O3ZnO film or SnO2Films, and the like.
And step S102, slicing the battery to form a sliced battery.
Typically, dicing of the cells is accomplished by laser dicing. Slicing may be cutting the battery in half, or may be cutting the battery in three, four, or even more pieces. The specific number of slices can be controlled according to the size before slicing and the required size after slicing, which is not specifically limited in the present application.
In the present example, the cell is selected as a heterojunction cell (in other examples, a PERC cell, or other types of cells are also possible), which has the following structure.
And respectively manufacturing an intrinsic amorphous silicon layer, a doped amorphous silicon layer, a transparent conductive film and an electrode on the front surface and the back surface of the substrate.
The substrate can be N-type silicon or P-type silicon. Also, intrinsic amorphous silicon, doped amorphous silicon, etc. thereof may be appropriately adjusted (e.g., thickness, conductivity type, etc.) for different types of silicon substrates.
In the present exemplary embodiment, an N-type silicon substrate is used. The thickness of the intrinsic amorphous silicon layer is 1 nm to 10 nm, the thickness of the doped amorphous silicon layer is 1 nm to 30 nm, and the thickness of the transparent conductive film is 10 nm to 100 nm.
Wherein, the surface (which can be the front surface, the back surface or both) of the substrate has a light trapping structure. The light trapping structure can reduce the reflection of light rays, thereby improving the utilization rate of incident light. Generally, the light trapping structure can be obtained by means of texturing. Illustratively, texturing is performed by treating a silicon substrate with an alkaline chemical solution.
Wherein the intrinsic amorphous silicon layer and the doped amorphous silicon layer can be manufactured by a plasma enhanced chemical vapor deposition method under the growth temperature condition of 100 ℃ to 300 ℃. The transparent conductive film can be manufactured by adopting a magnetron sputtering method, a reactive plasma deposition method or an electron beam evaporation method under the growth temperature condition of 25-300 ℃.
The electrode can be manufactured by screen printing low-temperature silver paste and curing.
Step S103, manufacturing a dielectric film on the transparent conductive film on the surface of the segmented cell.
In this way, the sliced battery can be directly obtained after the dielectric film and the electrode are manufactured, and the subsequent operations such as heat treatment (such as annealing) and the like do not need to be carried out on the sliced battery.
The dielectric film may be fabricated by a plasma enhanced chemical vapor deposition method or an atomic layer deposition method at a growth temperature of 25 ℃ to 300 ℃. The dielectric film may be made of various suitable materials. In some examples of the present application, a silicon nitride (SiN) film is used as the dielectric film. In other examples of the present application, the dielectric film may be made of a material selected from the group consisting of SiOx、AlO2、MgF2And TiO2Is selected.
The specific process parameters vary depending on the specific material, thickness, etc. of the dielectric film. Structurally, in the present example, the thickness of the electrode is much greater than the thickness of the dielectric film (e.g., while the thickness of the dielectric film is 1 nm to 70 nm), thereby enabling the electrode to protrude beyond the dielectric film layer.
In the present application example, a crystalline silicon solar cell structure is shown in fig. 2, and a process flow in a part of examples of a crystalline silicon solar cell module manufactured based on the crystalline silicon solar cell structure is shown in fig. 3.
In the present application, the sliced battery is obtained by slicing first and then performing the subsequent operations (manufacturing a dielectric thin film). The fabrication steps of the dielectric film performed after dicing can repair damage caused by the dicing operation.
On the basis of the crystalline silicon solar cell manufactured in the above-mentioned example scheme of the present application, a crystalline silicon solar cell group can be obtained by connecting (electrically connecting in series or in parallel or electrically connecting in series and in parallel) a plurality of crystalline silicon solar cells.
In some examples, the sliced cells are tested before they are assembled to form a sliced cell assembly. And then, sorting the tested sliced batteries, and electrically connecting the sliced batteries meeting the requirements in series or in parallel. The "requirement" may be an electrical property of the sliced cell, such as the same efficiency. And after the sliced batteries are welded in series, typesetting, laminating, gluing and framing are sequentially carried out.
A crystalline silicon solar cell, a crystalline silicon solar cell module, and a method for fabricating the crystalline silicon solar cell module are further described in detail with reference to the following embodiments.
Example 1
Referring to fig. 2, the crystalline silicon solar cell has the following structure: a front surface electrode [ shown by a metal electrode ], a front surface silicon nitride layer [ shown by SiN ], a front surface transparent conductive oxide thin film layer [ shown by ITO ], N-type amorphous silicon [ shown by α -Si (N) ], front surface intrinsic amorphous silicon [ shown by α -Si (i) ], a substrate layer [ shown by N-Si ], back surface intrinsic amorphous silicon [ shown by α -Si (i) ], P-type amorphous silicon [ shown by α -Si (P) ], a back surface transparent conductive oxide thin film [ shown by ITO ], a back surface silicon nitride layer [ shown by SiN ], and a back surface electrode [ shown by a metal electrode ]. Wherein the front electrode passes through the silicon nitride layer to be in contact with the transparent conductive oxide film; the back electrode is in contact with the back transparent conductive oxide film through the back silicon nitride layer.
The manufacturing method of the crystalline silicon solar cell mainly comprises the following steps:
s11, texturing: performing texturing treatment on a substrate silicon wafer: and (3) making the wool by using an alkaline chemical solution.
S12, growing a first intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer on one side of the textured substrate, and then growing a second intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer on the other side of the substrate.
S13, depositing a first ITO film layer and a second ITO film layer on two sides of the N-type amorphous silicon layer and the P-type doped amorphous silicon layer respectively.
And S14, drying and curing by screen printing of low-temperature silver paste to form the metal grid line.
And S15, cutting the battery into two halves by adopting laser.
S16, depositing SiN films (obtaining a front silicon nitride layer and a back silicon nitride layer), and forming the stacked antireflection structure of the ITO/SiN.
Comparative example 1
The sliced battery of this comparative example has a structure as shown in fig. 2, i.e., the structure is the same as that of the battery of example 1 except for the difference in the manufacturing method (the step of slicing). Specifically, the manufacturing method is as follows.
The manufacturing method mainly comprises the following steps:
s21, texturing: and performing texturing treatment on the substrate silicon wafer. And (3) making the wool by using an alkaline chemical solution.
And S22, growing a first intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer on one side of the textured substrate. And then growing a second intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer on the other side of the substrate.
S23, depositing a first ITO film layer and a second ITO film layer on two sides of the N-type amorphous silicon layer and the P-type amorphous silicon layer respectively.
And S24, drying and curing by screen printing of low-temperature silver paste to form the metal grid line.
And S25, depositing a SiN film to form an ITO/SiN laminated antireflection structure.
And S26, cutting the battery into two halves by adopting laser.
Comparative example 2
The cell structure of comparative example 2 is shown in fig. 1. Referring to fig. 1 and 2, the sliced battery of comparative example 2 is different from the battery of example 1 in the structure: the cell in this comparative example 2 did not have the front side silicon nitride layer and the back side silicon nitride layer in example 1. Accordingly, the manufacturing method is different from example 1 only in that S16 is not performed. Specifically, the manufacturing method is as follows.
The manufacturing method mainly comprises the following steps:
s31, texturing: and performing texturing treatment on the substrate silicon wafer. And (3) making the wool by using an alkaline chemical solution.
And S32, growing a first intrinsic amorphous silicon layer and an N-type doped amorphous silicon layer on one side of the textured substrate. And then growing a second intrinsic amorphous silicon layer and a P-type doped amorphous silicon layer on the other side of the substrate.
S33, depositing a first ITO film layer and a second ITO film layer on two sides of the N-type amorphous silicon layer and the P-type amorphous silicon layer respectively.
And S34, drying and curing by screen printing of low-temperature silver paste to form the metal grid line.
And S35, cutting the battery into two halves by adopting laser.
Test example 1
The cells of example 1 and comparative examples 1 and 2 were tested under the same conditions, respectively, and the test results are shown in table 1.
TABLE 1
Wherein Isc represents a short-circuit current; voc represents an open circuit voltage; FF represents a fill factor; eff represents conversion efficiency.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (9)
1. A method for manufacturing a crystalline silicon solar cell is characterized by comprising the following steps:
providing a battery, wherein the battery is provided with a transparent conductive film positioned on the surface;
slicing the battery to form a sliced battery;
and manufacturing a dielectric film on the transparent conductive film on the surface of the segmented cell.
2. The method for manufacturing a crystalline silicon solar cell according to claim 1, wherein the cell is formed into two or more sliced cells by a slicing operation;
optionally, the dicing operation is achieved by laser dicing.
3. The method for manufacturing a crystalline silicon solar cell according to claim 1 or 2, wherein the cell is formed into two divided cells through a half-cutting operation, the transparent conductive film is ITO, and the dielectric film is SiN.
4. The method of claim 3, wherein the cell comprises a heterojunction cell.
5. The method for manufacturing the crystalline silicon solar cell according to claim 4, wherein the heterojunction cell comprises:
respectively manufacturing a first intrinsic amorphous silicon layer, a first doped amorphous silicon layer, a first transparent conductive film and a first electrode on the front surface of the substrate;
respectively manufacturing a second intrinsic amorphous silicon layer, a second doped amorphous silicon layer, a second transparent conductive film and a second electrode on the back surface of the substrate;
and dielectric films are manufactured on the first transparent conductive film and the second transparent conductive film.
6. The method for manufacturing a crystalline silicon solar cell according to claim 5, wherein the heterojunction cell comprises one or more of the following limitations:
the first limiting, the front side and the back side of the substrate are respectively manufactured to form a light trapping structure;
the second limiting, the intrinsic amorphous silicon layer and the doped amorphous silicon layer are manufactured by a plasma enhanced chemical vapor deposition method; optionally, the growth temperature of the intrinsic amorphous silicon layer and the doped amorphous silicon layer is 100 ℃ to 300 ℃;
thirdly, the transparent conductive film is manufactured by adopting a magnetron sputtering method, a reactive plasma deposition method or an electron beam evaporation method; optionally, the growth temperature of the transparent conductive film is 25 ℃ to 300 ℃;
the fourth limiting electrode, the first electrode and the second electrode are respectively manufactured by screen printing and curing; optionally, the material of the electrode is low-temperature silver paste;
a fifth definition, the dielectric film is fabricated by plasma enhanced chemical vapor deposition or atomic layer deposition; optionally, the growth temperature of the dielectric film is 25 ℃ to 300 ℃.
7. A manufacturing method of a crystalline silicon solar cell module is characterized by comprising the following steps:
implementing the method for manufacturing a crystalline silicon solar cell according to any one of claims 1 to 6 to obtain a sliced and coated segmented cell;
and testing and sorting the sliced and coated film split cells, selecting the crystalline silicon solar cells with the same efficiency, and directly performing series welding, typesetting, laminating, gluing, framing and power testing.
8. A crystalline silicon solar cell, comprising:
the battery slicing device comprises a sliced battery formed by slicing the battery, wherein the surface of the sliced battery is provided with a transparent conductive film for conducting electricity;
and the dielectric film is formed on the transparent conductive film on the surface of the segmented cell and is used as an antireflection layer for trapping light.
9. The crystalline silicon solar cell as claimed in claim 8, wherein the cell is a heterojunction cell.
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CN113140640A (en) * | 2021-04-16 | 2021-07-20 | 中国科学院上海微系统与信息技术研究所 | Efficient back reflection crystalline silicon heterojunction solar cell and preparation method thereof |
CN113451446A (en) * | 2021-04-16 | 2021-09-28 | 安徽华晟新能源科技有限公司 | Sliced silicon heterojunction solar cell, preparation method and solar cell module |
CN114122161A (en) * | 2021-11-12 | 2022-03-01 | 东方日升新能源股份有限公司 | Laminated film battery and method for manufacturing same |
WO2022095511A1 (en) * | 2020-11-04 | 2022-05-12 | 东方日升(常州)新能源有限公司 | Crystalline silicon solar cell, assembly, and manufacturing method for crystalline silicon solar cell |
CN116174942A (en) * | 2023-04-26 | 2023-05-30 | 华能新能源股份有限公司 | HJT solar cell slice and preparation method thereof |
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CN112331741A (en) * | 2020-11-04 | 2021-02-05 | 东方日升(常州)新能源有限公司 | Crystalline silicon solar cell, crystalline silicon solar cell module and manufacturing method of crystalline silicon solar cell module |
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CN116174942A (en) * | 2023-04-26 | 2023-05-30 | 华能新能源股份有限公司 | HJT solar cell slice and preparation method thereof |
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