CN112305294B - Two-section type resistor network and digital-to-analog converter based on two-section type resistor network - Google Patents
Two-section type resistor network and digital-to-analog converter based on two-section type resistor network Download PDFInfo
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Abstract
Two-section type resistor network and digital-to-analog converter based on two-section type resistor network, two-section type resistor network includes 2 cascade connection M The first connecting end of the first resistor in the first resistor module is connected with the first connecting end of the first resistor module, the second connecting end of the first resistor module is connected with the second connecting end of the first resistor module after passing through the first switch, and the two ends of the first switch are respectively connected with reference voltage through the second switch and grounded through the third switch; 2 nd M The first resistor of the first resistor module comprises 2 L A second resistor connected in series and respectively connected with 2 L 2 between the second connection terminal and the output terminal of the second resistor L And a fourth switch. The digital-to-analog converter divides the N-bit digital signal into an upper M bit and a lower L bit, and the N=M+L, and the upper M bit digital signal is decoded and then is controlled to be 2 M The switch in the first resistance module is used for controlling 2 after decoding the low L bit digital signal L And a fourth switch. The invention inherits its monotonic nature but greatly reduces the number of switches compared to a simple resistor string DAC.
Description
Technical Field
The invention belongs to the technical field of integrated circuits and analog circuits, and relates to a two-section type resistor network and a high-precision digital-to-analog converter formed based on the two-section type resistor network.
Background
The resistor network is an important component of a digital-to-analog converter (DAC), and has great influence on various aspects of power consumption, area, precision and the like of the DAC, and the existing high-precision DAC has various architectures, such as: resistor string architectures and R2R architectures, both of which are analog circuits employing digital control logic.
A DAC consisting of a resistor network of simple resistor string architecture, as shown in fig. 1, has very good monotonic characteristics, but is not suitable for high resolution DAC applications. As can be seen from fig. 1, for aN-bit resistor string DAC with 2 N The series connection of the resistors requires 2 1 +2 2 +……+2 N ＝2 N+1 2 switches, in minimum case 2 of the leftmost column is also required N The number of the switches is exponentially related to the resolution. If a 10 bit DAC is to be implemented, at least 1024 switches are required, which places high demands on area and layout effort.
As shown in FIG. 2, each bit resolution of R2R resistor ladder DAC is realized by a set of 1R resistor, 2R resistor and switch, wherein the switch control signals 0 and 1 are used for controlling the corresponding switch to be opened and closed, and the switch control signal D 0 And D 0Z 、D 1 And D 1Z 、……、D N-1 And D (N-1)Z N pairs of mutually opposite signals generated by N-bit input digital codes control corresponding switches to switch between a reference voltage and ground. The R2R ladder resistor network DAC can greatly simplify the area and layout work in a binary weighting mode, but has poor monotonicity, and non-monotonic points are easy to appear at Full Range/2 (namely, half Full Range). Monotonicity of a DAC means that the input signal of the digital-to-analog converter is within its full range and the analog output signal is not reduced between one conversion step and the next.
It can be seen that the digital-to-analog converter formed by the two resistor networks cannot balance the requirements of area and precision.
Disclosure of Invention
Aiming at the defect that the digital-to-analog converters of the traditional resistor string architecture and the R2R architecture cannot realize high precision and small area at the same time, the invention provides a two-section resistor network, which greatly reduces the number of switches and the area and layout workload compared with the resistor network of the resistor string architecture; the digital-to-analog converter designed based on the two-stage resistor network greatly inherits the monotone characteristic of a simple resistor string DAC and has the characteristic of high precision.
The technical scheme of the two-section resistor network provided by the invention is as follows:
a two-stage resistor network, which comprises 2 cascaded M The first resistor modules M are positive integers, the first connecting end of the ith first resistor module is connected with the second connecting end of the (i+1) th first resistor module, i is a positive integer and i epsilon [1,2 ] M -1]The method comprises the steps of carrying out a first treatment on the surface of the 2 nd M The first connecting end of each first resistor module is connected with the second connecting end of the 1 st first resistor module;
the first resistor module comprises a first resistor, a first switch, a second switch and a third switch, wherein a first connecting end of the first resistor is connected with a first connecting end of the first resistor module, a second connecting end of the first resistor module is connected with a second connecting end of the first resistor module after passing through the first switch, the second switch is connected between the first connecting end of the first switch and a reference voltage, and the third switch is connected between the second connecting end of the first switch and a ground level;
wherein 2 nd M The first resistor of the first resistor module is composed of a low-order resistor unit comprising 2 L Second resistors and 2 L The second connecting end of the j-th second resistor is connected with the first connecting end of the j+1th second resistor and then connected with the output end of the two-section resistor network through the j-th fourth switch, wherein j is a positive integer and j is E [1,2 ] L -1]The method comprises the steps of carrying out a first treatment on the surface of the The first connecting end of the 1 st second resistor is connected with the first connecting end of the low-level resistor unit, and the 2 nd L The second connection ends of the second resistors are connected with the second connection ends of the low-level resistor units and pass through the 2 nd L And the fourth switch is connected with the output end of the two-stage resistor network.
The technical scheme of the digital-to-analog converter designed based on the two-section resistance network provided by the invention is as follows:
a digital-to-analog converter based on a two-stage resistor network can convert N-bit digital signals into corresponding analog signals, wherein N is a positive integer greater than 1; dividing the N-bit digital signal into two parts, namely an upper M bit and a lower L bit, wherein M and L are positive integers and m+l=n;
the digital-to-analog converter comprises a first decoder, a second decoder and a two-section resistor network,
the two-stage resistor network comprises 2 cascaded M The first connecting end of the ith first resistor module is connected with the second connecting end of the (i+1) th first resistor module, i is a positive integer and i is E [1,2 ] M -1]The method comprises the steps of carrying out a first treatment on the surface of the 2 nd M The first connecting end of each first resistor module is connected with the second connecting end of the 1 st first resistor module;
the first resistor module comprises a first resistor, a first switch, a second switch and a third switch, wherein a first connecting end of the first resistor is connected with a first connecting end of the first resistor module, a second connecting end of the first resistor module is connected with a second connecting end of the first resistor module after passing through the first switch, the second switch is connected between the first connecting end of the first switch and a reference voltage, and the third switch is connected between the second connecting end of the first switch and a ground level;
wherein 2 nd M The first resistor of the first resistor module is composed of a low-order resistor unit comprising 2 L Second resistors and 2 L A second connection end of the j-th second resistor is connected with the first connection end of the j+1th second resistor and then is connected with the output end of the digital-to-analog converter through the j-th fourth switch, wherein j is a positive integer and j is E [1,2 ] L -1]The method comprises the steps of carrying out a first treatment on the surface of the The first connecting end of the 1 st second resistor is connected with the first connecting end of the low-level resistor unit, and the 2 nd L The second connection ends of the second resistors are connected with the second connection ends of the low-level resistor units and pass through the 2 nd L The rear end of the fourth switch is connected with the output end of the digital-to-analog converter;
the first decoder is used for decoding according to the high M bit digital signal to obtain 2 M The high-order control signals are respectively used for controlling the 2 M A first resistor module for decoding the obtained 2 M Only one of the high-level control signals is in a first state, the rest of the high-level control signals are in a second state, the high-level control signals in the first state control the corresponding first switch, second switch and third switch in the first resistor module to be opened, and the high-level control signals in the second state control the corresponding switch to be closedA first switch in the first resistor module is closed, and a second switch and a third switch in the first resistor module are opened;
the second decoder is used for decoding according to the low L bit digital signal to obtain 2 L The low-level control signals are respectively used for controlling the 2 L A fourth switch for decoding the obtained 2 L Only one low-level control signal in the low-level control signals is in a first state, the rest low-level control signals are in a second state, the low-level control signals in the first state control the corresponding fourth switches to be closed, and the low-level control signals in the second state control the corresponding fourth switches to be opened.
Specifically, when N is even, taking
Specifically, the first state is a high level, and the second state is a low level.
The beneficial effects of the invention are as follows: the invention provides a two-section type resistor network, which forms a high-precision and low-area digital-to-analog converter based on the two-section type resistor network, not only has the monotone characteristic of a simple resistor string DAC, but also changes the number of switches from 2 of the simple resistor string DAC N Reduced to 3 x 2 M +2 L And the number of switches is greatly reduced, and the area and the layout workload are greatly reduced.
Drawings
The following drawings, which schematically illustrate the principal features of some embodiments of the invention, assist in better understanding the following description of various embodiments of the invention. The figures and embodiments provide some embodiments of the invention in a non-limiting, non-exhaustive manner. For simplicity, the same or similar components or structures having the same function in different drawings are given the same reference numerals.
Fig. 1 is a schematic diagram of a simple resistor string DAC.
Fig. 2 is a schematic structural diagram of an R2R ladder network DAC.
Fig. 3 is a schematic diagram of a specific framework of a digital-to-analog converter based on a two-stage resistor network according to the present invention.
Fig. 4 is a schematic diagram of connection of each switch in a resistor network when a digital-to-analog converter based on a two-segment resistor network according to the present invention is used to realize that a 4bit input is din=4' b 1110.
Fig. 5 is a schematic diagram of connection of each switch in a resistor network when a digital-to-analog converter based on a two-segment resistor network according to the present invention is used to realize that a 4bit input is din=4' b 0100.
Fig. 6 is a decoding implementation of the first decoder and the second decoder in the embodiment.
Detailed Description
The technical scheme of the invention is described in detail below with reference to the attached drawings and specific embodiments.
The specific circuit configuration and specific parameters of these circuit elements in the embodiments described below are used to provide a better understanding of the embodiments of the present invention, such as the resistor, the resistor unit, the first connection terminal and the second connection terminal of the resistor module are merely two connection terminals of the resistor device, the first and second are used for distinguishing, not for limiting, the first state and the second state of the control signal are also used for distinguishing between high and low levels, and the switch may be a transistor with a switching function or other switching structure. It will be understood by those skilled in the art that embodiments of the invention may be practiced without some of these specific details or with other methods, components, materials, etc.
Compared with a simple resistor string structure, the invention divides the resistor network into two sections, thereby greatly reducing the number of switches. As shown in fig. 3, the two-stage resistor network provided by the invention comprises 2 cascaded M First resistor blocks (RMSB, 0-RMSB, 2) M -1) M is a positive integer, each first resistor module comprising a first resistor, wherein 2 nd M The first resistance low-order resistance units of the first resistance modules are formed, so that the resistance network is divided into two sections. As shown in fig. 3, the low-order resistance unit includes 2 L Second resistors (RLSB, 0-RLSB,2 L -1)And 2 L The second connecting end of the j-th second resistor in the low-level resistor unit is connected with the first connecting end of the j+1th second resistor and then connected with the output end VOUT of the two-stage resistor network through the j-th fourth switch, wherein j is a positive integer and j is E [1,2 ] L -1]The method comprises the steps of carrying out a first treatment on the surface of the The first connection end of the 1 st second resistor is connected with the first connection end of the low-level resistor unit, the 2 nd L The second connection end of the second resistor is connected with the second connection end of the low-level resistor unit and passes through the 2 nd L The fourth switch is connected with the output end VOUT of the two-stage resistor network. The first connection end and the second connection end of the low-level resistance unit are respectively connected to the 2 nd M In the first resistor module, the two connection ends are interchangeable.
2 M In the first resistor modules, a first connecting end of an ith first resistor module is connected with a second connecting end of an (i+1) th first resistor module, i is a positive integer and i is E [1,2 ] M -1]The method comprises the steps of carrying out a first treatment on the surface of the 2 nd M The first connecting end of each first resistor module is connected with the second connecting end of the 1 st first resistor module. The first resistor module comprises a first resistor, a first switch, a second switch and a third switch, wherein a first connecting end of the first resistor is connected with a first connecting end of the first resistor module, a second connecting end of the first resistor module is connected with a second connecting end of the first resistor module after passing through the first switch, the second switch is connected between the first connecting end of the first switch and a reference voltage, and the third switch is connected between the second connecting end of the first switch and a ground level. Similarly, the two connection ends of the first resistor module and the two connection ends of the switch are interchangeable, for example, as shown in fig. 3, the upper end of the first resistor is used as a first connection end to be connected with the first connection end of the first resistor module, the lower end of the first resistor is connected with the second connection end of the first resistor module after passing through the first switch, the upper end of the first switch is used as the first connection end to be connected with a reference voltage after passing through the second switch, and the lower end of the first switch is used as a second connection end to be grounded after passing through the third switch; however, the invention can also make the lower end of the first resistor as the first connecting end connect with the first/second connecting end of the first resistor module, and the upper end of the first resistor is connected with the second/connecting end of the first resistor module after passing through the first switch, or the second switch and the third switch are exchangedThe position makes the second switch connect between the lower end of the first switch and the reference voltage, and the third switch connects between the upper end of the first switch and the ground, and the two-stage resistance network is realized without affecting the invention.
As can be seen from fig. 3, 2 M The resistance values of the first resistor modules are equal to each other, and the 2 nd M The first resistor of the first resistor module is composed of 2 L A second resistor connected in series, i.e. 2 L The resistance values of the second resistors are equal and are And 2 M The resistance values of the first resistor modules are equal and +.>
N-bit simple resistor string switch number is at least 2 N The invention divides N into two sections, namely M and L, and only 3X 2 is needed to realize the N-bit two-section resistance network M +2 L And a switch. For example, for a 12-bit simple resistor-string DAC, the number of switches is at least 2 12 For the two-stage resistor network proposed by the present invention, if m=l=6, the number of switches is reduced to 3×2 6 +2 6 =256.
When the two-section resistance network provided by the invention is used for realizing the digital-to-analog converter of Nbit, the N-bit digital signal is divided into two parts of high M bit and low L bit, and the first decoder is M-bit to 2 bit M Bit decoder, the second decoder is L-bit to 2 L A bit decoder. High M-bit digital signal DM 0 -DM M-1 Decoding by a first decoder to obtain 2 M High-order control signalControl 2 M A first resistor module for providing a low L-bit digital signal DL 0 -DL L-1 Decoding by a second decoder to obtain 2 L A low control signal->Controlling 2 in low-order resistance unit L And a fourth switch.
Taking the example of decoding the high M-bit digital signal represented by binary system by the first decoder 0 -DM M-1 Totally 2 M In the case of cases, these 2 M The seed cases are respectively 2 M High-order control signalIndicated as 2 M The decoding results respectively correspond to 2 M A high control signal->Only one corresponding high-order control signal is in a first state, and the rest high-order control signals are in a second state. Such that the high M bit number signal is 2 M Seed case individual control 2 M Only one first switch corresponding to the first resistor module is opened, the second switch and the third switch are closed, and the reference level and the ground level are connected; the first switch, the second switch and the third switch in the rest of the first resistor modules are closed, and are connected with other first resistor modules.
Due toThe analog signal output by the digital-to-analog converter based on the two-stage resistance network provided by the invention is as follows:
wherein VREF is a reference voltage value, let N=M+L, DM 0 ＝DL L ,DM 1 ＝DL L+1 ,…,DM M-1 ＝DL N-1 Then
As can be seen from the above equation, the analog signal Vout output by the digital-to-analog converter achieves digital-to-analog conversion of n=m+l bits.
The following description will take the implementation of the 4bit digital-to-analog converter as an exampleAs shown in fig. 4 and 5, comprises a cascade of 2 M The first resistor of the 4 th resistor module is composed of low-order resistor units including 2 L =4 second resistors and=4 fourth switches. L-2 incorporating a second decoder as shown in FIG. 6 L The decoding implementation truth table of the first decoder in this embodiment also uses the principle of fig. 6 to make the first state be high level 1 and the second state be low level 0.
As shown in fig. 4, when din=4' b1110 is input, the high 2-bit digital signal is 11, the corresponding control signal is 1000, and the high control signal S 3 Is at high level, S 0 、S 1 、S 2 And for the low level, the first switch in the 4 th resistor module is controlled to be opened, the second switch and the third switch are controlled to be closed, the reference level and the ground level are connected, and the first switch in the 1 st to 3 rd resistor modules is controlled to be closed, the second switch and the third switch are controlled to be opened, and the first switch is connected with other resistor modules. The low 2-bit digital signal is 10, and the corresponding control signal is 0100, i.e. the low control signal SL 2 The 3 rd fourth switch is connected to the output terminal VOUT of the D/A converter for high control, and the low control signal SL 0 、SL 1 、SL 3 The 1 st fourth switch, the 2 nd fourth switch and the 4 th fourth switch are controlled to be turned off for low.
As shown in fig. 5, when din=4' b0100 is inputted, the higher 2-bit digital signal01, the corresponding control signal is 0010, the high control signal S 1 Is at high level, S 0 、S 2 、S 3 And for low level, controlling the first switch, the second switch and the third switch in the 2 nd resistor module to be opened, connecting the reference level and the ground level, and connecting the 1 st first resistor module, the 3 rd first resistor module and the 4 th first resistor module, wherein the first switch, the second switch and the third switch are opened and connected with other first resistor modules. The low 2-bit digital signal is 00, and the corresponding low control signal is 0001, namely the low control signal SL 0 The 1 st fourth switch is connected to the output end VOUT of the D/A converter for high control, and the low control signal SL 1 、SL 2 、SL 3 The fourth switches 2-4 are controlled to be turned off for low.
In summary, the invention innovatively adopts the two-stage resistor network, and divides the DAC with N=M+L bits into the DAC formed by the two-stage resistor network with M bit high bits and L bit low bits, wherein M epsilon [1, N-1], L epsilon [1, N-1] and M+L=N, and M=L=N/2 is preferable when the factors such as design area, resistance value, speed and the like are not considered. The invention realizes a two-segment resistance network DAC with accuracy similar to that of a simple resistance DAC, but with far reduced complexity, which greatly inherits the monotone characteristic of the DAC of the simple resistance string on one hand, and greatly reduces the number of switches and the area and layout workload on the other hand.
The invention has been described by way of example with respect to a two-stage resistor network and a digital-to-analog converter based on a two-stage resistor network, without limiting the scope of the invention, but with respect to the disclosed embodiments, other possible alternative embodiments and equivalent variations on the devices of the embodiments will be apparent to those skilled in the art, and will be within the scope of the invention as defined by the appended claims without departing from the spirit or essential changes or modifications thereof.
Claims (4)
1. A two-stage resistor network is characterized by comprising 2 cascaded stages M A first one of the resistor modules is provided with a first resistor,m is a positive integer, the first connecting end of the ith first resistor module is connected with the second connecting end of the (i+1) th first resistor module, i is a positive integer and i epsilon [1,2 ] M -1]The method comprises the steps of carrying out a first treatment on the surface of the 2 nd M The first connecting end of each first resistor module is connected with the second connecting end of the 1 st first resistor module;
the first resistor module comprises a first resistor, a first switch, a second switch and a third switch, wherein a first connecting end of the first resistor is connected with a first connecting end of the first resistor module, a second connecting end of the first resistor module is connected with a second connecting end of the first resistor module after passing through the first switch, the second switch is connected between the first connecting end of the first switch and a reference voltage, and the third switch is connected between the second connecting end of the first switch and a ground level;
wherein 2 nd M The first resistor of the first resistor module is composed of a low-order resistor unit comprising 2 L Second resistors and 2 L The second connecting end of the j-th second resistor is connected with the first connecting end of the j+1th second resistor and then connected with the output end of the two-section resistor network through the j-th fourth switch, wherein j is a positive integer and j is E [1,2 ] L -1]The method comprises the steps of carrying out a first treatment on the surface of the The first connecting end of the 1 st second resistor is connected with the first connecting end of the low-level resistor unit, and the 2 nd L The second connection ends of the second resistors are connected with the second connection ends of the low-level resistor units and pass through the 2 nd L And the fourth switch is connected with the output end of the two-stage resistor network.
2. A digital-to-analog converter based on a two-stage resistor network can convert N-bit digital signals into corresponding analog signals, wherein N is a positive integer greater than 1; the method is characterized in that the N-bit digital signal is divided into an upper M bit and a lower L bit, M and L are positive integers, and M+L=N;
the digital-to-analog converter comprises a first decoder, a second decoder and a two-section resistor network,
the two-stage resistor network comprises 2 cascaded M A first resistor module, the first connection end of the ith resistor module is connected with the firsti+1 second connection ends of the first resistor modules, i is a positive integer and i is E [1,2 ] M -1]The method comprises the steps of carrying out a first treatment on the surface of the 2 nd M The first connecting end of each first resistor module is connected with the second connecting end of the 1 st first resistor module;
the first resistor module comprises a first resistor, a first switch, a second switch and a third switch, wherein a first connecting end of the first resistor is connected with a first connecting end of the first resistor module, a second connecting end of the first resistor module is connected with a second connecting end of the first resistor module after passing through the first switch, the second switch is connected between the first connecting end of the first switch and a reference voltage, and the third switch is connected between the second connecting end of the first switch and a ground level;
wherein 2 nd M The first resistor of the first resistor module is composed of a low-order resistor unit comprising 2 L Second resistors and 2 L A second connection end of the j-th second resistor is connected with the first connection end of the j+1th second resistor and then is connected with the output end of the digital-to-analog converter through the j-th fourth switch, wherein j is a positive integer and j is E [1,2 ] L -1]The method comprises the steps of carrying out a first treatment on the surface of the The first connecting end of the 1 st second resistor is connected with the first connecting end of the low-level resistor unit, and the 2 nd L The second connection ends of the second resistors are connected with the second connection ends of the low-level resistor units and pass through the 2 nd L The rear end of the fourth switch is connected with the output end of the digital-to-analog converter;
the first decoder is used for decoding according to the high M bit digital signal to obtain 2 M The high-order control signals are respectively used for controlling the 2 M A first resistor module for decoding the obtained 2 M Only one of the high-order control signals is in a first state, the rest of the high-order control signals are in a second state, the high-order control signals in the first state control the first switch, the second switch and the third switch in the corresponding first resistor module to be opened, and the high-order control signals in the second state control the first switch, the second switch and the third switch in the corresponding first resistor module to be opened;
the second decoder is used for decoding the low L bit numberThe signal is decoded to obtain 2 L The low-level control signals are respectively used for controlling the 2 L A fourth switch for decoding the obtained 2 L Only one low-level control signal in the low-level control signals is in a first state, the rest low-level control signals are in a second state, the low-level control signals in the first state control the corresponding fourth switches to be closed, and the low-level control signals in the second state control the corresponding fourth switches to be opened.
3. The two-stage resistor network based digital-to-analog converter of claim 2, wherein when N is even, taking
4. A two-stage resistor network based digital-to-analog converter according to claim 2 or 3, wherein the first state is high and the second state is low.
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