CN101471669A - D/A converter and D/A converting method - Google Patents
D/A converter and D/A converting method Download PDFInfo
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Abstract
The invention discloses a digital-analog converter, which consists of a decoding circuit and a resistor network. An LSB is decoded by the decoding circuit according to the parity of the LSB of an MSB signal; the resistor network comprises an MSB resistor string and an LSB resistor string, wherein, an MSB switch is led out from a node on the end part of each resistor in the MSB resistor string, the other end of the MSB switch is connected with one end of the LSB resistor string, and the adjacent MSB switches are not connected to the same end of the LSB resistor string. Moreover, the invention also discloses a digital-analog conversion method for selecting decoding data according to the parity of input data. When in digital-analog conversion, if a digital-analog conversion signal corresponding to a certain resistor is input into the MSB resistor string, the switches connected with the two ends of the resistor are closed and other switches are cut off. By adopting the converter and the conversion method of the invention, the linearity of the digital-analog converter is improved, the circuit area is drastically reduced and the influence of a leakage current at a high temperature on the performance of the digital-analog converter is effectively compensated and improved.
Description
Technical field
The present invention relates to a kind of circuit element, especially a kind of digital to analog converter.The invention still further relates to a kind of digital-analog convertion method.
Background technology
For obtaining high Linearity and bonding tonality, digital to analog converter (DAC) adopts the resistance equal proportion to divide laminated structure usually, but under the resolution condition with higher, resistance and switch can take huge area, as shown in Figure 1.General solution be with the digital to analog converter segmentation again cascade improve resolution, as shown in Figure 2.Simultaneously, adopt decoder, control the dividing potential drop output of LSB resistance string afterwards, as shown in Figure 3 LSB (least significant bit) signal interpretation.Traditional segmented digital to analog converter is considered coupling, the sub-DAC in front and back generally chooses onesize resistance, for reducing of the influence of LSB (least significant bit) resistance string to MSB (highest significant position) resistance string, usually need carry out current compensation or isolate the sub-DAC in front and back by amplifier the LSB resistance string, this just needs extra circuit also to increase design difficulty.Simultaneously the MSB of segmented DAC and the switch resistance between the LSB also can have a strong impact on linearly, need split and close the mode of switching and be optimized for improving DNL (differential nonlinearity).And DAC needs a large amount of transmission gate switches, how to reduce the area of switch and ghost effect and also be to need in the design problem of considering.Under hot environment, also can have a strong impact on the performance of digital to analog converter to the bigger leakage current of substrate as the transistor of transmission gate switch.
Summary of the invention
Technical problem to be solved by this invention provides a kind of digital to analog converter, and a kind of digital-analog convertion method, can not have to overcome the error that the LSB resistance string is brought the MSB resistance string on the basis of additional circuit, reduce the switch resistance influence, reduce the influence of high-temperature current leakage logarithmic mode converter performance, and reduce circuit area as far as possible.
For solving the problems of the technologies described above, the technical scheme of digital to analog converter of the present invention is to comprise
The LSB decoding circuit, described decoding circuit includes one first decoder, the LSB position is directly connected to the data input pin of described first decoder in the data-signal, lowest order in the MSB position in the data-signal is connected to the control end of described first decoder, described first decoder determines described LSB position signal is carried out LSB＜n-1:0 according to the lowest order in the described MSB position〉output or LSB＜1:n〉output, wherein n is the number of decoder carry-out bit, and each carry-out bit of described first decoder is the LSB switch in the controlling resistance network successively;
The MSB decoding circuit comprises one second decoder, and described MSB position is connected to the input of described second decoder, and the output of described second decoder is the MSB switch in the controlling resistance network successively;
Resistor network comprises MSB resistance string and LSB resistance string, and described MSB resistance string comprises a plurality of divider resistances that are connected in series from the power end to the earth terminal; Described LSB resistance string comprises the divider resistance that n is connected in series, and the resistance of described LSB resistance string is greatly greater than the resistance of each divider resistance in the described MSB resistance string; The node of each divider resistance end is all respectively drawn a MSB switch in the described MSB resistance string, and the other end of described MSB switch is connected to an end of described LSB resistance string, and adjacent MSB switch is free of attachment to the same end of described LSB resistance string; The node of each divider resistance end is all respectively drawn a LSB switch in the described LSB resistance string, and the other end of described LSB switch all is connected to the analog signal output of described digital to analog converter;
Described MSB is the highest significant position of data-signal, can be one or multidigit, and described LSB is the least significant bit of data-signal, is more than two or two, and described MSB and LSB couple together and form whole data-signal.
The technical scheme of digital-analog convertion method of the present invention is, if the MSB position lowest order of input data is " 1 ", first decoder is to binary system LSB position decoding in the input data, carry out LSB＜n-1:0〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; If the MSB lowest order of input data is " 0 ", then, carry out LSB＜1:n to binary system LSB position decoding in the input data〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; When carrying out digital-to-analogue conversion, in the described MSB resistance string adjacent divider resistance at its node place a shared MSB switch, when input and the corresponding dac signal of a certain divider resistance, the MSB switch that these divider resistance two ends are connected is all closed, and other MSB switch all disconnects.
Another technical scheme of digital-analog convertion method of the present invention is, if the MSB position lowest order of input data is " 0 ", first decoder is to binary system LSB position decoding in the input data, carry out LSB＜n-1:0〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; If the MSB lowest order of input data is " 1 ", then, carry out LSB＜1:n to binary system LSB position decoding in the input data〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; When carrying out digital-to-analogue conversion, in the described MSB resistance string adjacent divider resistance at its node place a shared MSB switch, when input and the corresponding dac signal of a certain divider resistance, the MSB switch that these divider resistance two ends are connected is all closed, and other MSB switch all disconnects.
The present invention does not need special compensating circuit, significantly improved the segmented digital to analog converter because two cross-talk DAC's influences each other before and after the cascade system, improved the Linearity of digital to analog converter effectively, simultaneously significantly reduced circuit area, the influence of leakage current logarithmic mode converter performance is also compensated effectively and is improved under the high temperature.
Description of drawings
The present invention is further detailed explanation below in conjunction with drawings and Examples:
Fig. 1 and Fig. 2 are the circuit diagram of existing digital to analog converter resistor network;
Fig. 3 is the schematic diagram of the decoder of existing digital to analog converter;
Fig. 4 is the signal waveforms of existing digital to analog converter;
Fig. 5 is the circuit diagram of digital to analog converter resistor network of the present invention;
Fig. 6 is the schematic diagram of digital to analog converter first decoder of the present invention;
Fig. 7 is the signal waveforms of digital to analog converter of the present invention.
Embodiment
The invention provides a kind of digital to analog converter, comprise
The LSB decoding circuit, described decoding circuit includes one first decoder, as shown in Figure 6, the LSB position is directly connected to the data input pin of described first decoder in the data-signal, lowest order in the MSB position in the data-signal is connected to the control end of described first decoder, described first decoder determines described LSB position signal is carried out LSB＜n-1:0 according to the lowest order in the described MSB position〉output or LSB＜1:n〉output, wherein n is the number of decoder carry-out bit, and each carry-out bit of described first decoder is the LSB switch in the controlling resistance network successively;
The MSB decoding circuit comprises one second decoder, and described MSB position is connected to the input of described second decoder, and the output of described second decoder is the MSB switch in the controlling resistance network successively;
Resistor network as shown in Figure 5, comprises MSB resistance string and LSB resistance string, and described MSB resistance string comprises a plurality of divider resistances that are connected in series from the power end to the earth terminal; Described LSB resistance string comprises the divider resistance that n is connected in series, and the resistance of described LSB resistance string is greatly greater than the resistance of each divider resistance in the described MSB resistance string; The node of each divider resistance end is all respectively drawn a MSB switch in the described MSB resistance string, and the other end of described MSB switch is connected to an end of described LSB resistance string, and adjacent MSB switch is free of attachment to the same end of described LSB resistance string; The node of each divider resistance end is all respectively drawn a LSB switch in the described LSB resistance string, and the other end of described LSB switch all is connected to the analog signal output of described digital to analog converter;
Described MSB is the highest significant position of data-signal, can be one or multidigit, and described LSB is the least significant bit of data-signal, is more than two or two, and described MSB and LSB couple together and form whole data-signal.
Described switch all adopts the cmos transmission gate structure.
Also be in series with a resistance between described MSB resistance string and the described power end.The resistance of close power end as shown in Figure 5.
The present invention also provides a kind of digital-analog convertion method that adopts above-mentioned digital to analog converter to realize, if the MSB position lowest order of input data is " 1 ", first decoder is to binary system LSB position decoding in the input data, carry out LSB＜n-1:0〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; If the MSB lowest order of input data is " 0 ", then, carry out LSB＜1:n to binary system LSB position decoding in the input data〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; When carrying out digital-to-analogue conversion, in the described MSB resistance string adjacent divider resistance at its node place a shared MSB switch, when input and the corresponding dac signal of a certain divider resistance, the MSB switch that these divider resistance two ends are connected is all closed, and other MSB switch all disconnects.
The present invention provides the another kind of employing digital-analog convertion method that above-mentioned digital to analog converter is realized again, if the MSB position lowest order of input data is " 0 ", first decoder is to binary system LSB position decoding in the input data, carry out LSB＜n-1:0〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; If the MSB lowest order of input data is " 1 ", then, carry out LSB＜1:n to binary system LSB position decoding in the input data〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; When carrying out digital-to-analogue conversion, in the described MSB resistance string adjacent divider resistance at its node place a shared MSB switch, when input and the corresponding dac signal of a certain divider resistance, the MSB switch that these divider resistance two ends are connected is all closed, and other MSB switch all disconnects.
When lsb signal is complete 0 the time, the MSB signal carries out the phase ortho position and switches, the resistance corresponding with last data has a shared MSB switch with the corresponding resistance of back one data, this shared MSB switch remains closed, another MSB switch of the described resistance corresponding with last data disconnects earlier, analog signal output this moment, another MSB switch of corresponding with back one data afterwards resistance is closed again.
For obtaining high accuracy and good linear, resistance string partial pressure type digital to analog converter is a kind of common structure, but digital to analog converter resolution means divider resistance and the switch that needs are a large amount of when increasing.With 13 digital to analog converters is example, if adopt single resistance string to divide laminated structure, as shown in Figure 1, then needs 8192 resistance and respective switch, and this need take a large amount of areas and bring serious ghost effect to reduce the performance of digital to analog converter.For this reason, the present invention adopts and is similar to segmented electric resistance partial pressure structure shown in Figure 2, and wherein MSB (highest significant position) is 7, adopts 128 (2 altogether
7) individual electric resistance partial pressure, select to be added in the head and the tail two ends of LSB (least significant bit) by the voltage of MSB decision by switch, the LSB resistance string comprises 64 (2
6) individual resistance, control the output that conducting just produces digital to analog converter by the switch of low level equally.
Suppose that it is the unit resistance of R that MSB and LSB resistance string all adopt resistance, and MSB resistance has an error delta Rm because of technology and other factor, LSB has error delta R1 to exist equally, then can infer integral nonlinearity INL and differential nonlinearity DNL:
The required precision of MSB resistance string is far above the LSB resistance string as can be seen from the above equation, and the MSB resistance by switching gate is relation in parallel with the right LSB resistance string of surveying, the reference voltage of supposing to be added on the MSB is VR, and the pressure reduction that is added on the LSB resistance string this moment is as can be seen
When MSB and LSB got substitutional resistance, the LSB resistance string was equivalent to bring Δ Rm=R/65 to MSB resistance, and then the INL that causes of MSB promptly reaches 63LSB, and this obviously can't reach designing requirement.
For addressing the above problem, when promptly reducing MSB unit resistance resistance, the most simple and effective way increases LSB unit resistance resistance.If the unit resistance of MSB is got R, and the unit resistance resistance of LSB is got 40R, then
Obviously influence reduces the LSB resistance string greatly to the MSB resistance, i.e. Δ Rm=R/2561, and then the INL that causes of MSB drops to 1.6LSB, has improved the Linearity of digital to analog converter thus greatly.
As shown in Figure 1, because switch has an intrinsic resistance Rsw, branch is at LSB resistance string both end voltage Vcd and be not equal to MSB resistance string a, voltage Vab between the b, therefore when switch at MSB resistance string phase ortho position, if two switch conductings simultaneously, can be because switch self-resistance Rsw divides to fall a part of voltage, DNL is brought very large influence, in the present invention when switch at MSB resistance string phase ortho position, the LSB resistance string has only a switch closure, finds out easily for this reason, when the d point disconnects, the c point voltage equals a point, and switch resistance reduces greatly to the influence of MSB resistance like this, thereby increases substantially the linear of digital to analog converter.
In the present invention, the MSB signal carries out the phase ortho position and switches, the resistance corresponding with last data has a shared MSB switch with the corresponding resistance of back one data, this shared MSB switch remains closed, another MSB switch of the described resistance corresponding with last data disconnects earlier, analog signal output this moment, another MSB switch of corresponding with back one data afterwards resistance is closed again.For example, referring to shown in Figure 5, last data is D0, and is corresponding with divider resistance R0 in the MSB resistance string, and back one data are D1, and are corresponding with divider resistance R1 in the MSB resistance string.When D0 when D1 switches, MSB switch b remains closed, earlier MSB switch a is disconnected, analog signal output this moment, at this moment Shu Chu analog quantity just in time is the voltage of node between R0 and the R1, and is not subjected to the influence of any switch resistance, it is very accurate to export.Again with MSB switch c closure, described digital to analog converter works on after the output analog signal.
In high resolution resistance partial pressure type digital to analog converter, a large amount of switches is used to switch output, and the ghost effect that brings when increasing area has also reduced the performance of digital to analog converter, should reduce the number of switch as much as possible for this reason.As shown in Figure 2, traditional method arrives the LSB resistance string according to different numeral input control MSB corresponding resistor both end voltage, when for example the MSB input becomes D1 by D0, switch a, b disconnect, and c, d closure, the high low-voltage of LSB resistance string is connected on R0 or the R1 by switch a, b, c, d respectively, each node all needs two switches in the middle of finding out easily, this structure idea is simple, but cost is because number of switches is numerous, when having taken a large amount of area, because ghost effect has reduced the digital to analog converter performance.The present invention with construction of switch optimization as shown in Figure 5 for this reason.For example, when MSB is input as D0, the height two ends of LSB resistance string are the two ends up and down of connecting resistance R0 respectively, be MSB switch a and b closure, other MSB switch all disconnects, when the MSB input becomes D1, LSB resistance string high-end still keeps former connection, be that MSB switch b is still closed, but the low side reconfiguration arrives the top of resistance R 1, promptly MSB switch a disconnects and the c closure.Obvious this method can be saved a switch at each node, and circuit area and performance are all had great improvement.And the decoding circuit of the method that switch switches by as shown in Figure 6 also is achieved.
With 13 digital to analog converters is example, and wherein the MSB position is high 7, and the LSB position is hanged down 6.The signal of the digital to analog converter of realizing through existing decoding circuit as shown in Figure 4, the output OUT_LSB＜63:0 of LSB resistance string〉by input LSB input signal IN_LSB＜5:0 unique decision, with lowest order MSB＜6 of MSB signal〉irrelevant.Among the present invention, because adjacent MSB divider resistance is shared switch, when MSB divider resistance string switches at the phase ortho position, the level height direction at LSB resistance string two ends will be reversed, LSB is LSB＜5:0 〉, if do not revise decoding circuit, then switch along with the MSB switch, the output meeting of LSB resistance string is constantly at LSB＜63:0〉and LSB＜0:63 between variation.
The present invention improves decoding circuit for this reason, makes that the output of LSB is by lowest order MSB＜6 of MSB〉control, as shown in Figure 6.Because lsb signal is 6, so n=2
6=64.When MSB＜6〉when being 0, LSB＜5:0〉directly be converted to LSB＜63:0 by decoder 〉, when MSB＜6〉〉 when being 1, LSB＜5:0〉data output becomes LSB＜1:64 〉, its waveform signal as shown in Figure 7, thereby guarantee that the dividing potential drop in the resistance string still is consistent with the data of input.Perhaps, when MSB＜6〉when being 1, LSB＜5:0〉directly be converted to LSB＜63:0 by decoder 〉, when MSB＜6〉when being 0, LSB＜5:0〉data output becomes LSB＜1:64 〉, thereby guarantee that the dividing potential drop in the resistance string still is consistent with the data of input.
For example, MSB＜6〉〉 be 0 o'clock, LSB＜5:0〉signal be 000001, described first decoder control this moment LSB switch OUT_LSB＜1〉closure, other LSB switch all disconnects; And MSB＜6 be 1 o'clock, LSB＜5:0〉signal be 000001, described first decoder control this moment LSB switch OUT_LSB＜63〉closure, other LSB switch all disconnects.
In hot environment, there is bigger leakage current in transistor to substrate, the precision influence of logarithmic mode transducer is very big, for overcoming this problem, the switch of this digital to analog converter adopts the cmos transmission gate structure, by adjusting transistorized size relation, make the leakage current of PMOS and NMOS just be compensated counteracting, improved the Linearity of digital to analog converter under the high temperature thus greatly.
In sum, the present invention does not need special compensating circuit, significantly improved the segmented digital to analog converter because two cross-talk DAC's influences each other before and after the cascade system, improved the Linearity of digital to analog converter effectively, simultaneously significantly reduced circuit area, the influence of leakage current logarithmic mode converter performance is also compensated effectively and is improved under the high temperature.
Claims (7)
1. a digital to analog converter is characterized in that, comprises
The LSB decoding circuit, described decoding circuit includes one first decoder, the LSB position is directly connected to the data input pin of described first decoder in the data-signal, lowest order in the MSB position in the data-signal is connected to the control end of described first decoder, described first decoder determines described LSB position signal is carried out LSB＜n-1:0 according to the lowest order in the described MSB position〉output or LSB＜1:n〉output, wherein n is the number of decoder carry-out bit, and each carry-out bit of described first decoder is the LSB switch in the controlling resistance network successively;
The MSB decoding circuit comprises one second decoder, and described MSB position is connected to the input of described second decoder, and the output of described second decoder is the MSB switch in the controlling resistance network successively;
Resistor network comprises MSB resistance string and LSB resistance string, and described MSB resistance string comprises a plurality of divider resistances that are connected in series from the power end to the earth terminal; Described LSB resistance string comprises the divider resistance that n is connected in series, and the resistance of described LSB resistance string is greatly greater than the resistance of each divider resistance in the described MSB resistance string; The node of each divider resistance end is all respectively drawn a MSB switch in the described MSB resistance string, and the other end of described MSB switch is connected to an end of described LSB resistance string, and adjacent MSB switch is free of attachment to the same end of described LSB resistance string; The node of each divider resistance end is all respectively drawn a LSB switch in the described LSB resistance string, and the other end of described LSB switch all is connected to the analog signal output of described digital to analog converter;
Described MSB is the highest significant position of data-signal, can be one or multidigit, and described LSB is the least significant bit of data-signal, is more than two or two, and described MSB and LSB couple together and form whole data-signal.
2. digital to analog converter according to claim 1 is characterized in that, described switch adopts the cmos transmission gate structure.
3. digital to analog converter according to claim 1 is characterized in that, also is in series with a resistance between described MSB resistance string and the described power end.
4. digital-analog convertion method that adopts digital to analog converter as claimed in claim 1 to realize, it is characterized in that, if the MSB position lowest order of input data is " 1 ", first decoder is to binary system LSB position decoding in the input data, carry out LSB＜n-1:0〉output, second decoder is deciphered the MSB position simultaneously, and the switch in first decoder and the second decoder controlling resistance network is exported analog signal then; If the MSB lowest order of input data is " 0 ", then, carry out LSB＜1:n to binary system LSB position decoding in the input data〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; When carrying out digital-to-analogue conversion, in the described MSB resistance string adjacent divider resistance at its node place a shared MSB switch, when input and the corresponding dac signal of a certain divider resistance, the MSB switch that these divider resistance two ends are connected is all closed, and other MSB switch all disconnects.
5. a kind of digital-analog convertion method according to claim 4, it is characterized in that, when lsb signal is complete 0 the time, the MSB signal carries out the phase ortho position and switches, the resistance corresponding with last data has a shared MSB switch with the corresponding resistance of back one data, and this shared MSB switch remains closed, another MSB switch disconnection earlier of the described resistance corresponding with last data, analog signal output this moment, another MSB switch of corresponding with back one data afterwards resistance is closed again.
6. digital-analog convertion method that adopts digital to analog converter as claimed in claim 1 to realize, it is characterized in that, if the MSB position lowest order of input data is " 0 ", first decoder is to binary system LSB position decoding in the input data, carry out LSB＜n-1:0〉output, second decoder is deciphered the MSB position simultaneously, and the switch in first decoder and the second decoder controlling resistance network is exported analog signal then; If the MSB lowest order of input data is " 1 ", then, carry out LSB＜1:n to binary system LSB position decoding in the input data〉output, second decoder is deciphered the MSB position simultaneously, switch in first decoder and the second decoder controlling resistance network is exported analog signal then; When carrying out digital-to-analogue conversion, in the described MSB resistance string adjacent divider resistance at its node place a shared MSB switch, when input and the corresponding dac signal of a certain divider resistance, the MSB switch that these divider resistance two ends are connected is all closed, and other MSB switch all disconnects.
7. a kind of digital-analog convertion method according to claim 6, it is characterized in that, when lsb signal is complete 0 the time, the MSB signal switches in order successively, the resistance corresponding with last data has a shared MSB switch with the corresponding resistance of back one data, and this shared MSB switch remains closed, another MSB switch disconnection earlier of the described resistance corresponding with last data, analog signal output this moment, another MSB switch of corresponding with back one data afterwards resistance is closed again.
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