CN112289870A - Detector chip assembly for high rate optical signal reception - Google Patents
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- 230000003287 optical effect Effects 0.000 title claims abstract description 42
- 239000003990 capacitor Substances 0.000 claims abstract description 63
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 45
- 239000000758 substrate Substances 0.000 claims description 23
- 239000000523 sample Substances 0.000 claims description 16
- 239000004065 semiconductor Substances 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 2
- 239000010453 quartz Substances 0.000 claims description 2
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 abstract description 7
- 229910052737 gold Inorganic materials 0.000 abstract description 7
- 230000004044 response Effects 0.000 description 16
- 230000008878 coupling Effects 0.000 description 7
- 238000010168 coupling process Methods 0.000 description 7
- 238000005859 coupling reaction Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000004806 packaging method and process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- 239000013307 optical fiber Substances 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000002360 explosive Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 238000011031 large-scale manufacturing process Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/02002—Arrangements for conducting electric current to or from the device in operations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/02016—Circuit arrangements of general character for the devices
Abstract
The invention discloses a detector chip assembly for high-speed optical signal reception, which comprises: a detector chip; a TIA; at least two lead wires connected with the output end of the TIA and used for realizing the connection with an external circuit; a capacitor between the detector chip and the TIA; one end of the capacitor is grounded with the detector chip; the capacitor is connected with the TIA in parallel; and at least two sections of gold wires, wherein the first gold wire is connected with the detector chip and the capacitor, and the second gold wire is connected with the capacitor and the TIA. The detector chip converts the received high-speed modulated optical signal into an electric signal, the electric signal is input to TIA through the inductance and capacitance, and the electric signal is input to an external circuit through the lead after being amplified by the TIA. By selecting proper inductance and capacitance, the invention can greatly increase the effective receiving bandwidth of the detector chip, thereby realizing the receiving of high-speed optical signals by using the low-cost and low-bandwidth detector chip.
Description
Technical Field
The invention relates to a signal transmission device in the field of communication, in particular to a detector chip assembly for receiving high-speed optical signals.
Background
Along with the application of technologies such as high-definition video and 5G mobile communication and the explosive increase of information brought by the popularization of the internet of things, communication networks face greater and greater bandwidth increase pressure. The conventional 10G transmission technology is not enough to meet the current bandwidth requirement, and the development of 100G/400G/800G transmission technology has become necessary. However, there are many challenges facing the upgrade from the conventional 10G network to over 100G, one of which is the need for a high bandwidth, low cost and reliable detector chip for high speed optical signal reception.
The bandwidth of the semiconductor photodiode detector is mainly limited by the junction capacitance and the parasitic capacitance of the chip, so that the most direct method is to reduce the light receiving area to reduce the junction capacitance and the parasitic capacitance of the detector chip so as to increase the 3dB bandwidth of the receiving chip in order to improve the receiving bandwidth of the semiconductor photodiode detector chip. However, reducing the light receiving area greatly increases the difficulty of coupling the signal light from the optical fiber to the detector chip and the package manufacturing cost. For example, expensive aspheric lenses are required, and coupling accuracy and stability are required to be sub-micron. These not only increase material costs, but also greatly reduce manufacturing efficiency and yield. If a low-bandwidth detector chip can be used, it would be of great practical significance to increase the receiving bandwidth of the detector through peripheral circuits without significantly reducing the light receiving area.
A conventional package structure of a probe chip is shown in fig. 1, and includes a probe chip 1, a transimpedance amplifier (TIA)2, and a lead 4 connected to an external circuit and outputting a high-speed electrical signal, where the probe chip 1 and the TIA2 are directly connected by a gold wire 3 (an external driving voltage lead of the TIA2 and a decoupling capacitor that may be needed are not shown in fig. 1). In general, to minimize package-induced parasitics, the gold wire 3 connecting the probe chip 1 and TIA2 needs to be as short as possible to reduce the self-induced inductance generated by the gold wire itself. FIG. 2 shows a small signal S21 curve obtained by simulation based on a detector chip with a junction capacitance and parasitic capacitance of 0.075pF (picofarad); the figure is based on an equivalent circuit of a detector chip (TIA2 is replaced by a 50-ohm load), and the bandwidth of the detector chip can be obtained through calculation; as shown in fig. 2, the 3dB bandwidth is 20.4GHz, which is satisfactory for 25Gbps signal reception, but insufficient for 50Gbps optical signal reception.
However, it is found that adding a certain inductance between the detector chip 1 and the TIA2 can increase the receiving bandwidth of the detector. Based on the idea, a package structure of the detector chip shown in fig. 3 may be adopted, where an inductor 5 is added between the detector chip 1 and the TIA2 to increase the receiving bandwidth of the detector chip, where the detector chip 1 is connected to the inductor 5 through a gold wire 3, and the inductor 5 is connected to a signal electrode of the TIA2 through the gold wire 3. Through testing, the bandwidth of the detector chip can be increased by about 50% by adding one inductor. As shown in FIG. 4, when the inductance 5 is 0.1nH (nanohenries), the 3dB bandwidth increases from 20.4GHz without inductance to 26.2 GHz; when the inductance is increased to 0.2nH, the 3dB bandwidth is increased to 29.1 GHz; at an inductance of 0.3nH, the 3dB bandwidth no longer increases, returning to 28 GHz. Although the bandwidth of the detector can be increased from 20.4GHz to 29.1GHz by introducing the inductor, the 3dB bandwidth of the detector is required to be more than 33GHz to receive 50Gbps optical signals, so that the addition of the inductor is still insufficient to ensure the reception of 50Gbps signals, and the inductor cannot be applied to 50Gbps networks.
Disclosure of Invention
The invention aims to provide a detector chip assembly for receiving high-speed optical signals, which can improve the receiving bandwidth of a photodiode detector, so that a low-bandwidth detector chip can be applied to receiving high-speed optical signals without reducing the light receiving area.
In order to solve the above technical problems, the technical solution of the present invention for a detector chip assembly for high-rate optical signal reception is:
the method comprises the following steps: a detector chip; a TIA; at least two lead wires connected with the output end of the TIA and used for realizing the connection with an external circuit; a capacitor between the detector chip and the TIA; one end of the capacitor is grounded with the detector chip; the capacitor is connected with the TIA in parallel; and at least two sections of gold wires, wherein the first gold wire is connected with the detector chip and the capacitor, and the second gold wire is connected with the capacitor and the TIA.
In another embodiment, the length of the first gold wire is greater than 0.1 mm.
In another embodiment, the self-induction inductance generated by the first gold wire is between 0.01nH and 1 nH; and/or the self-induction inductance generated by the second gold wire is between 0.01nH and 0.5 nH.
In another embodiment, the detector chip, the capacitor and the TIA are packaged in a TO-CAN.
In another embodiment, the probe chip assembly further includes an inductor, one end of the inductor is connected to the first gold wire, and the other end of the inductor is connected to the capacitor; the inductor and the capacitor are positioned between the detector chip and the TIA chip; the inductor is connected with the detector chip in series; the inductor and the detector chip which are connected in series are connected with the capacitor in parallel; the length of the first gold wire is not more than 0.1 mm.
In another embodiment, the detector chip, the inductor, the capacitor and the TIA are packaged in a TO-CAN.
In another embodiment, the inductor and the capacitor are integrated on the same substrate; the substrate has a metal film thereon.
In another embodiment, the detector chip is located on a substrate on which the inductor and the capacitor are located; or the detector chip is positioned on a different substrate from the substrate on which the inductor and the capacitor are positioned.
In another embodiment, the inductance value is between 0.01nH and 1 nH.
In another embodiment, the capacitance value is between 0.001pF and 0.2 pF.
In another embodiment, the substrate is an aluminum nitride, aluminum oxide, quartz, or silicon-based substrate.
In another embodiment, the detector chip is a semiconductor photodiode detector chip.
The invention can achieve the technical effects that:
the invention further improves the bandwidth of the detector chip by adding a parallel capacitor, thereby enabling the 25G detector to be applied to receiving 50G signals, and realizing low cost and conveniently increasing the bandwidth of the detector chip assembly.
The detector chip converts the received high-speed modulated optical signal into an electric signal, the electric signal is input to TIA through the inductance and capacitance, and the electric signal is input to an external circuit through the lead after being amplified by the TIA. By selecting proper inductance and capacitance, the detector chip assembly of the invention can greatly increase the effective receiving bandwidth of the detector chip, thereby realizing the receiving of high-speed optical signals by using the low-cost and low-bandwidth detector chip.
The invention utilizes a circuit based on thin film technology and a low-bandwidth detector chip with low cost and large light receiving area to realize the improvement of the detector bandwidth and the receiving of high-speed optical signals without developing a high-bandwidth detector chip with great technical difficulty, thereby solving the limitation of the shortage of the high-bandwidth detector chip in the current market.
The invention can be compatible with the existing detector chip packaging technology, does not need to additionally develop a new packaging process and increase the chip packaging size, and can be suitable for all optical devices and optical modules. Therefore, the technical scheme of the invention can ensure large-scale production, and simultaneously has lower cost and better reliability compared with a high-bandwidth detector chip.
The invention can overcome the defects of the existing semiconductor photoelectric detector chip applied to 25G or more optical signal receiving, and can use the photoelectric detector chip with low bandwidth for receiving 25G or more high-speed optical signals, thereby realizing 25G or more high-speed signal receiving by utilizing the existing mature detector chip with low cost and high reliability and an assembly manufacturing process.
Drawings
The invention will be further described in detail with reference to the drawings and specific examples, so as to clearly understand the structure and the working principle of the invention, but the protection scope of the invention is not limited thereby.
It is to be understood by those skilled in the art that the following description is only exemplary of the principles of the present invention, which may be applied in numerous ways to achieve many different alternative embodiments. These descriptions are made for the purpose of illustrating the general principles of the present teachings and are not meant to limit the inventive concepts disclosed herein.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with the general description given above and the detailed description of the drawings given below, serve to explain the principles of the invention.
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a schematic diagram of a detector chip assembly according to the prior art;
FIG. 2 is a graph of the intrinsic small signal response of the chip shown in FIG. 1, with frequency (in GHz) on the abscissa and small signal response (in dB) on the ordinate;
FIG. 3 is a schematic diagram of a prior art detector chip assembly with an inductor;
FIG. 4 is a graph of simulated small signal response of the chip of FIG. 3 with different inductors added;
FIG. 5 is a schematic structural diagram of embodiment 1 of a detector chip assembly for high rate optical signal reception in accordance with the present invention;
FIG. 6 is a graph of small signal response at inductance of 0.2nH for example 1 with different capacitors added;
FIG. 7 is a graph of small signal response at inductance of 0.3nH for example 1 with different capacitors added;
FIG. 8 is a schematic structural diagram of an embodiment 2 of a probe chip assembly for high-rate optical signal reception according to the present invention, in which gold wires are used instead of inductors;
fig. 9 is a small signal response graph of example 2, considering the inductance introduced by the gold wire connecting the capacitance to the TIA.
The reference numbers in the figures illustrate:
1 is a detector chip, 2 is a transimpedance amplifier (TIA),
3 is a first gold wire, 4 is a lead wire,
5 is an inductor, 6 is a capacitor,
7 is a substrate, and 8 is a second gold wire.
Detailed Description
The core idea of the invention is to increase the optical signal receiving bandwidth of the detector chip by combining an additional circuit based on inductance and capacitance with the detector chip. The semiconductor detector chip generates electrons and holes by absorbing photons, and converts high-speed optical signals into high-speed electric signals. Although it is theoretically possible to meet the bandwidth requirement of 50G or even 100G by reducing the size of the chip to increase the bandwidth of the chip. However, due to the limitations of semiconductor materials and chip manufacturing processes, the physical size cannot be infinitely reduced, and the more serious problem is the reduction of the light receiving area, which makes the coupling of the optical signal from the optical fiber to the detector chip more and more difficult. When the light receiving area is reduced to about 20 microns, the low-loss coupling of the optical fiber and the detector chip can be realized only by using the aspheric lens; when the coupling precision is reduced to below 10 microns, even though the aspheric lens is used, the coupling loss is greatly increased, and the production efficiency and the reliability of the device are greatly reduced, because the requirement on the coupling precision reaches the submicron level. In addition, since the light spot is reduced and the absorption surface of the detector is near the focus, the return loss control of the device is extremely difficult if a traditional packaging structure is used. All of which will increase the packaging and manufacturing costs of the high bandwidth detector chip.
The invention can properly adjust the overall performance of the circuit through the additional inductor and the capacitor, thereby increasing the receiving bandwidth of the detector chip assembly without greatly reducing the light receiving area of the detector. The following will take a 50G probe chip assembly as an example to explain in detail how the present invention can achieve high-rate 50Gbps signal reception with a low-bandwidth probe chip. The technical scheme of the invention is also suitable for bandwidth improvement of the detector chip with high speed of more than 25G.
Based on the idea of the invention, the detector chip and a compensation circuit composed of a capacitor and an inductor form a detector chip assembly, and the high-speed optical signal is not directly connected to the TIA or other loads, but enters the TIA through the compensation circuit to output a high-speed electrical signal, so that the high-speed signal is received.
The invention relates to a detector chip assembly for receiving high-speed optical signals, which mainly comprises a detector chip, a capacitor, an inductor, a TIA (three-dimensional interactive application) and a lead wire connected with an external circuit, wherein the lead wire is used for outputting high-speed electrical signals; one end of the inductor is connected with the detector chip, the other end of the inductor is connected with the capacitor, and the inductor is connected with the TIA through the capacitor; the capacitance is in parallel with the inductance and the TIA.
The detector chip converts a received optical signal into an electric signal, and then the electric signal passes through a circuit consisting of an inductor and a capacitor and then is added into the TIA. The frequency response of the whole circuit can be modulated by selecting proper inductance and capacitance values to improve the receiving bandwidth of the whole detector chip assembly.
In order to achieve the above-mentioned purpose of achieving high-speed optical signal reception based on a low-bandwidth detector chip, the present invention is described by the following embodiments.
Example 1
As shown in fig. 5, the probe chip assembly for high-speed optical signal reception of the present invention includes a probe chip 1, a TIA2, an inductor 5, a capacitor 6, and leads 4 for connecting external circuits, wherein the probe chip 1, the TIA2, the inductor 5, and the capacitor 6 are attached to a same substrate 7; a metal film is arranged on the substrate 7; the detector chip 1 is connected with one end of an inductor 5 through a first gold wire 3, the other end of the inductor 5 is connected with one end of a capacitor 6, and the end of the capacitor 6 is connected with a TIA2 through a second gold wire; the other end of the capacitor 6 is grounded; the capacitor 6 is connected in parallel with the inductor 5 and the TIA 2; the lead 4 is capable of outputting a high-speed electrical signal.
As a preferred embodiment, the inductor 5 and the capacitor 6 can be made by a thin film process and integrated on the substrate 7, so as to facilitate packaging and save cost;
the inductance value of the inductor 5 is controlled by the size of the metal film;
the capacitor 6 can be a flat capacitor, and the capacitance value of the capacitor is controlled by the area and/or the thickness of the dielectric layer;
the specific values of the inductor 5 and the capacitor 6 can be optimized based on the performance of the detector chip 1; preferably, the value of the inductance 5 is between 0.01nH and 1 nH; the value of the capacitor 4 is between 0.001pF and 0.2 pF.
The following is an example of how the present invention uses a low bandwidth 25G detector chip for 50Gbps optical signal reception using an inductor 5 and a capacitor 6. The intrinsic bandwidth of the 25G detector chip is 20.4 GHz; when an inductor with the inductance value of 0.2nH is added, the receiving bandwidth is increased to 29.1GHz, but the receiving of 50Gbps signals cannot be completely met; by selecting appropriate inductance and capacitance, the receiving bandwidth of the detector chip assembly can be further improved when the LC circuit of example 1 is added.
Fig. 6 shows the corresponding small signal bandwidths when the inductance is 0.2nH and the capacitances are 0.01pF, 0.03pF, 0.05pF, 0.07pF and 0.09 pF. Fig. 6 shows that when the inductance 5 is 0.2nH, the 3dB bandwidth is not improved by adding a capacitor 6, but the flatness of the small signal response is significantly improved, and thus the received signal quality is improved.
Fig. 7 shows the small signal response curves corresponding to the inductance of 0.3nH and the capacitances of 0, 0.02, 0.04, 0.06, 0.08, 0.1, 0.12 and 0.15pF, respectively, and the bandwidths of 28, 29, 30.6, 33.1, 35.3, 36.2, 36.3 and 35.8GHz, respectively. In fig. 7 it is shown that the bandwidth of the added capacitor 6 will be improved when the inductance is 0.3 nH. When the capacitance value is 0.1-0.13 pF, the receiving bandwidth can be increased from 28GHz to more than 36GHz, and the receiving requirement of 50Gbps signals can be met. Thus, the addition of the capacitor 6 will suppress low frequency resonances previously caused by inductance, increasing the high frequency response, thereby flattening the frequency response and increasing the bandwidth of the detector chip assembly.
In embodiment 1, the inductor 5 is made by a thin film process, and is located on the same substrate 7 as the capacitor 6; the laser chip 1 is connected with the inductor 2 through a gold wire 3. Since the gold wire used for chip connection has a diameter of about 25 μm, which itself generates a self-induced inductor, the inductor 2 in embodiment 1 can be replaced by a gold wire, resulting in embodiment 2 of the present invention.
Example 2
As shown in fig. 8, the inductor 5, which is originally located on the same substrate 7 as the capacitor 6, is replaced by a first gold wire 3 of a certain length; the first gold wire 3 not only provides the connection of the capacitor 6 to the detector chip 1, but also acts as an inductor 5. Compared with embodiment 1, embodiment 2 replaces inductor 2 with gold wires, which not only reduces the cost, but also changes the inductance value because the length of the gold wires can be adjusted during chip packaging, so the gold wires with different lengths can play the role of adjustable inductor. Since the parameters of the detector chips of different suppliers are different, adjusting the inductance value by changing the length of the first gold wire greatly facilitates adjusting the resonance characteristics for different detector chips to obtain the best response performance. The size of the first gold wire 3 is adjusted according to the performance of the detector chip to obtain the optimal receiving bandwidth.
In embodiment 2, the capacitor 6 is connected to the TIA2 through the second gold wire 8; the second gold wire 8 also generates a self-induction inductor which is used as a small signal response curve of the second inductor improved detector assembly, and the quality of a received signal is further improved. Simulation found that the second gold wire 8 could not increase the bandwidth, but could improve the flatness of the small-signal response curve.
FIG. 9 shows the simulated bandwidths after adding the inductors (inductance values 0.01, 0.1, 0.15, 0.2nH) introduced by the second gold wire 8 in example 1; when the inductance is less than 0.2nH, the bandwidth change is less than 1GHz, but the low-frequency response of the small signal is improved, and the original high-frequency overshoot is reduced, so that the quality of the received signal is greatly improved. The inset in fig. 9 corresponds to a receive eye pattern of 0.01nH on the left and 0.15nH on the right. It can be seen that the splitting and jitter of the original eye pattern due to the uneven high and low frequency response are significantly improved after the addition of the inductance caused by the gold wire 8.
The detector chip 1 and TIA2 in the above described embodiment are located on the substrate 7 where the inductor 5 and capacitor 6 are located, but this is not essential. TIA2 may also be placed on another substrate and then connected to the components on substrate 7 by gold wires. The probe chip assemblies of the above embodiments 1 and 2 may be packaged in a standard TO-CAN (diode package module), and the driving source and the output signal of the TIA may be directly connected TO the pin of the TO through a gold wire.
It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
Claims (12)
1. A probe chip assembly for high rate optical signal reception, comprising:
a detector chip;
a TIA;
at least two lead wires connected with the output end of the TIA and used for realizing the connection with an external circuit;
a capacitor between the detector chip and the TIA; one end of the capacitor is grounded with the detector chip; the capacitor is connected with the TIA in parallel; and
and the first gold wire is connected with the detector chip and the capacitor, and the second gold wire is connected with the capacitor and the TIA.
2. A detector chip assembly for high rate optical signal reception as recited in claim 1, wherein: the length of the first gold wire is more than 0.1 mm.
3. A detector chip assembly for high rate optical signal reception as recited in claim 1, wherein: the self-induction inductance generated by the first gold wire is between 0.01nH and 1 nH; and/or the self-induction inductance generated by the second gold wire is between 0.01nH and 0.5 nH.
4. A detector chip assembly for high rate optical signal reception as recited in claim 1, wherein: the detector chip, the capacitor and the TIA are packaged in a TO-CAN.
5. The probe chip assembly for high rate optical signal reception according to claim 1, further comprising an inductor, one end of the inductor being connected to the first gold wire, and the other end of the inductor being connected to the capacitor; the inductor and the capacitor are positioned between the detector chip and the TIA chip; the inductor is connected with the detector chip in series; the inductor and the detector chip which are connected in series are connected with the capacitor in parallel.
6. A detector chip assembly for high rate optical signal reception in accordance with claim 5, wherein: the detector chip, the inductor, the capacitor and the TIA are packaged in a TO-CAN.
7. A detector chip assembly for high rate optical signal reception in accordance with claim 5, wherein: the inductor and the capacitor are integrated on the same substrate; the substrate has a metal film thereon.
8. A detector chip assembly for high rate optical signal reception as claimed in claim 7, wherein: the detector chip is positioned on the substrate on which the inductor and the capacitor are positioned; or the detector chip is positioned on a different substrate from the substrate on which the inductor and the capacitor are positioned.
9. A detector chip assembly for high rate optical signal reception in accordance with claim 5, wherein: the inductance value is between 0.01nH and 1 nH.
10. A detector chip assembly for high rate optical signal reception according to claim 1 or 9, wherein: the capacitance value is between 0.001pF and 0.2 pF.
11. A probe chip assembly for high rate optical signal reception according to any one of claims 1 to 10, wherein: the substrate is an aluminum nitride, aluminum oxide, quartz or silicon-based substrate.
12. A probe chip assembly for high rate optical signal reception according to any one of claims 1 to 10, wherein: the detector chip is a semiconductor photodiode detector chip.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115276808A (en) * | 2022-09-23 | 2022-11-01 | 上海阿米芯光半导体有限责任公司 | High-speed signal photoelectric transceiving chip and bandwidth adjusting method thereof |
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2020
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115276808A (en) * | 2022-09-23 | 2022-11-01 | 上海阿米芯光半导体有限责任公司 | High-speed signal photoelectric transceiving chip and bandwidth adjusting method thereof |
| CN115276808B (en) * | 2022-09-23 | 2023-03-07 | 上海阿米芯光半导体有限责任公司 | High-speed signal photoelectric transceiving chip and bandwidth adjusting method thereof |
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