CN112286747B - Method, system, equipment and medium for detecting server cable - Google Patents
Method, system, equipment and medium for detecting server cable Download PDFInfo
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Abstract
The invention discloses a method, a system, equipment and a storage medium for detecting a server cable, wherein the method comprises the following steps: determining whether a wire to be measured placed between the first member and the second member is a reference wire and satisfies a one-to-one relationship of a pin at one end of the wire and a pin at the other end of the wire; responsive to the wire under test being a reference wire and satisfying a one-to-one relationship of a pin at one end of the wire with a pin at the other end of the wire, the first component transmitting a first acknowledgement signal from the sideband channel to the second component; in response to the second component receiving the first confirmation signal, sequentially detecting whether each differential channel of the cable to be tested is conducted or not; and in response to all the differential channels being conducted, confirming that the cable to be tested is conducted. According to the invention, cable connectivity detection mechanisms in different modes are designed according to the requirements of different applications, so that the method has strong universality and greatly simplifies the test development and detection processes of common high-speed cables.
Description
Technical Field
The present invention relates to the field of cable detection, and more particularly, to a method, a system, a computer device, and a readable medium for detecting a server cable.
Background
With the continuous development of internet artificial intelligence technology, the traditional server architecture has difficulty in adapting to the continuous and changing data processing and data storage requirements. There is an increasing demand for ever-increasing catalysis, deriving server forms of fused heterogeneous computing in various forms. The novel heterogeneous computing server is improved to different degrees: on one hand, under the requirement of following the size of a standard rack, the height of a server case is continuously increased, and a larger space is designed inside to increase more computing units, heterogeneous acceleration modules, FPGA acceleration network cards, GPU processors and the like; on the other hand, the traditional management node is separated from the special acceleration computing node and the storage node, and the management node is interconnected with the special expansion computing node and the storage node in an external system level and backed up.
However, the conventional board-level interconnection manner is difficult to meet design requirements, and a large number of high-speed interconnection cables are necessarily required to be used as a medium for transmission in and between systems, regardless of the design form of the integrated chassis or the interconnection among a plurality of system chassis. The high-speed cables are various in types, and even in the same application occasion, different combinations can be selected. In view of this, selecting an applicable cable ensures the reliability of cable interconnection, which becomes a problem that the board-level, cross-system-level design has to face.
Currently, in other technical fields of industry, there are some simple test methods for detecting cables, for example, by combining external resistors with different resistance and voltage division with analog-to-digital conversion (ADC) (Analog to Digital Converter, analog-to-digital converter), measuring cable channel voltage to determine cable on-off, and by externally designing a special encoder/decoder through an MCU (Microprogrammed Control Unit, micro-program controller), determining cable on-off by implementing 0/1 logic change through the encoder, and determining the correctness of cable sequence by combining several traversal modes.
By means of the voltage dividing resistor and the method for measuring the voltage value through analog-to-digital conversion, when the number of cable channels is large, various different voltage dividing resistance values need to be calculated, the area of a PCB (printed circuit board) of a large testing jig is occupied, and the accuracy of the analog-to-digital conversion ADC is easy to be misjudged due to the accuracy of the resistance values, power supply interference and the like.
The MCU is matched with the encoder/decoder, the encoder/decoder mechanism is not applicable when the number of the cable channels is large due to the influence of the bit width of the encoder/decoder, the encoding relation is determined and can not be flexibly changed, the corresponding cable channels only use 0/1 constant level logic, and the encoder/decoder mechanism is not applicable under the conditions of large number of the cable channels and changeable cable sequence relation.
In particular, the slimline (thin wire cable) x4 has a 38pin,slimline x8 pin of 74, in which case the above approach is clearly unusable.
In addition, by manufacturing a specific test fixture, connectivity of a specific high-speed cable can be tested, but once the corresponding relation of the cable sequence is changed, the development is needed again, whether hardware equipment is modified or software is optimized, and the method has a certain limit under the condition of facing the multiple demands of different application scenes.
Disclosure of Invention
In view of the above, an object of the embodiments of the present invention is to provide a method, a system, a computer device and a computer readable storage medium for detecting a server cable, which develop cable connectivity detection mechanisms with different modes according to different application requirements by fully utilizing the characteristics of abundant resources and flexible programming of component IO (Input/Output), so as to have strong versatility, avoid the problem of repeated development of a test fixture/test environment due to special cable sequences, and greatly simplify the test development and detection process of commonly used high-speed cables.
Based on the above object, an aspect of the embodiments of the present invention provides a method for detecting a server cable, including the steps of: determining whether a wire to be measured placed between the first member and the second member is a reference wire and satisfies a one-to-one relationship of a pin at one end of the wire and a pin at the other end of the wire; responsive to the wire under test being a reference wire and satisfying a one-to-one relationship of a pin at one end of the wire with a pin at the other end of the wire, the first component transmitting a first acknowledgement signal from a sideband channel to the second component; in response to the second component receiving the first acknowledgement signal, sequentially detecting whether each differential channel of the cable to be tested is conducted; and responding to the conduction of all the differential channels, and confirming the conduction of the cable to be tested.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: the first component sends a second acknowledgement signal from the first differential channel to the second component, and judges whether the second component receives the second acknowledgement signal.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: in response to the second component receiving the second acknowledgement signal, the second component sends a third acknowledgement signal to the first component and determines whether the first component received the third acknowledgement signal.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: in response to the first component receiving the third acknowledgement signal, continuing to detect a next differential lane.
In some embodiments, further comprising: in response to the to-be-measured cable not being a reference wire but satisfying a one-to-one relationship of a pin at one end of the cable with a pin at the other end of the cable, the first component transmitting acknowledgement data with a pin code to the second component; and responding to the second component to receive the confirmation data, analyzing the confirmation data, and judging whether the cable is conducted or not based on the analyzed data.
In some embodiments, the determining whether the cable is conductive based on the parsed data includes: and matching the analyzed pin codes with the pin codes of the first component, and judging whether the pin codes which are not successfully matched exist.
In some embodiments, further comprising: and in response to the to-be-tested cable is not in a reference line and does not meet the requirement that the pins at one end of the cable and the pins at the other end of the cable are in a one-to-one relationship, the first component sequentially sends the confirmation data of each pin, and receives and analyzes each confirmation data at the second component.
In another aspect of the embodiment of the present invention, there is also provided a detection server cable system, including: a reference module configured to determine whether a wire to be measured placed between the first member and the second member is a reference wire and satisfies a one-to-one relationship of a pin at one end of the wire and a pin at the other end of the wire; a first detection module configured to cause the first component to transmit a first acknowledgement signal from a sideband channel to the second component in response to the wire under test being a reference wire and satisfying a one-to-one relationship of a pin at one end of the wire with a pin at the other end of the wire; the second detection module is configured to respond to the first confirmation signal received by the second component and sequentially detect whether each differential channel of the cable to be tested is conducted or not; and the display module is configured for responding to the conduction of all the differential channels and confirming the conduction of the cable to be tested.
In yet another aspect of the embodiment of the present invention, there is also provided a computer apparatus, including: at least one processor; and a memory storing computer instructions executable on the processor, which when executed by the processor, perform the steps of the method as above.
In yet another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium storing a computer program which, when executed by a processor, implements the method steps as described above.
The invention has the following beneficial technical effects: by fully utilizing the characteristics of abundant IO resources of the components and flexible programming, the cable connectivity detection mechanism with different modes is developed according to the needs of different applications, has strong universality, avoids the problem of repeated development of a test fixture/test environment due to special cable sequences, and greatly simplifies the test development and detection process of the common high-speed cable.
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In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are necessary for the description of the embodiments or the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention and that other embodiments may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an embodiment of a method for detecting a server cable according to the present invention;
FIG. 2 is a schematic topological block diagram of server cable detection;
FIG. 3 is a schematic diagram of a cable detection unit interconnection topology;
fig. 4 is a schematic hardware structure of an embodiment of a computer device for detecting a server cable according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention will be described in further detail with reference to the accompanying drawings.
It should be noted that, in the embodiments of the present invention, all the expressions "first" and "second" are used to distinguish two entities with the same name but different entities or different parameters, and it is noted that the "first" and "second" are only used for convenience of expression, and should not be construed as limiting the embodiments of the present invention, and the following embodiments are not described one by one.
Based on the above object, a first aspect of the embodiments of the present invention proposes an embodiment of a method of detecting a server cable. Fig. 1 is a schematic diagram of an embodiment of a method for detecting a server cable provided by the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, determining whether a cable to be tested placed between a first component and a second component is a reference line sequence and meeting the one-to-one relationship of a pin at one end of the cable and a pin at the other end of the cable;
s2, responding to the fact that the cable to be tested is a reference line and the fact that a pin at one end of the cable and a pin at the other end of the cable are in one-to-one relation is met, and sending a first confirmation signal from a sideband channel to a second component by the first component;
s3, responding to the first confirmation signal received by the second component, and sequentially detecting whether each differential channel of the cable to be tested is conducted or not; and
and S4, responding to the conduction of all the differential channels, and confirming the conduction of the cable to be tested.
In the embodiment of the invention, the FPGA (Field Programmable Gate Array ) is used as a component for illustration, but the component is not limited, and other components with rich IO resources are all within the protection scope of the invention.
The embodiment of the invention also discloses a high-speed cable detection device, which integrates an FPGA module on a detection carrier plate and designs a unique IO ID code, wherein two groups of FPGAs are interconnected through a high-speed cable, and the two groups of FPGAs are connected according to different modes: the bandwidth, parallel mode and single traversal mode are automatically negotiated, the data sending/receiving, encoding/decoding actions are completed, the detection data are reported to the LabVIEW upper computer through the Ethernet by one of the FPGA, and the LabVIEW upper computer is responsible for controlling the whole detection process. Fig. 2 is a schematic topological block diagram of server cable detection. As shown in fig. 2, the detection device mainly comprises a detection carrier plate 1 and a LabVIEW upper computer software module 2. As shown in fig. 2, 10 groups of cable detection units 1/2/…/9/10 with the same specification are integrated on a PCB board, and 10 groups of operations can be executed at a time, each group of cable detection units is composed of 2 FPGAs and high-speed connector ports, and is a main part for completing detection logic; and a 100M Ethernet exchange chip module is integrated on the detection carrier plate, 10 100M Ethernet interfaces are designed to be respectively connected with 10 cable detection units in a butt joint mode, 1 100M Ethernet interface is designed to be connected with an external LabVIEW upper computer in a butt joint mode, and data exchange and data forwarding are completed. The LabVIEW upper computer software module is interconnected with the cable detection carrier plate through RJ45 wires and has the main functions of controlling detection program execution, detection data collection and display, original data comparison and data storage and output.
Fig. 3 is a schematic diagram of a cable detection unit interconnection topology. As shown in fig. 3, the cable detection unit includes a first FPGA (FPGA module 1 in the drawing) and a second FPGA (FPGA module 2 in the drawing). The design interconnection signal between first FPGA and the second FPGA includes: two GPIOs (General Purpose Input/Output ) are used for communication start-stop control between FPGAs; the SPI (Serial Peripheral Interface ) is used for the FPGA module 2 to inform the FPGA module 1 of the type of the current cable detection port and the working mode; the FPGA module 2 is also responsible for packaging the test data and sending the test data to the host computer through the ethernet interface.
Detect the inside, outside high-speed interconnection cable connector terminal of server that has designed commonly used on the carrier plate, include: upright and right angle bend slimline x4/x8 cable connector terminals; internal, upright, and right angle bent MiniSAS HD x16 cable connector terminals; external MiniSAS HD x16 cable connector terminals.
The cable connector terminals IO are connected with the FPGA GPIO, wherein the definition of the slimline signals of the x4 type is consistent, the slimline signals and the FPGA GPIO can be cascaded, the slimline x8 and the internal MiniSAS HD x16 are also cascaded, and the purpose is that the occupation amount of the FPGA IO can be reduced by the same definition.
The two FPGA modules adopt a symmetrical design mode respectively, and the two FPGA modules are connected by the cable to be tested. Before each test starts, an upper computer sends an instruction to the FPGA module 2 to select the type of the test cable.
The present embodiment is described below with reference to fig. 2 and 3:
the wire to be tested is placed between the first component and the second component, and whether the wire to be tested is in a reference line sequence is determined, and the fact that the pins at one end of the wire and the pins at the other end of the wire are in a one-to-one relationship is met. That is, the cable to be tested is placed between the first FPGA and the second FPGA, and before each cable testing, the type of the cable to be tested and the related parameters of the cable, such as whether the cable is in a reference line sequence, and whether the pin at one end of the cable is in a one-to-one relationship with the pin at the other end of the cable, can be known.
In response to the wire under test being a reference wire and satisfying a one-to-one relationship of a pin at one end of the wire with a pin at the other end of the wire, the first component sends a first acknowledgement signal from the sideband channel to the second component. When the cable to be tested is a reference wire and satisfies that the pins at one end of the cable are in one-to-one relationship with the pins at the other end of the cable, an auto-negotiation bandwidth mode may be employed. The first FPGA will send level "1" directly to the side signal, and the second FPGA will consider the side to be on when receiving level "1".
In response to the second component receiving the first acknowledgement signal, sequentially detecting whether each differential channel of the cable under test is conductive.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: the first component sends a second acknowledgement signal from the first differential channel to the second component, and judges whether the second component receives the second acknowledgement signal.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: in response to the second component receiving the second acknowledgement signal, the second component sends a third acknowledgement signal to the first component and determines whether the first component received the third acknowledgement signal.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: in response to the first component receiving the third acknowledgement signal, continuing to detect a next differential lane. For RX and TX signals, the first FPGA sends a level "1" on a TX1 channel, if the second FPGA receives the level "1" through RX1 correctly, the second FPGA continues to send the level "1" on the TX1 channel, and if the first FPGA receives the level "1" through RX1 correctly, the TX1 channel is in a conducting state.
And in response to all the differential channels being conducted, confirming that the cable to be tested is conducted. And if some RX/TX fails to normally receive data in the middle, ending the detection, and sending the data result to the upper computer for processing by the second FPGA.
In some embodiments, further comprising: in response to the to-be-measured cable not being a reference wire but satisfying a one-to-one relationship of a pin at one end of the cable with a pin at the other end of the cable, the first component transmitting acknowledgement data with a pin code to the second component; and responding to the second component to receive the confirmation data, analyzing the confirmation data, and judging whether the cable is conducted or not based on the analyzed data.
If the cable sequence of the cable is not a standard cable, but the pin at one end of the cable and the pin at the other end of the cable are in one-to-one relation, a parallel mode can be adopted. At this time, the first FPGA outputs a data byte sequence with a certain format on each connector port pin (pin), which includes a start/end code and an encoding of the IO/pin, and the second FPGA is responsible for receiving and decoding the data on each pin and recording the data, and since the FPGAs IO can be processed in multiple parallel, the cable channels do not affect each other.
In some embodiments, the determining whether the cable is conductive based on the parsed data includes: and matching the analyzed pin codes with the pin codes of the first component, and judging whether the pin codes which are not successfully matched exist. If there is a pin code that does not match successfully, it is an indication that there is a non-conductive portion in the cable under test.
In some embodiments, further comprising: and in response to the to-be-tested cable is not a reference line and does not meet the requirement that the pins at one end of the cable and the pins at the other end of the cable are in one-to-one relation, the first FPGA sequentially sends the confirmation data of each pin, and the second FPGA receives and analyzes each confirmation data. If the cable is a cable to be tested, the specific information is not known, and whether the pin at one end of the cable and the pin at the other end of the cable are in one-to-one relation is not clear because the wire sequence is unknown, and the condition that one pin at one end of the cable corresponds to a plurality of pins of the cable exists. In this scenario, the first FPGA sequentially outputs a data byte sequence of a certain format on each pin of each connector port each time, and the second FPGA is responsible for receiving and decoding the data on each pin and recording the data. After all the pins are detected, if unmatched pins exist, the cable to be tested is not conducted.
LabVIEW upper computer software module composition and software execution flow:
(1) The Ethernet port data processing module calls TCP (Transmission Control Protocol )/IP (Internet Protocol, internet protocol) functions, takes charge of issuing control instructions of an upper computer and analyzing and storing received data returned by the FPGA module.
(2) The detection control and data display module is responsible for completing the functions of selecting a detection mode, detecting the cable type and starting and stopping control, and displaying the received return data on a window interface in an array mode;
(3) The original data and comparison module is used for calling an excel file opening function, reading excel file data typeset according to a certain format, comparing the read cable terminal line sequence relation with the received array, and displaying a comparison result;
(4) And the data storage module is responsible for storing the received cable data result and outputting the cable data result to an excel file, so that the detection result can be stored and archived conveniently.
The embodiment fully utilizes the characteristics of abundant FPGA IO resources and flexible programming, develops cable connectivity detection mechanisms with different modes according to the needs of different applications, has strong universality, avoids the problem of repeated development of a test fixture/test environment due to special cable sequences, and greatly simplifies the test development and detection processes of common high-speed cables; in addition, the LabVIEW software development environment is adopted to develop the upper computer module, the human-computer interaction interface is high in visualization, the conventional development assembly is called, independent development of different detection function interfaces can be realized, the function expansion is convenient, and meanwhile, functions such as excel and data comparison can be output on detection data, so that the detection result can be conveniently archived.
It should be noted that, the steps in the embodiments of the method for detecting a server cable may be intersected, replaced, added and deleted, so that the method for detecting a server cable by using the reasonable permutation and combination should also belong to the protection scope of the present invention, and the protection scope of the present invention should not be limited to the embodiments.
Based on the above object, a second aspect of the embodiments of the present invention provides a system for detecting a server cable, including: a reference module configured to determine whether the wire to be measured placed between the first member and the second member is a reference wire and satisfies a one-to-one relationship of a pin at one end of the wire and a pin at the other end of the wire; a first detection module configured to cause the first component to transmit a first acknowledgement signal from a sideband channel to the second component in response to the wire under test being a reference wire and satisfying a one-to-one relationship of a pin at one end of the wire with a pin at the other end of the wire; the second detection module is configured to respond to the first confirmation signal received by the second component and sequentially detect whether each differential channel of the cable to be tested is conducted or not; and the display module is configured for responding to the conduction of all the differential channels and confirming the conduction of the cable to be tested.
In some embodiments, the second detection module is configured to: the first component sends a second acknowledgement signal from the first differential channel to the second component, and judges whether the second component receives the second acknowledgement signal.
In some embodiments, the second detection module is configured to: in response to the second component receiving the second acknowledgement signal, the second component sends a third acknowledgement signal to the first component and determines whether the first component received the third acknowledgement signal.
In some embodiments, the second detection module is configured to: in response to the first component receiving the third acknowledgement signal, continuing to detect a next differential lane.
In some embodiments, the system further comprises: a third detection module configured to send, to the second component, confirmation data with a pin code in response to the to-be-measured cable not being a reference wire but satisfying a one-to-one relationship of a pin at one end of the cable and a pin at the other end of the cable; and responding to the second component to receive the confirmation data, analyzing the confirmation data, and judging whether the cable is conducted or not based on the analyzed data.
In some embodiments, the third detection module is configured to: and matching the analyzed pin codes with the pin codes of the first component, and judging whether the pin codes which are not successfully matched exist.
In some embodiments, the system further comprises: and the fourth detection module is configured to respond to the fact that the to-be-detected cable is not in a reference line sequence and does not meet the fact that pins at one end of the cable and pins at the other end of the cable are in one-to-one relation, and the first component sequentially sends confirmation data of each pin, receives and analyzes each confirmation data at the second component.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: s1, determining whether a cable to be tested placed between a first component and a second component is a reference line sequence and meeting the one-to-one relationship of a pin at one end of the cable and a pin at the other end of the cable; s2, responding to the fact that the cable to be tested is a reference line and the fact that a pin at one end of the cable and a pin at the other end of the cable are in one-to-one relation is met, and sending a first confirmation signal from a sideband channel to a second component by the first component; s3, responding to the first confirmation signal received by the second component, and sequentially detecting whether each differential channel of the cable to be tested is conducted or not; and S4, responding to the conduction of all the differential channels, and confirming the conduction of the cable to be tested.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: the first component sends a second acknowledgement signal from the first differential channel to the second component, and judges whether the second component receives the second acknowledgement signal.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: in response to the second component receiving the second acknowledgement signal, the second component sends a third acknowledgement signal to the first component and determines whether the first component received the third acknowledgement signal.
In some embodiments, the sequentially detecting whether each differential channel of the cable under test is conductive includes: in response to the first component receiving the third acknowledgement signal, continuing to detect a next differential lane.
In some embodiments, the steps further comprise: in response to the to-be-measured cable not being a reference wire but satisfying a one-to-one relationship of a pin at one end of the cable with a pin at the other end of the cable, the first component transmitting acknowledgement data with a pin code to the second component; and responding to the second component to receive the confirmation data, analyzing the confirmation data, and judging whether the cable is conducted or not based on the analyzed data.
In some embodiments, the determining whether the cable is conductive based on the parsed data includes: and matching the analyzed pin codes with the pin codes of the first component, and judging whether the pin codes which are not successfully matched exist.
In some embodiments, the steps further comprise: and in response to the to-be-tested cable is not in a reference line and does not meet the requirement that the pins at one end of the cable and the pins at the other end of the cable are in a one-to-one relationship, the first component sequentially sends the confirmation data of each pin, and receives and analyzes each confirmation data at the second component.
Fig. 4 is a schematic hardware structure of an embodiment of the above-mentioned computer device for detecting a server cable according to the present invention.
Taking the example of the apparatus shown in fig. 4, the apparatus includes a processor 301 and a memory 302, and may further include: an input device 303 and an output device 304.
The processor 301, memory 302, input device 303, and output device 304 may be connected by a bus or other means, for example in fig. 4.
The memory 302 is used as a non-volatile computer readable storage medium, and may be used to store a non-volatile software program, a non-volatile computer executable program, and a module, such as program instructions/modules corresponding to the method for detecting a server cable in the embodiments of the present application. The processor 301 executes various functional applications of the server and data processing, that is, implements the method of detecting a server cable of the above-described method embodiment, by running nonvolatile software programs, instructions, and modules stored in the memory 302.
The input device 303 may receive input information such as a user name and a password. The output device 304 may include a display device such as a display screen.
Program instructions/modules corresponding to one or more methods of detecting a server cable are stored in memory 302, which when executed by processor 301, perform the method of detecting a server cable in any of the method embodiments described above.
Any one embodiment of a computer device that performs the above method for detecting a server cable may achieve the same or similar effects as any one of the method embodiments described above.
The invention also provides a computer readable storage medium storing a computer program which when executed by a processor performs the method as above.
Finally, it should be noted that, as will be understood by those skilled in the art, all or part of the processes in the methods of the embodiments described above may be implemented by a computer program to instruct related hardware, and the program of the method for detecting a server cable may be stored in a computer readable storage medium, and the program may include the processes of the embodiments of the methods described above when executed. The storage medium of the program may be a magnetic disk, an optical disk, a read-only memory (ROM), a random-access memory (RAM), or the like. The computer program embodiments described above may achieve the same or similar effects as any of the method embodiments described above.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that as used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The foregoing embodiment of the present invention has been disclosed with reference to the number of embodiments for the purpose of description only, and does not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program for instructing relevant hardware, and the program may be stored in a computer readable storage medium, where the storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will appreciate that: the above discussion of any embodiment is merely exemplary and is not intended to imply that the scope of the disclosure of embodiments of the invention, including the claims, is limited to such examples; combinations of features of the above embodiments or in different embodiments are also possible within the idea of an embodiment of the invention, and many other variations of the different aspects of the embodiments of the invention as described above exist, which are not provided in detail for the sake of brevity. Therefore, any omission, modification, equivalent replacement, improvement, etc. of the embodiments should be included in the protection scope of the embodiments of the present invention.
Claims (10)
1. A method of detecting a server cable, comprising the steps of:
determining whether a wire to be measured placed between the first member and the second member is a reference wire and satisfies a one-to-one relationship of a pin at one end of the wire and a pin at the other end of the wire;
responsive to the wire under test being a reference wire and satisfying a one-to-one relationship of a pin at one end of the wire with a pin at the other end of the wire, the first component transmitting a first acknowledgement signal from a sideband channel to the second component;
in response to the second component receiving the first acknowledgement signal, sequentially detecting whether each differential channel of the cable to be tested is conducted; and
and responding to the conduction of all the differential channels, and confirming the conduction of the cable to be tested.
2. The method of claim 1, wherein sequentially detecting whether each differential channel of the cable under test is conductive comprises:
the first component sends a second acknowledgement signal from the first differential channel to the second component, and judges whether the second component receives the second acknowledgement signal.
3. The method of claim 2, wherein sequentially detecting whether each differential channel of the cable under test is conductive comprises:
in response to the second component receiving the second acknowledgement signal, the second component sends a third acknowledgement signal to the first component and determines whether the first component received the third acknowledgement signal.
4. A method according to claim 3, wherein said sequentially detecting whether each differential channel of the cable under test is conductive comprises:
in response to the first component receiving the third acknowledgement signal, continuing to detect a next differential lane.
5. The method as recited in claim 1, further comprising:
in response to the to-be-measured cable not being a reference wire but satisfying a one-to-one relationship of a pin at one end of the cable with a pin at the other end of the cable, the first component transmitting acknowledgement data with a pin code to the second component; and
and responding to the second component to receive the confirmation data, analyzing the confirmation data, and judging whether the cable is conducted or not based on the analyzed data.
6. The method of claim 5, wherein determining whether the cable is conductive based on the parsed data comprises:
and matching the analyzed pin codes with the pin codes of the first component, and judging whether the pin codes which are not successfully matched exist.
7. The method as recited in claim 1, further comprising:
and in response to the to-be-tested cable is not in a reference line and does not meet the requirement that the pins at one end of the cable and the pins at the other end of the cable are in a one-to-one relationship, the first component sequentially sends the confirmation data of each pin, and receives and analyzes each confirmation data at the second component.
8. A system for detecting a server cable, comprising:
a reference module configured to determine whether a wire to be measured placed between the first member and the second member is a reference wire and satisfies a one-to-one relationship of a pin at one end of the wire and a pin at the other end of the wire;
a first detection module configured to cause the first component to transmit a first acknowledgement signal from a sideband channel to the second component in response to the wire under test being a reference wire and satisfying a one-to-one relationship of a pin at one end of the wire with a pin at the other end of the wire;
the second detection module is configured to respond to the first confirmation signal received by the second component and sequentially detect whether each differential channel of the cable to be tested is conducted or not; and
and the display module is configured for responding to the conduction of all the differential channels and confirming the conduction of the cable to be tested.
9. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, which when executed by the processor, perform the steps of the method of any one of claims 1-7.
10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the method of any one of claims 1-7.
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| CN113740637B (en) * | 2021-07-28 | 2023-11-03 | 苏州浪潮智能科技有限公司 | Cable test fixture |
| CN113671419B (en) * | 2021-08-17 | 2024-05-24 | 杭州佳量医疗科技有限公司 | Line sequence testing method, device and system |
| CN113810071B (en) * | 2021-09-13 | 2022-07-22 | 上海星秒光电科技有限公司 | Self-adaptive line sequence adjusting method, device, equipment, system and storage medium |
| CN114006631B (en) * | 2021-09-17 | 2023-04-07 | 苏州浪潮智能科技有限公司 | Cable testing device and method based on code pattern signal verification |
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