CN109683960B - Register configuration method of electric port module and electric port module thereof - Google Patents
Register configuration method of electric port module and electric port module thereof Download PDFInfo
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Abstract
The invention provides a register configuration method of an electric port module and the electric port module, the register configuration method of the electric port module comprises the following steps: step S1, allocating an address for realizing the extended control parameter list in the MCU; step S2, real-time detection is carried out, when a control instruction of write operation or read operation is received, password verification is realized, and after the password verification is passed, the authority for realizing the write operation or the read operation to the extended control parameter table is obtained; in step S3, the MCU performs a write operation or a read operation on the PHY register according to the control command of the host write operation or the read operation, respectively. The invention realizes the function of reading and writing the PHY register by adding an extended control parameter table, and simultaneously adds the password protection function for the operation and control of the extended control parameter table, thereby meeting the register configuration requirements of switch manufacturers on the electric port module, expanding the application of the electric port module and having wide market prospect.
Description
Technical Field
The present invention relates to a register configuration method, and more particularly, to a register configuration method for an electrical interface module, and an electrical interface module using the register configuration method.
Background
The electrical port module is also called an optical port to electrical port module, is a photoelectric conversion optical module, is also a kind of module that can be frequently used in optical communication, and is widely used, for example, a 10G electrical port module. Since the 10G electrical port modules on the market are all used as a signal forwarding device, many switch manufacturers need to configure the PHY register of the 10G electrical port module to implement the special application.
The current electric module golden finger tip only provides I2C access interface, and PHY chip is usually accessed through MDIO, which makes host unable to normally pass I2The C interface is used for reading and writing the PHY register where the PHY chip is located, the PHY chip integrates a plurality of functions, the PHY chip register needs to be configured in some special applications, and the electric port module externally accesses the I2The C interface cannot meet this requirement.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a register configuration method capable of satisfying the PHY register configuration of 10G electrical interface modules, and further provide an electrical interface module using the register configuration method.
To this end, the present invention provides a register configuration method for an electrical interface module, comprising the following steps:
step S1, allocating an address for realizing the extended control parameter list in the MCU;
step S2, real-time detection is carried out, when a control instruction of write operation or read operation is received, password verification is realized, and after the password verification is passed, the authority for realizing the write operation or the read operation to the extended control parameter table is obtained;
in step S3, the MCU performs a write operation or a read operation on the PHY register according to the control command of the host write operation or the read operation, respectively.
A further refinement of the invention is that said step S3 comprises the following sub-steps:
step S301, receiving a control instruction of write operation or read operation of the host;
step S302, reading the state of the command prompt, when the state of the command prompt is any one of write operation, read operation or operation, not responding to the control instruction of the host, waiting until the state of the command prompt becomes idle or the instruction is finished, and then jumping to step S303;
step S303, processing the control instruction of the host.
A further refinement of the invention is that said step S303 comprises the following sub-steps:
step S3031, when the control instruction of the host computer is write operation, the state of the command prompt is changed into operation, and data is issued to a PHY register by simulating an MDIO protocol through an I/O interface, and the state of the command prompt is changed into instruction completion after the data transmission is finished;
step S3032, when the control command of the host is a read operation, changing the state of the command prompt into an operation, reading data from the PHY register through the I/O interface by simulating the MDIO protocol, and changing the state of the command prompt into a command complete after the data reading is finished.
A further improvement of the present invention is that the data issued during the write operation and the data read during the read operation both include a device address, a register address, data, and data bits corresponding to the execution operation.
A further improvement of the present invention is that, in step S1, a 128byte address is allocated in the MCU for implementing an extended control parameter table, where the address of the extended control parameter table is an address of 128 bits 255 in the optical module protocol, and when the address 127 in the optical module protocol is 0, the register configuration is skipped; when the address 127 in the optical module protocol is 3, a control instruction of a write operation or a read operation is received.
A further improvement of the present invention is that the address 132 and the address 133 of the extended control parameter table are viewing configuration addresses for enabling viewing of the current PHY register address configuration.
A further improvement of the present invention is that, the implementation process of step S3031 is to obtain the control instruction parameters according to the control instruction corresponding to the write operation, and write the device address, the register high order, the register low order, the data high order and the data low order data bits into the addresses 129 to 133 in sequence; and detecting whether the write-in operation is completed in real time, and changing the state of the command prompt into instruction completion after the data write-in operation is completed.
A further improvement of the present invention is that the step S3032 is implemented by obtaining control instruction parameters according to a control instruction corresponding to a read operation, sequentially writing data bits of an apparatus address, a register high bit and a register low bit into the addresses 129 to 131, detecting whether the read operation is completed in real time, changing the state of the command indicator to instruction completion after the data read operation is completed, and reading the data high bits and the data low bits corresponding to the addresses 132 to 133 as data bits.
The invention is further improved in that the MCU and the host computer are connected through I2And C, realizing data transmission.
The invention also provides an electric port module, which adopts the register configuration method of the electric port module.
Compared with the prior art, the invention has the beneficial effects that: the PHY register can be read and written in a mode of adding an extended control parameter table, and meanwhile, a password protection function is added for the operation and control of the extended control parameter table, if no password authority exists, the extended control parameter table cannot be read and written, and the PHY register cannot be configured; therefore, the host (switch) only needs to issue the corresponding control parameters according to the predefined control instruction, and the MCU executes the operation of reading and writing the PHY register according to the control instruction issued by the host, so that the register configuration requirement of a switch manufacturer on the electric port module is met, the application of the electric port module such as a 10G electric port module on the market is expanded, and the market prospect is wide.
Drawings
FIG. 1 is a schematic workflow diagram of one embodiment of the present invention;
FIG. 2 is a schematic diagram of a system architecture according to an embodiment of the present invention;
FIG. 3 is a diagram of an extended control parameter table according to an embodiment of the present invention;
fig. 4 is a schematic diagram illustrating an operation principle of implementing jump to the extended control parameter table according to an embodiment of the present invention.
Detailed Description
Preferred embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.
As shown in fig. 1 to 4, this embodiment provides a register configuration method for an electrical interface module, including the following steps:
step S1, allocating an address for realizing the extended control parameter list in the MCU;
step S2, real-time detection is carried out, when a control instruction of write operation or read operation is received, password verification is realized, and after the password verification is passed, the authority for realizing the write operation or the read operation to the extended control parameter table is obtained;
in step S3, the MCU performs a write operation or a read operation on the PHY register according to the control command of the host write operation or the read operation, respectively.
Step S3 in this example includes the following substeps:
step S301, receiving a control instruction of write operation or read operation of the host;
step S302, reading the state of the command prompt, when the state of the command prompt is any one of write operation, read operation or operation, not responding to the control instruction of the host, waiting until the state of the command prompt becomes idle or the instruction is finished, and then jumping to step S303;
step S303, processing the control instruction of the host.
The states of the command prompt in this example include: idle, write, read, in-operation, and instruction complete, where preferably 0 is set to idle, 1 is write, 2 is read, 3 is in-operation, and 4 is instruction complete. This command prompt, also called CMD, is an identifier of the command system. Device Addr represents the Device address, Reg High represents the register address High, Reg Low represents the register address Low, Value High represents the data High, and Value Low represents the data Low.
When the host writes the control parameters of the control command, the present embodiment preferentially reads the state of the command prompt, for example, when the command prompt is any one of 1, 2 and 3, that is, when the state of the command prompt is any one of write operation, read operation or operation, it indicates that the MCU is in a busy state, and at this time, the host command is not responded, thereby avoiding confusion of the control command and ensuring the stability of the system.
In step S1 of this example, a 128byte address is allocated in the MCU for implementing an extended control parameter table, which is also called an extended table Page03 for facilitating software implementation, as shown in fig. 3 and 4, the address of the extended control parameter table (extended table Page 03) is the address of 128-255 in the optical module protocol, that is, the address 128 to the address 255, and the format of the extended control parameter table refers to the optical module protocol (such as SFF-8472 protocol); when the address 127 in the optical module protocol is 0 (i.e. when a2.127 is 0, default is 0, and when the total table A2h high 128 bits point to Page 00), the register configuration is skipped; when the address 127 in the optical module protocol is 3, the high 128 bits of A2h point to the extended table Page03, and a control command for a write operation or a read operation is received.
As shown in FIG. 2, the MCU and the host computer pass through I in the embodiment2And C, realizing data transmission. I.e. the host in this example is an externally controlled host or switch, accessible through I2C write a2.127 = 3 can be switched to the extended table Page03, it should be mentioned that, in this embodiment, the second-level password is required for writing data into the extended table Page03 first, the password bit input is preferably the same as the SFF-8472 protocol password input address (address 123 and 126 of the general table A2 h), and data can be written into the extended table Page03 after the second-level authority is obtained. Of course, the secondary password is a preferable mode, such as 4-bit password, and in the implementation process, the checksum protection may be implemented by other password modes.
Step S303 in this example includes the following substeps:
step S3031, when the control instruction of the host computer is write operation, the state of the command prompt is changed into operation, and data is issued to a PHY register by simulating an MDIO protocol through an I/O interface, and the state of the command prompt is changed into instruction completion after the data transmission is finished; when the CMD is 0 or 4, the MCU can process data sent by the host, the host writes corresponding data bits of a PHY chip register, such as a device address, a register address, data, execution operation and the like, which need to be sent, if the MCU detects that the CMD is 1, the CMD parameter is set to 3, then the MDIO protocol is simulated through the I/O interface to send data to the PHY, the CMD value is set to 4 after the data is sent, the host can send the data again;
step S3032, when the control command of the host computer is read operation, the state of the command prompt is changed into operation, and the MDIO protocol is simulated through the I/O interface to read data from the PHY register, and the state of the command prompt is changed into command completion after the data reading is finished; that is, the host reads the PHY chip register and needs to send the device address, the register address, execute the corresponding data bits such as operation, if the MCU detects that CMD is 2, set the CMD parameter to 3, then send the read register data to the PHY through the I/O interface analog MDIO protocol, assign the read values to a2-Page03 address 132 (data high bit) and 133 (data low bit), and set the CMD value to 4 after the read data ends, which indicates that the execution is completed.
That is, step S3031 and step S3032 described in this example are steps for implementing two configurations, i.e., write operation and read operation, respectively, belonging to parallel steps rather than sequential steps.
The address 132 and the address 133 of the extended control parameter table in this example are viewing configuration addresses for implementing viewing of the current PHY register address configuration, and the host may take the a2-Page03 address 132 and the address 133 to view the configuration of the current PHY register address. In this example, the data issued during the write operation and the data read during the read operation both include a device address, a register address, data, and a data bit corresponding to the execution operation.
In this example, the implementation process of step S3031 is to obtain the control instruction parameters according to the control instruction corresponding to the write operation, and write the device address, the register high order, the register low order, the data high order and the data low order data bits into the addresses 129 to 133 in sequence; and detecting whether the write-in operation is completed in real time, and changing the state of the command prompt into instruction completion after the data write-in operation is completed.
For example, when the control command parameters of the write operation are Device address 1, Register (data bits of Register high order and Register low order bits) 0xC001, and value (data bits of data high order and data low order bits) 0xAA55, the whole process is as follows, the first, cut-to-extended table page03 writes a2.127 to 3, and the second, input password a2.123 writes a 4-bit password; third, the write address 129 is 1 (device addr, device address); fourth, write address 130 is 0xC0 (hexadecimal); fifth, write address 131 is 0x01 (hexadecimal); sixth, write address 132 is AA (hexadecimal); seventh, write address 133 is 55 (hexadecimal); eighth, write address 128 is 1; ninth, check whether CMD is 4, i.e. command execution complete.
The implementation process of step S3032 in this example is to obtain the control instruction parameters according to the control instruction corresponding to the read operation, sequentially write the device address, the high-order bit of the register, and the low-order bit of the register to the addresses 129 to 131, detect whether the read operation is completed in real time, change the state of the command indicator to instruction completion after the data read operation is completed, and read the high-order bit and the low-order bit of the data corresponding to the addresses 132 to 133 as the data bits.
For example, when the control command parameters of the read operation are Device (Device address): Device: 1, Register (data bits of Register high and Register low bits): 0xC001, and value (data bits of data high and data low bits): 0xAA55, the overall process is as follows, first, cut to extension table page03 writes a2.127 to 3; secondly, inputting a password A2.123 and writing a 4-bit password; third, the write address 129 is 1 (device addr, device address); fourth, write address 130 is 0xC0 (hexadecimal); fifth, write address 131 is 0x01 (hexadecimal); sixth, write address 128 is 2; seventh, check whether CMD is 4, read A2-Page03 address 132 and address 133 data as the high order and low order of address 1.C001, respectively, after CMD equals 4 to ensure a jump out of the expansion table Page 03.
The present embodiment further provides an electrical interface module, which adopts the register configuration method of the electrical interface module, so as to further implement the configuration of the PHY register. The PHY register is also called Ethernet PHY register, PHY is Physical interface transceiver, PHY is the abbreviation of Port Physical Layer, Chinese can also be called Port Physical Layer, and is a common abbreviation for OSI model Physical Layer.
To sum up, in this example, the PHY register is actually read and written by adding an extended control parameter table, and meanwhile, a password protection function is added for the operation of the extended control parameter table, and the PHY register cannot be configured because the extended control parameter table cannot be read and written without password authority; therefore, the host (switch) only needs to issue the corresponding control parameters according to the predefined control instruction, and the MCU executes the operation of reading and writing the PHY register according to the control instruction issued by the host, so that the register configuration requirement of a switch manufacturer on the electric port module is met, the application of the electric port module such as a 10G electric port module on the market is expanded, and the market prospect is wide.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (5)
1. A register configuration method of an electrical port module is characterized by comprising the following steps:
step S1, allocating an address for realizing the extended control parameter list in the MCU;
step S2, real-time detection is carried out, when a control instruction of write operation or read operation is received, password verification is realized, and after the password verification is passed, the authority for realizing the write operation or the read operation to the extended control parameter table is obtained;
step S3, the MCU executes the write operation or read operation to the PHY register according to the control instruction of the host computer write operation or read operation;
in step S1, allocating a 128byte address in the MCU for implementing an extended control parameter table, where the address of the extended control parameter table is an address of 128-255 in the optical module protocol, and when the address 127 in the optical module protocol is 0, skipping the register configuration; when the address 127 in the optical module protocol is 3, receiving a control instruction of write operation or read operation;
the host is an externally controlled host or switch, passing through I2C write A2.127 = 3 is switched to an expansion table Page03, a secondary password is needed for writing data into the expansion table Page03, the password bit input is the same as the SFF-8472 protocol password input address, and data are written into the expansion table Page03 after secondary authority is obtained; the step S3 includes the following sub-steps:
step S301, receiving a control instruction of write operation or read operation of the host;
step S302, reading the state of the command prompt, when the state of the command prompt is any one of write operation, read operation or operation, not responding to the control instruction of the host, waiting until the state of the command prompt becomes idle or the instruction is finished, and then jumping to step S303;
step S303, processing a control instruction of the host;
the states of the command prompt include: idle, write operation, read operation, in-operation and instruction completion, wherein a command prompt 0 is set to be idle, a command prompt 1 is set to be write operation, a command prompt 2 is set to be read operation, a command prompt 3 is set to be in-operation, and a command prompt 4 is set to be instruction completion;
the step S303 includes the following substeps:
step S3031, when the control instruction of the host is write operation, changing the state of the command prompt into operation, acquiring the control instruction parameter according to the control instruction corresponding to the write operation, issuing data to the PHY register by simulating the MDIO protocol through the I/O interface, and writing the data bits of the equipment address, the register high order, the register low order, the data high order and the data low order in sequence from the address 129 to the address 133; detecting whether the write-in operation is finished in real time, and changing the state of the command prompt into command completion after the data transmission is finished;
step S3032, when the control instruction of the host is a read operation, changing the state of the command indicator into an operation, obtaining a control instruction parameter according to the control instruction corresponding to the read operation, simulating an MDIO protocol through an I/O interface to read data from a PHY register, sequentially writing data bits of an equipment address, a register high bit, and a register low bit to the addresses 129 to 131, detecting whether the read operation is completed in real time, changing the state of the command indicator into an instruction completion after the data reading is completed, and reading data of the address 132 and the address 133 of the extended table Page03 as the high bit and the low bit of the data bit, respectively, so as to ensure a jump from the extended table Page 03.
2. The method according to claim 1, wherein the data issued during the write operation and the data read during the read operation each include a device address, a register address, data, and data bits corresponding to the execution operation.
3. The register configuration method of an electrical interface module according to claim 1 or 2, wherein the address 132 and the address 133 of the extended control parameter table are viewing configuration addresses for enabling viewing of the current PHY register address configuration.
4. Method for configuring a register of an electrical interface module according to claim 1 or 2, characterized in that the MCU and the host are connected via I2And C, realizing data transmission.
5. An electrical interface module, characterized in that the electrical interface module employs the register configuration method of the electrical interface module according to any one of claims 1 to 4.
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