CN112271187B - Backside structure of backside-illuminated EMCCD (electronic charge coupled device) and manufacturing method thereof - Google Patents
Backside structure of backside-illuminated EMCCD (electronic charge coupled device) and manufacturing method thereof Download PDFInfo
- Publication number
- CN112271187B CN112271187B CN202011026600.7A CN202011026600A CN112271187B CN 112271187 B CN112271187 B CN 112271187B CN 202011026600 A CN202011026600 A CN 202011026600A CN 112271187 B CN112271187 B CN 112271187B
- Authority
- CN
- China
- Prior art keywords
- layer
- emccd
- electrode
- region
- resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 37
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 37
- 239000010703 silicon Substances 0.000 claims abstract description 37
- 229910052751 metal Inorganic materials 0.000 claims abstract description 28
- 239000002184 metal Substances 0.000 claims abstract description 28
- 238000003860 storage Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 229910052796 boron Inorganic materials 0.000 claims abstract description 8
- -1 boron ions Chemical class 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 24
- 230000008569 process Effects 0.000 claims description 23
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052782 aluminium Inorganic materials 0.000 claims description 15
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 15
- 238000001259 photo etching Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 10
- 238000005224 laser annealing Methods 0.000 claims description 8
- 235000012239 silicon dioxide Nutrition 0.000 claims description 8
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- 230000003321 amplification Effects 0.000 claims description 7
- 238000001704 evaporation Methods 0.000 claims description 7
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 7
- 150000002500 ions Chemical class 0.000 claims description 6
- 238000001465 metallisation Methods 0.000 claims description 6
- 229920000642 polymer Polymers 0.000 claims description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 5
- 238000002347 injection Methods 0.000 claims description 5
- 239000007924 injection Substances 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 3
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 3
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 3
- ORUIBWPALBXDOA-UHFFFAOYSA-L magnesium fluoride Chemical compound [F-].[F-].[Mg+2] ORUIBWPALBXDOA-UHFFFAOYSA-L 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 2
- 230000003760 hair shine Effects 0.000 claims description 2
- 238000004528 spin coating Methods 0.000 claims description 2
- 238000001514 detection method Methods 0.000 abstract description 6
- 230000035945 sensitivity Effects 0.000 abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 4
- 229920005591 polysilicon Polymers 0.000 abstract description 4
- 238000005516 engineering process Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000002513 implantation Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 3
- 230000004297 night vision Effects 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Light Receiving Elements (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention relates to a back-illuminated EMCCD back structure and a manufacturing method thereof, wherein the back of a high-resistance epitaxial silicon layer (8) is provided with a P+ layer (13), and an antireflection film (14) is evaporated; a P+ electrode contact region (15 b) implanted with boron ions is formed on the P+ layer (13), and a metallized electrode (16) is arranged on the back of the EMCCD and is in contact with the P+ electrode contact region; and the anti-reflection film, the P+ layer and the high-resistance epitaxial silicon layer are exposed out of the two sides of the EMCCD front metal lead electrode (6). The metallized electrode and the P+ electrode contact area manufactured by the invention form a metallized ohmic contact electrode, and a low-resistance channel is introduced into the back surfaces of the EMCCD storage area, the horizontal shift register and the multiplication register, so that the problem that the charge transfer efficiency of the millimeter-sized area array MOS unit is reduced under the drive of the clock pulse of the front polysilicon gate electrode after the back-illuminated EMCCD low-resistance substrate is removed is solved, the detection sensitivity of the device is improved, and the technology is easy to realize and has high compatibility.
Description
Technical Field
The invention relates to a back structure of a back-illuminated EMCCD and a manufacturing method thereof, belonging to the technical field of charge coupled devices.
Background
EMCCD (Electron Multiply Charge Coupled Device) is an all-solid-state low-light imaging device capable of improving night vision detection capability through charge multiplication, and is a high-end photoelectric detection product with extremely high sensitivity in the detection field. The EMCCD has the characteristics of low noise, high sensitivity, high dynamic range, high quantum efficiency and the like, and has great advantages in low-light night vision.
The back-illuminated EMCCD has the advantages that the light is incident from the back surface of the chip, the thickness of the chip substrate and the back surface are processed, the influence of absorption and reflection of the semitransparent polysilicon electrode on the surface of the front-illuminated chip is reduced, the spectral response range and the quantum efficiency of an EMCCD device can be improved, and the peak value can reach more than 90%. Therefore, in high-performance EMCCD products, a back-illuminated structure is commonly adopted, and at the same time, a back-illuminated technology is also used for preparing CMOS image sensors.
In order to improve the end band quantum conversion efficiency of the back-illuminated EMCCD, the back-side high-concentration substrate silicon needs to be removed, leaving behind a low-doped silicon layer. After the back substrate is removed, the charge is delayed to rise under the coupling of the gate electrode clock signal due to the large (millimeter level) area array of the device, and the charge transfer efficiency is reduced.
Disclosure of Invention
The invention provides a backside structure of a backside-illuminated EMCCD and a manufacturing method thereof, which are used for solving the problem of reduced charge transfer efficiency caused by removing heavily doped substrate silicon in an EMCCD backside-illuminated process.
The technical scheme adopted by the invention is as follows:
the back structure of the back-illuminated EMCCD comprises the existing front-illuminated EMCCD structure, and mainly comprises the following parts: the front of high-resistance epitaxial silicon layer is equipped with photosensitive region, storage area, horizontal shift register, multiplication district and output amplification district, openly P+ contact area, openly metal lead electrode and aluminium photophobic layer, and EMCCD shines the surface before and is equipped with silica oxide layer, its characterized in that:
the back of the high-resistance epitaxial silicon layer is provided with a P+ layer, and the thickness of the P+ layer is 50 nm-200 nm;
evaporating an antireflection film on the back surface of the P+ layer;
a P+ electrode contact area with boron ion injection is arranged on the P+ layer, and the P+ electrode contact area covers a storage area, a horizontal shift register, a multiplication register and an output amplifier;
a metallized electrode is arranged on the back of the EMCCD, and the metallized electrode is contacted with the P+ electrode contact region and covers the P+ contact layer;
and the anti-reflection film, the P+ layer and the high-resistance epitaxial silicon layer are exposed from two sides of the EMCCD front metal lead electrode.
The invention also provides a manufacturing method of the back structure of the back-illuminated EMCCD, which comprises the following steps:
1) An EMCCD front-end wafer for completing the front-end process, comprising: the high-resistance epitaxial silicon layer is arranged on the low-resistance substrate silicon layer, the photosensitive region, the storage region, the horizontal shift register, the multiplication region, the output amplification region, the front P+ contact region and the front metal lead electrode are arranged on the high-resistance epitaxial silicon layer, and the aluminum photophobic layer is also arranged and covers the storage region, the horizontal shift register, the multiplication region and the output amplification region;
2) Carrying out surface medium planarization on the front side of the EMCCD front-illuminated wafer, and depositing an oxide layer through silicon dioxide, wherein the thickness is 4-6 mu m;
3) Spin-coating a polymer layer (such as BCB and PI) on the surface of the wafer oxide layer before the EMCCD, and bonding a layer of bonding substrate (such as a silicon wafer and a quartz wafer) on the polymer layer through a wafer bonding process, wherein the bonding substrate is used as a thinned supporting sheet;
4) Removing the low-resistance layer on the back of the EMCCD front-illuminated wafer by thinning, wherein the thickness of the residual high-resistance epitaxial silicon layer is 10-20 mu m;
5) The back of the high-resistance epitaxial silicon layer is subjected to low-energy ion boron implantation, the energy is 0.2 KeV-10 KeV, the dosage is 1E 14-1E 15, and then a P+ layer is formed on the back of the EMCCD by adopting a laser annealing process, wherein the thickness of the P+ layer is 50 nm-200 nm;
6) Evaporating an antireflection film on the P+ layer on the back of the EMCCD, wherein the material is one or a combination of hafnium oxide, magnesium difluoride, silicon dioxide and aluminum oxide;
7) Photoetching a contact area window of a metalized electrode on the antireflection film, etching the window to remove the antireflection film to a P+ layer, wherein the contact area window of the electrode covers a storage area, a horizontal shift register, a multiplication register and an output amplifier, and the boundary of the contact area is 10-100 microns away from a pixel unit of the photosensitive area in a boundary area between the photosensitive area and the storage area;
8) In the electrode contact area window, boron is injected by using low-energy large beam ions to form P+ electrode contact, the P+ electrode contact area goes deep into the high-resistance silicon layer, the injection energy is 10 KeV-80 KeV, and the injection dosage is 1E 14-5E 15;
9) Carrying out local laser annealing on the P+ electrode contact region to enable the junction depth of the P+ electrode contact region to be 0.15-2 mu m;
10 Evaporating a metal aluminum shielding layer on the back antireflection film of the EMCCD, wherein the thickness of the metal aluminum shielding layer is 0.2-1 mu m;
11 Etching the metal aluminum shielding layer by photoetching, wherein the formed back surface metallized electrode is contacted with the P+ electrode contact area, and the width of the back surface metallized electrode covers the P+ electrode contact area and exceeds 10-100 mu m;
12 Etching the antireflection film, the P+ region and the high-resistance epitaxial silicon layer on two sides by photoetching to release the metal lead electrode on the front surface of the EMCCD;
13 By low temperature H 2 、N 2 Or the mixed gas of the two is annealed at the temperature of 150-450 ℃ for 30-120 min, so that damage in the technical process is repaired, and the ohmic contact characteristic of the contact area between the back metal electrode and the P+ electrode is increased.
In the technical scheme of the invention, the substrate metallization electrode structure is prepared by adopting the back metal light-shielding layer, and the low-resistance channel is introduced below the EMCCD storage area, the horizontal shift register and the multiplication register, so that the defects are greatly improved, the detection sensitivity of the device is improved, and meanwhile, the process is easy to realize and has high compatibility.
The invention forms a metallized ohmic contact electrode by utilizing the back light shielding layer of the back-illuminated EMCCD and silicon, and is realized by utilizing the processes of photoetching, etching, ion implantation, laser annealing and the like, and a low-resistance channel is introduced into the back surfaces of an EMCCD storage area, a horizontal shift register and a multiplication register, so that the charge transfer efficiency under the clock pulse driving of a front polysilicon gate electrode is improved. And after the front process of the EMCCD is finished, wafer-level bonding is carried out, then the EMCCD wafer is thinned, heavily doped substrate silicon is removed, then a back self-built electric field region is formed by adopting low-energy ion implantation and laser annealing, a layer of antireflection film is evaporated on the back of the EMCCD by adopting an electron beam evaporation process, a storage area, a horizontal shift register and a multiplication register are removed by adopting a photoetching and etching process, then P+ ion implantation and local laser annealing are carried out, an aluminum shielding layer is evaporated, a light shielding area is defined by adopting a photoetching etching process, a back metallized electrode is formed, a metal pressure welding area is released by adopting a photoetching etching process, and the preparation of a back structure is completed.
The invention utilizes the back light shielding layer 16 of the back-illuminated EMCCD and the P+ doped silicon 15b to form the metallized ohmic contact electrode, and introduces the low-resistance channel at the back of the EMCCD storage area, the horizontal shift register and the multiplication register, thereby solving the problem that the charge transfer efficiency of the millimeter-sized area array MOS unit is reduced under the clock pulse drive of the front polysilicon gate electrode after the back-illuminated EMCCD low-resistance substrate 9 is removed, thereby improving the detection sensitivity of the device, and simultaneously being easy to realize the process and high in compatibility.
Drawings
FIG. 1 is a cross-sectional view of an EMCCD wafer completing a frontside process;
FIG. 2 is a cross-sectional view of the EMCCD front side dielectric after planarization;
FIG. 3 is a cross-sectional view of the bonded substrate after bonding with a front side medium;
FIG. 4 is a cross-sectional view of the back side of the EMCCD wafer after thinning;
fig. 5 is a cross-sectional view of the backside p+ layer after formation;
FIG. 6 is a cross-sectional view of the back side antireflection film after formation;
fig. 7 is a cross-sectional view of the p+ contact window after formation;
fig. 8 is a cross-sectional view of the p+ contact region after implantation;
fig. 9 is a cross-sectional view of the p+ contact region after annealing activation;
FIG. 10 is a cross-sectional view of the backside metal shield after formation;
FIG. 11 is a cross-sectional view of the rear metalized electrode after formation;
fig. 12 is a cross-sectional view of the EMCCD after the front metal bond pads are released.
Detailed Description
After the front-side process of the EMCCD chip is completed, the fabrication of the back-side structure is performed according to the following specific and detailed steps:
1) The EMCCD wafer finished with the front-side illumination process is shown in fig. 1, wherein 1 is a photosensitive area, 2 is a storage area, 3 is a horizontal shift register, 4 is a multiplication area and an output amplification area, 5 is a front-side P+ contact area, 6 is a front-side metal lead electrode, 7 is an aluminum light-shielding layer, 8 is a high-resistance epitaxial silicon layer, and 9 is a low-resistance substrate silicon layer;
2) As shown in fig. 2, the surface medium planarization is carried out on the EMCCD front-illuminated wafer, the surface step is reduced through the silicon dioxide deposition and chemical mechanical polishing process, and the thickness of the oxide layer 10 on the surface of the EMCCD wafer is 4-6 mu m;
3) As shown in fig. 3, bonding is completed between an EMCCD front-end wafer and a bonding substrate 12 (e.g., a silicon wafer, a quartz wafer) through a polymer layer 11 (e.g., BCB, PI) wafer bonding process, wherein the thickness of the polymer layer 11 is 3 μm to 5 μm, and the bonding substrate 12 is used as a thinned supporting sheet;
4) As shown in fig. 4, thinning the back low-resistance layer 9 of the EMCCD wafer, removing the low-resistance layer, and forming the remaining high-resistance epitaxial silicon layer 8 with a thickness of 10-20 μm;
5) As shown in fig. 5, boron is injected by low-energy ions, the energy is 0.2-10 KeV, the dosage is 1E 14-1E 15, and then a P+ region 13 is formed on the back of the EMCCD by a laser annealing process, and the thickness is 50-200 nm;
6) As shown in fig. 6, an antireflection film 14 is deposited on the back of the EMCCD, and the material is one or a combination of hafnium oxide, magnesium difluoride, silicon dioxide and aluminum oxide;
7) As shown in fig. 7, the back metallization electrode contact area window 15a is etched to remove the antireflection film to the silicon layer, the electrode contact area window covers the areas of the storage area, the horizontal shift register, the multiplication register, the output amplifier and the like, in the interface area between the photosensitive area and the storage area, the boundary of the contact area is 10 micrometers-100 micrometers away from the pixel unit of the photosensitive area, and the etching antireflection film is stopped at the silicon layer;
8) As shown in fig. 8, boron is implanted into the low-energy large-beam ion to form a p+ electrode contact region 15b, the implantation energy is 10kev to 80kev, and the implantation dose is 1e14 to 5e15;
9) As shown in fig. 9, the p+ electrode contact region 15b is locally laser annealed to a junction depth of 0.15 μm to 2 μm;
10 As shown in FIG. 10, a metal aluminum shielding layer 16a is evaporated on the back of the EMCCD, and the thickness is 0.2-1 mu m;
11 As shown in fig. 11, the back light shielding layer and the back metallization electrode 16 are formed by photolithography, and the metallization electrode 16 covers the p+ electrode contact region 15b and exceeds 10 μm to 100 μm;
12 As shown in fig. 12, the antireflection film 14, the p+ region 13 and the high-resistance epitaxial silicon layer 8 are etched by photoetching to release the metal bonding region 6 on the front surface of the EMCCD;
13)by low temperature H 2 、N 2 Or the two are annealed at the temperature of 150-450 ℃ for 30-120 min, so as to repair the damage in the process, and meanwhile, the ohmic contact characteristic of the back metal electrode 16 and the P+ electrode contact region 15b is improved.
Claims (2)
1. The back structure of the back-illuminated EMCCD comprises the existing front-illuminated EMCCD structure, and consists of the following parts: high resistance
The front of epitaxial silicon layer (8) is equipped with photosensitive region (1), storage area (2), horizontal shift register (3), multiplication district and output amplification district (4), openly P+ contact area (5), openly metal lead electrode (6) and aluminium light-resistant layer (7), and EMCCD shines the surface before and is equipped with silica oxide layer (10), its characterized in that:
the back of the high-resistance epitaxial silicon layer (8) is provided with a P+ layer (13) with the thickness of 50 nm-200 nm;
evaporating an antireflection film (14) on the back surface of the P+ layer (13);
a P+ electrode contact region (15 b) implanted with boron ions is arranged on the P+ layer (13), and the P+ electrode contact region (15 b) covers the storage region (2), the horizontal shift register (3), the multiplication register (4) and the output amplifier;
a metallized electrode (16) is arranged on the back of the EMCCD, and is contacted with the P+ electrode contact region (15 b) and covers the P+ contact layer (15 b);
the anti-reflection film (14), the P+ layer (13) and the high-resistance epitaxial silicon layer (8) are exposed out of the metal lead electrode (6) on the front surface of the EMCCD;
and evaporating a metal aluminum shielding layer (16 a) on the back antireflection film (14) of the EMCCD, photoetching the metal aluminum shielding layer (16 a), and contacting the formed back metalized electrode (16) with the P+ electrode contact region (15 b).
2. The method for manufacturing the back structure of the back-illuminated EMCCD according to claim 1, comprising the following steps:
1) An EMCCD front-end wafer for completing the front-end process, comprising: the low-resistance substrate silicon layer (9), the high-resistance epitaxial silicon layer (8) is arranged on the low-resistance substrate silicon layer (9), the photosensitive region (1), the storage region (2), the horizontal shift register (3), the multiplication region and the output amplification region (4), the front P+ contact region (5) and the front metal lead electrode (6) are arranged on the high-resistance epitaxial silicon layer (8), and the aluminum photophobic layer (7) is also arranged to cover the storage region (2), the horizontal shift register (3), the multiplication region and the output amplification region (4);
2) Surface dielectric planarization of the front side of the EMCCD front side wafer is performed by depositing an oxide layer (10) through silicon dioxide, thickness
4μm~6μm;
3) Spin-coating a polymer layer (11) on the surface of the wafer oxide layer (10) before the EMCCD, and bonding a layer of bonding substrate (12) on the polymer layer (11) through a wafer bonding process, wherein the bonding substrate is used as a thinned supporting sheet;
4) Removing the low-resistance layer (9) on the back of the EMCCD front-illuminated wafer by thinning, wherein the thickness of the residual high-resistance epitaxial silicon layer (8) is 10-20 mu m;
5) The back surface of the high-resistance epitaxial silicon layer (8) is boron-implanted with low energy ion, the energy is 0.2 KeV-10 KeV, and the dosage is 1E 14-1E 15
Then, a laser annealing process is adopted to form a P+ layer (13) on the back of the EMCCD, and the thickness is 50 nm-200 nm;
6) Evaporating an antireflection film (14) on the P+ layer (13) on the back of the EMCCD, wherein the material is one or a combination of hafnium oxide, magnesium difluoride, silicon dioxide and aluminum oxide;
7) Photoetching a metal electrode contact area window (15 a) on the anti-reflection film (14), etching the window to remove the anti-reflection film to the P+ layer (13), wherein the electrode contact area window covers a storage area, a horizontal shift register, a multiplication register and an output amplifier, and the boundary of the contact area is 10-100 microns away from a pixel unit of the photosensitive area at the boundary area between the photosensitive area and the storage area;
8) In the electrode contact region window (15 a), boron is injected by using low-energy large-beam ions to form P+ electrode contact (15 b), the P+ electrode contact region (15 b) stretches into the high-resistance silicon layer 8, the injection energy is 10 KeV-80 KeV, and the injection dosage is 1E 14-5E 15;
9) Carrying out local laser annealing on the P+ electrode contact region (15 b) to enable the junction depth of the P+ electrode contact region (15 b) to be 0.15-2 mu m;
10 Evaporating a metal aluminum shielding layer (16 a) on the back antireflection film (14) of the EMCCD, wherein the thickness of the metal aluminum shielding layer is 0.2-1 mu m;
11 Photoetching the metal aluminum shielding layer (16 a), wherein the formed back surface metallization electrode (16) is contacted with the P+ electrode contact region (15 b), and the back surface metallization electrode (16) covers the P+ electrode contact region (15 b) in width and exceeds 10-100 mu m;
12 Etching the antireflection film (14), the P+ region (13) and the high-resistance epitaxial silicon layer (8) on two sides by photoetching to release the metal lead electrode (6) on the front surface of the EMCCD;
13 Through low-temperature H2, N2 or the mixed gas of the low-temperature H2 and the N2, the temperature is 150-450 ℃ and the time is 30-120 min, damage in the technical process is repaired, and meanwhile ohmic contact characteristics of the back metal electrode (16) and the P+ electrode contact area (15 b) are improved.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011026600.7A CN112271187B (en) | 2020-09-25 | 2020-09-25 | Backside structure of backside-illuminated EMCCD (electronic charge coupled device) and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011026600.7A CN112271187B (en) | 2020-09-25 | 2020-09-25 | Backside structure of backside-illuminated EMCCD (electronic charge coupled device) and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN112271187A CN112271187A (en) | 2021-01-26 |
CN112271187B true CN112271187B (en) | 2023-10-27 |
Family
ID=74349279
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011026600.7A Active CN112271187B (en) | 2020-09-25 | 2020-09-25 | Backside structure of backside-illuminated EMCCD (electronic charge coupled device) and manufacturing method thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN112271187B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113113441B (en) * | 2021-04-13 | 2023-06-30 | 中国电子科技集团公司第四十四研究所 | Back-illuminated CCD structure capable of avoiding stray signals at edge |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106847852A (en) * | 2017-03-27 | 2017-06-13 | 北方电子研究院安徽有限公司 | A kind of backside structure of electron multiplying charge coupled apparatus and preparation method thereof |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4212623B2 (en) * | 2006-01-31 | 2009-01-21 | 三洋電機株式会社 | Imaging device |
FR2961347B1 (en) * | 2010-06-15 | 2012-08-24 | E2V Semiconductors | ELECTRON MULTIPLICATION IMAGE SENSOR |
-
2020
- 2020-09-25 CN CN202011026600.7A patent/CN112271187B/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106847852A (en) * | 2017-03-27 | 2017-06-13 | 北方电子研究院安徽有限公司 | A kind of backside structure of electron multiplying charge coupled apparatus and preparation method thereof |
Also Published As
Publication number | Publication date |
---|---|
CN112271187A (en) | 2021-01-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP2345079B1 (en) | Back-illuminated cmos image sensors | |
US8865507B2 (en) | Integrated visible and infrared imager devices and associated methods | |
KR101443438B1 (en) | Backside illuminated cmos image sensor | |
CN105140315B (en) | Semiconductor photodetection element | |
US9406711B2 (en) | Apparatus and method for backside illuminated image sensors | |
US20060076590A1 (en) | Structure for implementation of back-illuminated CMOS or CCD imagers | |
JP4997879B2 (en) | Semiconductor device, manufacturing method thereof, solid-state imaging device, manufacturing method thereof, and imaging device | |
JP2010503991A (en) | Image sensor using thin film SOI | |
US8377732B2 (en) | Method of manufacturing back side illuminated imaging device | |
GB2475086A (en) | Backside illuminated image sensor | |
US7777229B2 (en) | Method and apparatus for reducing smear in back-illuminated imaging sensors | |
CN112271187B (en) | Backside structure of backside-illuminated EMCCD (electronic charge coupled device) and manufacturing method thereof | |
JPH0629506A (en) | Semiconductor energy detector | |
TWI476911B (en) | Method for increasing photodiode full well capacity | |
JPH0645574A (en) | Semiconductor energy detector | |
JPH06196680A (en) | Semiconductor energy detector and manufacture thereof | |
Schuette et al. | Hybridization process for back-illuminated silicon Geiger-mode avalanche photodiode arrays | |
KR101420503B1 (en) | Apparatus and Method for Reducing Dark Current in Image Sensors | |
US7985613B2 (en) | Method for manufacturing back side illumination image sensor | |
CN110137195B (en) | Image sensor and forming method thereof | |
US11810938B2 (en) | Back-lit image sensor based on heterojunction and preparation thereof | |
US8652868B2 (en) | Implanting method for forming photodiode | |
WO2013056249A1 (en) | Three dimensional architecture semiconductor devices and associated methods | |
JPH0645575A (en) | Method of manufacturing semiconductor energy detector | |
US20230317758A1 (en) | Isolation structures in image sensors |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |