CN112233990A - 5G communication package and manufacturing method thereof - Google Patents

5G communication package and manufacturing method thereof Download PDF

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Publication number
CN112233990A
CN112233990A CN202011112563.1A CN202011112563A CN112233990A CN 112233990 A CN112233990 A CN 112233990A CN 202011112563 A CN202011112563 A CN 202011112563A CN 112233990 A CN112233990 A CN 112233990A
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China
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layer
chips
dielectric layer
silicon
metal foil
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CN202011112563.1A
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Chinese (zh)
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侯新飞
崔文杰
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Ji Nannan Knows Information Technology Co ltd
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Ji Nannan Knows Information Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/12—Supports; Mounting means
    • H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

The invention provides a packaging assembly for industrial 5G communication and a manufacturing method thereof, wherein a composite film layer is used for laminating to simultaneously form a magnetic shielding layer and an electric shielding layer, wherein a resin magnetic shielding layer in the composite film has high adhesion with a molded body and is not easy to fall off; the convex columns of the chips are exposed by using a grinding method, so that the electric shielding layer (metal foil layer) can completely cover the chips, and the shielding effect is ensured; furthermore, the silicon-based component and the silicon-based chip are arranged up and down, so that the mismatch of upper and lower thermal stresses can be prevented, and the bonding reliability is ensured. A capacitor is formed by a part of the electric shielding layer and the conducting layer of the silicon-based component, so that the inductance value can be reduced, and the power supply can be stabilized.

Description

5G communication package and manufacturing method thereof
Technical Field
The invention relates to the field of semiconductor package testing, in particular to the field of wireless communication packaging, and particularly relates to a packaging assembly for 5G communication and a manufacturing method thereof.
Background
Future wireless products are targeting much higher operating frequencies than the lower GHz range currently utilized. For example, 5G (5 th generation mobile networks or 5 th generation wireless systems) communications are expected to operate at frequencies greater than or equal to 15 GHz. In addition, current WiGig (wireless gigabit alliance) products operate at around 60 GHz. Other applications, including automotive radar and medical imaging, utilize wireless communication technology in millimeter wave frequencies (e.g., 30GHz-300 GHz). For these wireless applications, the designed RF (radio frequency) circuits require high quality passive matching networks in order to accommodate the transmission of the predefined frequency band (where communication takes place), and high efficiency power amplifiers and low loss power combiners/switches.
In 5G radio frequency communication, an antenna structure and other chips are often required to be integrated, the other chips comprise a controller, an amplifier, a filter and the like, when the antenna structure and the other chips are integrated, the antenna structure and the other chips need to be electrically connected with each other, and when the connection is realized through a wiring layer, electromagnetic shielding is not easy to avoid.
Disclosure of Invention
In order to solve the above problems, the present invention provides a method for manufacturing a package assembly for 5G communication, comprising the steps of:
(1) forming a molded component, wherein the molded component comprises a plurality of chips and a molded body for encapsulating the chips, and the first surface of the molded body exposes the active surfaces and the bonding pads of the chips;
(2) forming a plurality of posts on the pads of the plurality of chips;
(3) providing a composite film, wherein the composite film comprises a resin magnetic shielding layer and a metal foil layer, and pressing the composite film to the first surface so that the convex columns are embedded into the resin magnetic shielding layer, and the metal foil layer is provided with a plurality of convex parts corresponding to the convex columns;
(4) grinding the composite film to remove a portion of the protrusion such that top surfaces of the plurality of posts are exposed and insulated from the metal foil layer;
(5) forming a first dielectric layer on the metal foil layer, and forming a plurality of first via holes in the first dielectric layer, forming a conductive pattern on the first dielectric layer, the conductive pattern being electrically connected to the plurality of chips through the plurality of first via holes and the plurality of posts;
(6) providing a plurality of silicon-based components comprising a conductive layer on a back surface thereof and an antenna component on a front surface thereof, adhering the silicon-based components to the first dielectric layer, the conductive layer conforming to the first dielectric layer;
(7) forming a second dielectric layer covering the plurality of silicon-based components and forming a first opening in the second dielectric layer exposing the conductive pattern and a funnel-shaped opening exposing the antenna component;
(8) and filling a conductive material in the first opening to form a second through hole, and forming a wiring layer electrically connected with the second through hole on the second dielectric layer, wherein the wiring layer is electrically connected with the antenna component.
According to an embodiment of the invention, the metal foil layer comprises a first portion over the plurality of chips, the first portion and the conductive layer being arranged in facing relationship to form a capacitor over the plurality of chips.
According to an embodiment of the present invention, in step (1), forming a molded component specifically comprises: providing a temporary carrier plate, wherein an adhesive layer is arranged on the temporary carrier plate; adhering the active surfaces of the plurality of chips to the adhesive layer and sealing the plurality of chips with the molding body; and removing the temporary carrier plate.
According to an embodiment of the present invention, the plurality of posts include a copper pillar directly engaging the pad and a metal protection layer over the copper pillar.
According to an embodiment of the present invention, in the step (4), grinding the composite film to remove a portion of the protrusion specifically includes: and grinding the composite film until a part of the metal protective layer is removed.
According to the method, the invention provides a packaging assembly for 5G communication, which specifically comprises the following steps:
a plurality of chips having pads on active surfaces thereof;
a molding body sealing the plurality of chips and having a first surface exposing active surfaces of the plurality of chips;
a plurality of convex columns jointed on the bonding pad;
the composite film comprises a resin magnetic shielding layer and a metal foil layer, the resin magnetic shielding layer and the metal foil layer cover the first surface, the convex columns are embedded into the resin magnetic shielding layer, the metal foil layer is provided with a plurality of openings, and the convex columns are respectively exposed out of the openings;
a first dielectric layer formed on the metal foil layer and having a plurality of first via holes formed therein, a conductive pattern formed on the first dielectric layer, the conductive pattern being electrically connected to the plurality of chips through the plurality of first via holes and the plurality of posts;
a plurality of silicon-based components including a conductive layer on a back surface thereof and an antenna component on a front surface thereof, the silicon-based components being bonded to the first dielectric layer, the conductive layer conforming to the first dielectric layer;
a second dielectric layer formed on the first dielectric layer and covering the plurality of silicon-based components, the second dielectric layer having a plurality of second vias therein and funnel-shaped openings exposing the antenna components;
a wiring layer formed on the second dielectric layer and electrically connecting the plurality of second vias and the antenna assembly.
According to an embodiment of the invention, the metal foil layer comprises a first portion over the plurality of chips, the first portion and the conductive layer being arranged in facing relationship to form a capacitor over the plurality of chips.
According to an embodiment of the present invention, the plurality of posts include a copper pillar directly engaging the pad and a metal protection layer over the copper pillar.
According to an embodiment of the present invention, the plurality of chips are silicon-based chips.
According to an embodiment of the invention, the antenna component is embedded in the silicon-based component.
The composite film layer is used for laminating to simultaneously form magnetic shielding and electric shielding, wherein the resin magnetic shielding layer in the composite film has high adhesion with a molded body and is not easy to fall off; the convex columns of the chips are exposed by using a grinding method, so that the electric shielding layer (metal foil layer) can completely cover the chips, and the shielding effect is ensured; furthermore, the silicon-based component and the silicon-based chip are arranged up and down, so that the mismatch of upper and lower thermal stresses can be prevented, and the bonding reliability is ensured. A capacitor is formed by a part of the electric shielding layer and the conducting layer of the silicon-based component, so that the inductance value can be reduced, and the power supply can be stabilized.
Drawings
Fig. 1-8 are schematic flow charts illustrating a method of manufacturing a package assembly for 5G communication according to the present invention.
Detailed Description
The present technology will be described with reference to the drawings in the embodiments, and relates to a package assembly for 5G communication.
Various operations will be described as multiple discrete operations, in turn, in a manner that is most helpful in understanding the present invention, however, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation. For high frequency (e.g., 5G, WiGig) wireless applications, designed RF circuits (e.g., low noise amplifiers, hybrids, power amplifiers, etc.) require high quality passive matching networks in order to accommodate the transmission of a predefined frequency band where communication occurs, as well as high efficiency power amplifiers and low loss power combiners/switches, etc. CMOS technology for operation at greater than 30GHz may be utilized, but with reduced power amplifier efficiency and with low quality passives, primarily due to the typically lossy silicon substrate employed. This not only results in lower system performance, but also in increased thermal requirements due to the excess heat generated. In one example, high heat dissipation is due to the fact that: multiple power amplifiers must be utilized in a phased array arrangement to achieve the desired output power and transmission range. On 5G systems this will be even more stringent, since the typical transmission range of cellular networks (e.g. 4G, LTE-adv) is several times the transmission range (e.g. WiFi, WiGig) required for connectivity.
For the critical components of the communication system, the present design utilizes non-CMOS technology (e.g., GaAs, GaN, passive on glass, etc.). With optimal system partitioning, critical components requiring high efficiency and high quality factor can be manufactured according to another technique. These components may be at the device level (e.g., transistors on GaN/GaAs) or at the circuit level (e.g., III-V die integrated power amplifier, low noise amplifier). As discussed in embodiments of the present invention, the communication system will be formed in a package configuration.
It will be understood that the present technology may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the technology to those skilled in the art. Indeed, the technology is intended to cover alternatives, modifications and equivalents of these embodiments, which are included within the scope and spirit of the technology as defined by the appended claims. Furthermore, in the following detailed description of the present technology, numerous specific details are set forth in order to provide a thorough understanding of the present technology. It will be apparent, however, to one skilled in the art that the present technology may be practiced without these specific details.
The terms "top" and "bottom", "upper" and "lower" and "vertical" and "horizontal" and their various forms as used herein are for purposes of illustration and description only and are not intended to limit the description of the technology as the referenced items may be interchanged in position and orientation. Also, as used herein, the terms "substantially" and/or "about" mean that the specified dimensions or parameters may vary within acceptable manufacturing tolerances for a given application.
A method for manufacturing a package for 5G communication according to the present invention will be described with reference to fig. 1 to 8, which includes the steps of:
(1) forming a molded component, wherein the molded component comprises a plurality of chips and a molded body for encapsulating the chips, and the first surface of the molded body exposes the active surfaces and the bonding pads of the chips;
(2) forming a plurality of posts on the pads of the plurality of chips;
(3) providing a composite film, wherein the composite film comprises a resin magnetic shielding layer and a metal foil layer, and pressing the composite film to the first surface so that the convex columns are embedded into the resin magnetic shielding layer, and the metal foil layer is provided with a plurality of convex parts corresponding to the convex columns;
(4) grinding the composite film to remove a portion of the protrusion such that top surfaces of the plurality of posts are exposed and insulated from the metal foil layer;
(5) forming a first dielectric layer on the metal foil layer, and forming a plurality of first via holes in the first dielectric layer, forming a conductive pattern on the first dielectric layer, the conductive pattern being electrically connected to the plurality of chips through the plurality of first via holes and the plurality of posts;
(6) providing a plurality of silicon-based components comprising a conductive layer on a back surface thereof and an antenna component on a front surface thereof, adhering the silicon-based components to the first dielectric layer, the conductive layer conforming to the first dielectric layer;
(7) forming a second dielectric layer covering the plurality of silicon-based components and forming a first opening in the second dielectric layer exposing the conductive pattern and a funnel-shaped opening exposing the antenna component;
(8) and filling a conductive material in the first opening to form a second through hole, and forming a wiring layer electrically connected with the second through hole on the second dielectric layer, wherein the wiring layer is electrically connected with the antenna component.
Referring first to fig. 1, the 5G communication package of the present invention includes a plurality of chips 13, and the plurality of chips 13 may include a controller, an amplifier, a filter, etc., which are integrated with an antenna structure to constitute an integrated circuit package structure that processes a radio frequency signal.
A temporary carrier 11 is provided, and an adhesive layer 12 is disposed on the temporary carrier 11. The temporary carrier 11 has a certain rigidity, and may be made of ceramic, stainless steel, glass, or the like. The adhesive layer 12 may be a conventional adhesive material, which may also have a dissociating property, such as a dissociating film.
The active surfaces of the plurality of chips 13 are adhered to the adhesive layer 12, and the plurality of chips 13 are sealed with a mold 15. The active surfaces of the chips 13 have a plurality of bonding pads 14 thereon, the mold 14 simultaneously exposes the active surfaces of the chips 13 and the bonding pads 14, and the mold 14 has a first surface coplanar with the active surfaces of the chips 13.
Next, referring to fig. 2, the temporary carrier 11 and the adhesive layer 12 are removed, and they may be dissociated by dissolving the adhesive layer with a chemical agent, or by heating or light irradiation. The formed molded component is then flipped over and a plurality of posts are formed on the active surface of the plurality of chips 13, the plurality of posts being electrically connected to the plurality of pads 14, and each of the plurality of posts including a copper post 16 directly engaging the pad 14 and a metal cap layer 17 over the copper post 16. The metal protection layer 17 may be nickel, gold, nickel palladium alloy, nickel gold alloy, or the like, which has a thickness of at least 50 micrometers.
Then, referring to fig. 3, a composite film which is a two-layer structure of the resin magnetic shield layer 18 and the metal foil layer 19 may be provided. The resin magnetic shielding layer 18 may include magnetic particles and a resin matrix material dispersing the magnetic particles, and the magnetic particles may be at least one of iron, cobalt, and nickel, or an alloy thereof. The metal foil layer 19 may be a thin sheet-type metal sheet adhered to the resin shielding layer 18, and may be made of a material selected from gold, silver, copper, platinum, tungsten, nickel, and the like.
The composite film is press-fitted to the first surface using a lamination technique such that the plurality of convex pillars are embedded in the resin magnetic shield layer 18 and such that the metal foil layer 19 has a plurality of convex portions 20 corresponding to the plurality of convex pillars. The plurality of projections 20 are due to the plurality of pillars, which also have resin magnetic shield material on the side surfaces (i.e., the side surfaces of the metal protection layer 17) and the top surfaces (i.e., the top surface of the metal protection layer 17) of the tips of the plurality of pillars.
Referring to fig. 4, the composite film is ground using a CMP polishing technique to remove a portion of the protrusion 20 such that top surfaces of the plurality of posts are exposed and insulated from the metal foil layer 19. When the portion of the protruding portion 20 is removed, only a portion of the metal protection layer 17 is removed, and the copper pillar 16 is not polished, so that the metal protection layer 17 is partially remained and exposed to form a contact. Wherein at the location of the top surface there is a lateral distance d between the stud and the metal foil layer 19, which should be less than 100 microns to ensure a shielding effect.
Referring to fig. 5, a first dielectric layer 21 is covered on the metal foil layer 19, and the first dielectric layer 21 may be polyimide, silicon oxide, silicon nitride, or the like, preferably a high K material. And forming a first via 22 in the first dielectric layer 21 to electrically connect the plurality of pillars, the first via 22 being located right above the plurality of pillars.
Next, the conductive pattern 23 may be formed by electroplating, electroless plating, or the like, and the material of the conductive pattern 23 may be copper. The conductive pattern 23 is electrically connected to the conductive pattern 23 through the plurality of first through holes 22 and the plurality of posts to the plurality of chips 13.
Referring to fig. 6, a plurality of silicon-based components 100 are provided, the plurality of silicon-based components 100 including a silicon-based material 29 and a conductive layer 30 on a back surface thereof and an antenna component 31 on a front surface thereof, the silicon-based components 100 are bonded to the first dielectric layer 21, and the conductive layer 30 is attached to the first dielectric layer 21.
Wherein the material of the conductive layer 30 is the same as the material of the conductive pattern 23, and the conductive pattern 23 includes a first portion located above the plurality of chips 13, and the first portion and the conductive layer 30 are disposed opposite to each other to form a capacitor C located above the plurality of chips 1313, which can reduce the inductance value to stabilize the power supply. The antenna component 31 may be formed by etching a recess-filling conductive material in the front side of the silicon matrix material 29, i.e. the antenna component 31 is embedded in the silicon matrix material 29.
Referring to fig. 7, a second dielectric layer 32 is formed on the first dielectric layer 21, and the material of the second dielectric layer 32 may be the same as or different from that of the first dielectric layer 21. The second dielectric layer 32 covers the plurality of silicon-based components 100.
A first opening 33 exposing the conductive pattern 23 and a funnel-shaped opening 34 exposing the antenna component 31 are formed in the second dielectric layer 32. The second opening 23 may be formed by developing, exposing, etching the second dielectric layer 32, and forming a second via 35, such as copper, by electroplating a metal conductive material. The second via 35 is electrically connected to the conductive pattern 23, see fig. 8.
The funnel-shaped opening 34 is shaped in particular to be wide at the top and narrow at the bottom, which enhances the antenna signal. And, a wiring layer 36 is formed on the second dielectric layer 32, the wiring layer 36 electrically connecting the second via hole 35 and the antenna assembly 31.
In this arrangement, the plurality of chips 13 are also silicon-based chips 13, and the plurality of silicon-based components 100 are arranged up and down, so that the problem of warping and layering caused by mismatch of up and down stresses can be prevented when the device works.
According to the method, the invention also provides a package assembly for 5G communication, which specifically includes, with reference to fig. 8:
a plurality of chips 13, the active surfaces of the chips 13 having pads 14;
a molding compound 15 sealing the plurality of chips 13 and having a first surface exposing active surfaces of the plurality of chips 13;
a plurality of posts bonded to the pads 14; the plurality of posts comprise copper posts 17 directly bonding the bonding pads and a metal protective layer 18 positioned on the copper posts 17;
a composite film including a resin magnetic shielding layer 18 and a metal foil layer 19 covering the first surface, the plurality of convex pillars being embedded in the resin magnetic shielding layer 18, and the metal foil layer 19 having a plurality of openings from which the plurality of convex pillars are respectively exposed;
a first dielectric layer 21 formed on the metal foil layer 19 and having a plurality of first through holes 22 formed in the first dielectric layer 21, and a conductive pattern 23 formed on the first dielectric layer 21, the conductive pattern 23 being electrically connected to the plurality of chips 13 through the plurality of first through holes 22 and the plurality of posts;
a plurality of silicon-based components 100 comprising a conductive layer 30 on a back surface thereof and an antenna component 31 on a front surface thereof, said silicon-based components 100 being bonded to said first dielectric layer 21, said conductive layer 30 conforming to said first dielectric layer 21;
a second dielectric layer 32 formed on the first dielectric layer 21 and covering the plurality of silicon-based components 100, the second dielectric layer 32 having a plurality of second through holes 35 therein and funnel-shaped openings 34 exposing the antenna components;
and a wiring layer 36 formed on the second dielectric layer 32 and electrically connecting the plurality of second vias 35 and the antenna assembly 31.
Wherein the metal foil layer 19 comprises a first portion over the plurality of chips 13, the first portion and the conductive layer 31 being disposed in facing relationship to form a capacitor C over the plurality of chips 13. The plurality of chips 13 are silicon-based chips.
The composite film layer is used for laminating to simultaneously form magnetic shielding and electric shielding, wherein the resin magnetic shielding layer in the composite film has high adhesion with a molded body and is not easy to fall off; the convex columns of the chips are exposed by using a grinding method, so that the electric shielding layer (metal foil layer) can completely cover the chips, and the shielding effect is ensured; furthermore, the silicon-based component and the silicon-based chip are arranged up and down, so that the mismatch of upper and lower thermal stresses can be prevented, and the bonding reliability is ensured. A capacitor is formed by a part of the electric shielding layer and the conducting layer of the silicon-based component, so that the inductance value can be reduced, and the power supply can be stabilized.
The foregoing detailed description of the technology has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the technology to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. The described embodiments were chosen in order to best explain the principles of the technology and its practical application to thereby enable others skilled in the art to best utilize the technology in various embodiments and with various modifications as are suited to the particular use contemplated. The scope of the present technology is defined by the appended claims.
The expressions "exemplary embodiment," "example," and the like, as used herein, do not refer to the same embodiment, but are provided to emphasize different particular features. However, the above examples and exemplary embodiments do not preclude their implementation in combination with features of other examples. For example, even in a case where a description of a specific example is not provided in another example, unless otherwise stated or contrary to the description in the other example, the description may be understood as an explanation relating to the other example.
The terminology used in the present invention is for the purpose of illustrating examples only and is not intended to be limiting of the invention. Unless the context clearly dictates otherwise, singular expressions include plural expressions.
While example embodiments have been shown and described, it will be apparent to those skilled in the art that modifications and changes may be made without departing from the scope of the invention as defined by the claims.

Claims (10)

1. A manufacturing method of a package assembly for 5G communication comprises the following steps:
(1) forming a molded component, wherein the molded component comprises a plurality of chips and a molded body for encapsulating the chips, and the first surface of the molded body exposes the active surfaces and the bonding pads of the chips;
(2) forming a plurality of posts on the pads of the plurality of chips;
(3) providing a composite film, wherein the composite film comprises a resin magnetic shielding layer and a metal foil layer, and pressing the composite film to the first surface so that the convex columns are embedded into the resin magnetic shielding layer, and the metal foil layer is provided with a plurality of convex parts corresponding to the convex columns;
(4) grinding the composite film to remove a portion of the protrusion such that top surfaces of the plurality of posts are exposed and insulated from the metal foil layer;
(5) forming a first dielectric layer on the metal foil layer, and forming a plurality of first via holes in the first dielectric layer, forming a conductive pattern on the first dielectric layer, the conductive pattern being electrically connected to the plurality of chips through the plurality of first via holes and the plurality of posts;
(6) providing a plurality of silicon-based components comprising a conductive layer on a back surface thereof and an antenna component on a front surface thereof, adhering the silicon-based components to the first dielectric layer, the conductive layer conforming to the first dielectric layer;
(7) forming a second dielectric layer covering the plurality of silicon-based components and forming a first opening in the second dielectric layer exposing the conductive pattern and a funnel-shaped opening exposing the antenna component;
(8) and filling a conductive material in the first opening to form a second through hole, and forming a wiring layer electrically connected with the second through hole on the second dielectric layer, wherein the wiring layer is electrically connected with the antenna component.
2. The method of manufacturing the package assembly for 5G communication according to claim 1, wherein: the metal foil layer includes a first portion over the plurality of chips, the first portion and the conductive layer being disposed in facing relation to form a capacitor over the plurality of chips.
3. The method of manufacturing the package assembly for 5G communication according to claim 1, wherein: in step (1), forming a molded component specifically includes: providing a temporary carrier plate, wherein an adhesive layer is arranged on the temporary carrier plate; adhering the active surfaces of the plurality of chips to the adhesive layer and sealing the plurality of chips with the molding body; and removing the temporary carrier plate.
4. The method of manufacturing the package assembly for 5G communication according to claim 1, wherein: the plurality of posts include copper posts directly engaging the bonding pads and a metal protective layer over the copper posts.
5. The method of manufacturing the package assembly for 5G communication according to claim 1, wherein: in the step (4), grinding the composite film to remove a part of the protrusion specifically includes: and grinding the composite film until a part of the metal protective layer is removed.
6. A package for 5G communication formed by the method for manufacturing a package for 5G communication according to claim 1, comprising:
a plurality of chips having pads on active surfaces thereof;
a molding body sealing the plurality of chips and having a first surface exposing active surfaces of the plurality of chips;
a plurality of convex columns jointed on the bonding pad;
the composite film comprises a resin magnetic shielding layer and a metal foil layer, the resin magnetic shielding layer and the metal foil layer cover the first surface, the convex columns are embedded into the resin magnetic shielding layer, the metal foil layer is provided with a plurality of openings, and the convex columns are respectively exposed out of the openings;
a first dielectric layer formed on the metal foil layer and having a plurality of first via holes formed therein, a conductive pattern formed on the first dielectric layer, the conductive pattern being electrically connected to the plurality of chips through the plurality of first via holes and the plurality of posts;
a plurality of silicon-based components including a conductive layer on a back surface thereof and an antenna component on a front surface thereof, the silicon-based components being bonded to the first dielectric layer, the conductive layer conforming to the first dielectric layer;
a second dielectric layer formed on the first dielectric layer and covering the plurality of silicon-based components, the second dielectric layer having a plurality of second vias therein and funnel-shaped openings exposing the antenna components;
a wiring layer formed on the second dielectric layer and electrically connecting the plurality of second vias and the antenna assembly.
7. The package assembly of claim 6, wherein: the metal foil layer includes a first portion over the plurality of chips, the first portion and the conductive layer being disposed in facing relation to form a capacitor over the plurality of chips.
8. The package assembly of claim 6, wherein: the plurality of posts include copper posts directly engaging the bonding pads and a metal protective layer over the copper posts.
9. The package assembly of claim 6, wherein: the plurality of chips are silicon-based chips.
10. The package assembly of any one of claims 6, wherein: the antenna assembly is embedded in the silicon-based assembly.
CN202011112563.1A 2020-10-16 2020-10-16 5G communication package and manufacturing method thereof Withdrawn CN112233990A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114512589A (en) * 2022-04-21 2022-05-17 威海三维曲板智能装备有限公司 Photoelectric hybrid packaging structure and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114512589A (en) * 2022-04-21 2022-05-17 威海三维曲板智能装备有限公司 Photoelectric hybrid packaging structure and manufacturing method thereof
CN114512589B (en) * 2022-04-21 2022-06-17 威海三维曲板智能装备有限公司 Photoelectric hybrid packaging structure and manufacturing method thereof

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