CN112216512B - Multilayer capacitor and mounting substrate therefor - Google Patents
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- CN112216512B CN112216512B CN202010484155.2A CN202010484155A CN112216512B CN 112216512 B CN112216512 B CN 112216512B CN 202010484155 A CN202010484155 A CN 202010484155A CN 112216512 B CN112216512 B CN 112216512B
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- 239000003990 capacitor Substances 0.000 title claims abstract description 149
- 239000000758 substrate Substances 0.000 title claims abstract description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 14
- 239000002245 particle Substances 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 5
- 229910000480 nickel oxide Inorganic materials 0.000 claims description 5
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 claims description 5
- 239000003989 dielectric material Substances 0.000 claims 3
- 239000000919 ceramic Substances 0.000 abstract description 14
- 239000010410 layer Substances 0.000 description 132
- 230000005684 electric field Effects 0.000 description 32
- 239000004020 conductor Substances 0.000 description 7
- 239000000843 powder Substances 0.000 description 4
- 229910002113 barium titanate Inorganic materials 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 239000000654 additive Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 229910010293 ceramic material Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000007306 functionalization reaction Methods 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000007935 neutral effect Effects 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 229910009650 Ti1-yZry Inorganic materials 0.000 description 1
- 229910010252 TiO3 Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000007646 gravure printing Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 150000001247 metal acetylides Chemical class 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 229910052761 rare earth metal Inorganic materials 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 229910000314 transition metal oxide Inorganic materials 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/02—Mountings
- H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
- H01G4/302—Stacked capacitors obtained by injection of metal in cavities formed in a ceramic body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
- H01G2/02—Mountings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
- H01G4/012—Form of non-self-supporting electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
- H01G4/1209—Ceramic dielectrics characterised by the ceramic dielectric material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Ceramic Capacitors (AREA)
Abstract
The present invention provides a multilayer capacitor and a mounting substrate thereof, the multilayer capacitor including: a ceramic body including a dielectric layer and having a first surface, a second surface, a third surface, a fourth surface, a fifth surface, and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and opposite to each other; a plurality of internal electrodes disposed inside the ceramic body, exposed to the fifth surface and the sixth surface, and having one end exposed to the third surface or the fourth surface; and first and second side portions respectively provided on ends of the inner electrodes exposed to the fifth and sixth surfaces, the first and second side portions being divided into inner and outer layers, respectively, the inner layer being formed adjacent to the ceramic main body, the outer layer being formed on the inner layer, a dielectric constant of the inner layer being smaller than a dielectric constant of the outer layer.
Description
This application claims the benefit of priority of korean patent application No. 10-2019-0082983, filed by the korean intellectual property office at 7/10/2019, the disclosure of which is incorporated herein by reference in its entirety.
Technical Field
The present disclosure relates to a multilayer capacitor and a mounting substrate thereof.
Background
In general, an electronic component (such as a capacitor, an inductor, a piezoelectric element, a varistor, a thermistor, etc.) using a ceramic material includes a ceramic body formed using a ceramic material, internal electrodes formed in the body, and external electrodes mounted on a surface of the ceramic body to be connected to the internal electrodes.
In recent years, due to the trend of miniaturization and multi-functionalization of electronic products, a trend of miniaturization and high functionalization of chip modules has been caused. Therefore, the multilayer capacitor is required to be a high-capacity product having a small size and a high capacity.
For miniaturization and high capacity of the multilayer capacitor, it is necessary to increase the effective volume fraction required to achieve the capacity by maximizing the electrode effective area.
In order to realize a small and high-capacity multilayer capacitor as described above, the internal electrodes are exposed in the width direction of the body when the multilayer capacitor is manufactured, and thus the area of the internal electrodes is maximized by designing without edges in the width direction. Further, after manufacturing such a sheet, in an operation before sintering, the edge portion is additionally attached to the surface of the electrode exposed in the width direction of the sheet.
However, according to the prior art, when a multilayer capacitor is manufactured as described above, when the dielectric composition for forming the side edge portion is not distinguished from the dielectric composition of the ceramic main body, the dielectric composition of the ceramic main body is used as it is.
Insulation breakdown, one of the main defects of the multilayer capacitor, is caused by an electric field concentrated on the ends of the inner electrodes.
In order to prevent insulation breakdown, which is one of the main defects of the multilayer capacitor, the electric field concentrated on the ends of the internal electrodes should be relaxed.
Therefore, research is required to mitigate the effect of electric field concentration on the tip of the inner electrode.
Disclosure of Invention
An aspect of the present disclosure is to provide a multilayer capacitor having improved reliability and a mounting substrate thereof.
According to an aspect of the present disclosure, a multilayer capacitor includes: a capacitor body including a dielectric layer and having first and second surfaces opposite to each other, third and fourth surfaces opposite to each other connecting the first surface to the second surface, and fifth and sixth surfaces opposite to each other connecting to the first, second, third and fourth surfaces; a plurality of internal electrodes disposed inside the capacitor body, exposed to the fifth surface and the sixth surface, and having one end exposed to the third surface or the fourth surface; first and second external electrodes disposed on the third and fourth surfaces of the capacitor body, respectively; and first and second side portions respectively provided on ends of the inner electrodes exposed to the fifth and sixth surfaces, the first and second side portions being respectively divided into an inner layer formed adjacent to the capacitor body and an outer layer formed on the inner layer, and a dielectric constant of the inner layer being smaller than a dielectric constant of the outer layer.
The first side portion and the second side portion may be set such that a ratio of a dielectric constant of the inner layer to a dielectric constant of the outer layer is less than or equal to 0.5.
The first side portion and the second side portion may be disposed such that a ratio of an average thickness of the inner layer to an average thickness of the outer layer is 0.08 to 0.15.
The dielectric layer may have an average thickness of 0.4 μm or less, and the internal electrode may have an average thickness of 0.41 μm or less.
An average thickness of the first side portion and an average thickness of the second side portion may each be less than or equal to 10 μm.
The number of stacks of the plurality of internal electrodes may be 400 layers or more.
An average thickness of each of the upper and lower footprint regions of the capacitor body may be less than or equal to 20 μm.
The average thickness of the first external electrode and the average thickness of the second external electrode may be less than or equal to 10 μm.
The first side portion and the second side portion may be provided such that the inner layer and the outer layer have different thicknesses from each other.
The first outer electrode may include: a first connection portion provided on the third surface of the capacitor body and connected to an internal electrode; and a first strap portion extending from the first connection portion onto a portion of the first surface of the capacitor body; the second external electrode may include: a second connection portion provided on the fourth surface of the capacitor body and connected to an internal electrode; and a second strap portion extending from the second connection portion onto a portion of the first surface of the capacitor body.
According to an aspect of the present disclosure, a multilayer capacitor includes: a body including first and second internal electrodes stacked in a thickness direction with a dielectric layer interposed between each pair of the first and second internal electrodes, the first internal electrodes being exposed to a third surface of the body in a length direction and spaced apart from a fourth surface of the body opposite to the third surface, the second internal electrodes being exposed to the fourth surface and spaced apart from the third surface; a first external electrode disposed on the third surface and connected to the first internal electrode; a second external electrode disposed on the fourth surface and connected to the second internal electrode; and first and second side portions respectively provided on fifth and sixth surfaces of the main body opposite to each other in a width direction, each of the first and second side portions including an inner layer contacting edges of the first and second internal electrodes in the width direction and an outer layer provided on the corresponding inner layer and having a thickness different from that of the inner layer.
According to another aspect of the present disclosure, a substrate for mounting a multilayer capacitor includes: a substrate having first and second electrode pads on one surface; and the multilayer capacitor as described above, mounted such that the first and second external electrodes are connected to the first and second electrode pads, respectively. Other features and aspects will be apparent from the following detailed description, the accompanying drawings, and the claims.
Drawings
The above and other aspects, features and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
fig. 1 is a schematic perspective view of a multilayer capacitor according to an embodiment;
FIG. 2 is a sectional view taken along line I-I' of FIG. 1;
fig. 3A and 3B are plan views illustrating first and second internal electrodes, respectively, applied to the multilayer capacitor of fig. 1;
FIG. 4 is a sectional view taken along line II-II' of FIG. 1;
FIG. 5 is a sectional view taken along line III-III' of FIG. 1;
fig. 6 is a graph showing an electric field according to the size of Ni particles; and
fig. 7 is a schematic sectional view illustrating that the multilayer capacitor of fig. 2 is mounted on a substrate.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described as follows with reference to the accompanying drawings. The shapes and dimensions of constituent elements in the drawings may be exaggerated or reduced for clarity.
This disclosure may, however, be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
Throughout the specification, it will be understood that when an element such as a layer, region or wafer (substrate) is referred to as being "on," "connected to" or "bonded to" another element, it can be directly on, "connected to" or "bonded to" the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there may be no intervening elements or layers present. Like numbers refer to like elements throughout. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It will be apparent that, although terms such as "first," "second," and "third," etc., may be used herein to describe various members, components, regions, layers and/or sections, these members, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the example embodiments.
Spatially relative terms, such as "above," "upper," "lower," and "below," may be used herein for ease of description to describe one element's relationship to another element as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "above" or "upper" other elements would then be oriented "below" or "lower" the other elements. Thus, the term "above" may include both an orientation of "above" and "below" depending on the particular orientation of the figure. The device may also be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative terms used herein may be interpreted accordingly.
The terminology used herein describes particular embodiments only, and the disclosure is not so limited. As used herein, the singular is intended to include the plural unless the context clearly dictates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, and/or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Hereinafter, embodiments of the present disclosure will be described with reference to schematic diagrams illustrating embodiments of the present disclosure. In the drawings, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, may be expected. Thus, for example, embodiments of the disclosure should not be construed as limited to the particular shapes of regions illustrated herein but are to include modifications that result from fabrication. The following embodiments may also be configured by one embodiment or a combination of embodiments.
The following description of the present disclosure may have various configurations, and only required configurations are set forth herein, but is not limited thereto.
Fig. 1 is a schematic perspective view of a multilayer capacitor according to an embodiment, fig. 2 is a sectional view taken along line I-I ' of fig. 1, fig. 3A and 3B are plan views illustrating first and second internal electrodes, respectively, applied to the multilayer capacitor of fig. 1, fig. 4 is a sectional view taken along line II-II ' of fig. 1, and fig. 5 is a sectional view taken along line III-III ' of fig. 1.
When directions are defined to clearly describe the embodiments in the present disclosure, X, Y and Z on the drawings respectively indicate a length direction, a width direction, and a thickness direction of the multilayer capacitor.
Further, in the embodiment, the Z direction may be used as having the same meaning as the stacking direction along which the dielectric layers are stacked on each other.
Referring to fig. 1 to 5, the multilayer capacitor 100 according to the embodiment includes a capacitor body (may also be referred to as a ceramic body or body) 110, a plurality of inner electrodes, first and second side portions, and first and second outer electrodes 131 and 132 formed on the outer surface of the capacitor body 110.
Further, the capacitor body 110 includes an active area 115 and upper and lower cover areas (or may be referred to as upper and lower cover layers) 112 and 113.
In this case, the first side portion is divided into a first inner layer 141 formed adjacent to the capacitor body 110 and a first outer layer 151 formed on the first inner layer 141, and the second side portion is divided into a second inner layer 142 formed adjacent to the capacitor body 110 and a second outer layer 152 formed on the second inner layer 142, and the dielectric constants of the first and second inner layers 141 and 142 are lower than those of the first and second outer layers 151 and 152.
The plurality of dielectric layers 111 forming the capacitor body 110 are stacked in the Z direction and then sintered, and the adjacent dielectric layers 111 of the capacitor body 110 are integrated such that a boundary therebetween is not apparent without using a Scanning Electron Microscope (SEM).
Further, the capacitor body 110 includes a plurality of dielectric layers 111 and a plurality of first and second internal electrodes 121 and 122 having different polarities and alternately arranged in the Z direction, and the dielectric layers 111 are interposed between the first and second internal electrodes 121 and 122.
In addition, the capacitor body 110 may include an active region 115 as a portion contributing to formation of a capacity of the capacitor, and an upper cover region 112 and a lower cover region 113 as edge portions. In the active region, the first and second internal electrodes 121 and 122 are alternately disposed in the Z direction with the dielectric layer 111 interposed therebetween. The upper and lower cover regions are disposed on the upper and lower surfaces of the active region 115 in the Z direction, respectively.
In this case, the average thickness of each of the upper and lower cover regions 112 and 113 of the capacitor body 110 may be less than or equal to 20 μm. Here, referring to fig. 5, the average thickness of the upper and lower cover regions 112 and 113 may refer to an average thickness "b" of the upper and lower cover regions 112 and 113 in a thickness direction (Z-axis direction) of the capacitor body 110.
If the average thickness of each of the upper and lower capping regions 112 and 113 of the capacitor body 110 exceeds 20 μm, the size specification of the designed multilayer capacitor is exceeded, and thus there may be a problem in that the multilayer capacitor forms a high capacity.
As described above, the capacitor body 110 has an unlimited shape, and may have a hexahedral shape, and may include the first and second surfaces 1 and 2 opposite to each other in the Z direction, the third and fourth surfaces 3 and 4 connected to the first and second surfaces 1 and 2 and opposite to each other in the X direction, and the fifth and sixth surfaces 5 and 6 connected to the first and second surfaces 1 and 2, connected to the third and fourth surfaces 3 and 4, and opposite to each other in the Y direction. In this case, the first surface 1 may be a mounting surface.
The dielectric layer 111 may include a ceramic powder, for example, BaTiO3Base ceramic powders, and the like.
Further, BaTiO3The base ceramic powder may be (Ba)1-xCax)TiO3、Ba(Ti1-yCay)O3、(Ba1-xCax)(Ti1- yZry)O3、Ba(Ti1-yZry)O3Etc., wherein Ca or Zr is partially dissolved in BaTiO3However, embodiments of the present disclosure are not limited thereto.
In addition, ceramic additives, organic solvents, plasticizers, binders, dispersants, and the like may also be added to the dielectric layer 111 together with the ceramic powder.
The ceramic additives may include, for example, transition metal oxides or carbides, rare earth elements, magnesium (Mg), aluminum (Al), and the like.
The first and second internal electrodes 121 and 122 are electrodes applied with different polarities, formed on the dielectric layer 111, and stacked in the Z direction, and the first and second internal electrodes 121 and 122 may be alternately arranged inside the capacitor body 110 to be opposite to each other in the Z direction with a single dielectric layer 111 interposed therebetween.
In this case, the first and second internal electrodes 121 and 122 may be electrically insulated from each other by the dielectric layer 111 interposed therebetween.
In addition, the first internal electrode 121 is exposed through the third surface 3, the fifth surface 5, and the sixth surface 6 of the capacitor body 110. In this case, the first internal electrodes 121 may also be exposed through the corners of the capacitor body 110 connecting the third surface 3 to the fifth surface 5 and the corners of the capacitor body 110 connecting the third surface 3 to the sixth surface 6.
The second internal electrode 122 is exposed through the fourth surface 4, the fifth surface 5, and the sixth surface 6 of the capacitor body 110. In this case, the second internal electrodes 122 may also be exposed through the corner portions of the capacitor body 110 connecting the fourth surface 4 to the fifth surface 5 and the corner portions of the capacitor body 110 connecting the fourth surface 4 to the sixth surface 6.
In this case, the ends of the first and second internal electrodes 121 and 122 alternately exposed through the third and fourth surfaces 3 and 4 of the capacitor body 110 may be in contact with and connected to first and second external electrodes 131 and 132 (to be described later) disposed on both ends of the capacitor body 110 in the X direction, respectively.
According to the above configuration, when a predetermined voltage is applied to the first and second external electrodes 131 and 132, charges are accumulated between the first and second internal electrodes 121 and 122.
In this case, the capacitance of the multilayer capacitor 100 is proportional to the area of overlap between the first and second internal electrodes 121 and 122 (overlap with each other in the Z direction in the active region 115).
In the embodiment, when the first and second internal electrodes 121 and 122 are configured, not only the basic areas of the first and second internal electrodes 121 and 122 are enlarged, but also the capacity of the multilayer capacitor 100 can be increased by the increase of the vertical overlapping area.
Further, the step caused by the internal electrode can be reduced, and therefore the accelerated life of the insulation resistance can be improved. Accordingly, a multilayer capacitor having excellent capacity characteristics and improved reliability can be provided.
In this case, the material forming the first and second internal electrodes 121 and 122 is not particularly limited. For example, the first and second internal electrodes may be formed using a conductive paste formed of at least one of a noble metal material, nickel (Ni), and copper (Cu).
In addition, a method of printing a conductive paste, such as screen printing or gravure printing, may be used, but the embodiments of the present disclosure are not limited thereto.
In addition, the first and second internal electrodes 121 and 122 may have an average thickness of less than or equal to 0.4 μm.
If the average thickness of the first and second internal electrodes 121 and 122 exceeds 0.4 μm, it is difficult to increase the capacity of the multilayer capacitor 100.
In addition, the number of stacked first and second internal electrodes 121 and 122 may be 400 or more layers.
The first side portion is disposed on the fifth surface 5 of the capacitor body 110, and the second side portion is disposed on the sixth surface 6 of the capacitor body 110.
The first side portion is in contact with the front ends of the portions of the first and second internal electrodes 121 and 122 exposed through the fifth surface 5 of the capacitor body 110 to cover the front ends, and the second side portion is in contact with the front ends of the portions of the first and second internal electrodes 121 and 122 exposed through the sixth surface 6 of the capacitor body 110 to cover the front ends.
The first and second side portions may serve to protect the capacitor main body 110 and the first and second internal electrodes 121 and 122 from external impacts and to ensure insulating properties and moisture-resistant reliability of the capacitor main body 110 from the surroundings.
The first side portion includes a first inner layer 141 adjacent to the fifth surface 5 of the capacitor body 110 and a first outer layer 151 formed on the first inner layer 141.
In addition, the dielectric constant of the first inner layer 141 may be lower than that of the first outer layer 151.
The second side portion includes a second inner layer 142 adjacent to the sixth surface 6 of the capacitor body 110 and a second outer layer 152 formed on the second inner layer 142.
In addition, the dielectric constant of the second inner layer 142 may be lower than that of the second outer layer 152.
Further, in the first side portion, a ratio of a dielectric constant of the first inner layer 141 to a dielectric constant of the first outer layer 151 may be less than or equal to 0.5; in the second side portion, a ratio of the dielectric constant of the second inner layer 142 to the dielectric constant of the second outer layer 152 may be less than or equal to 0.5.
In this case, if the ratio of the dielectric constant of the first inner layer 141 to the dielectric constant of the first outer layer 151 exceeds 0.5 and the ratio of the dielectric constant of the second inner layer 142 to the dielectric constant of the second outer layer 152 exceeds 0.5, the difference in dielectric constant between the layers is not significant. Therefore, since the first and second outer layers 151 and 152 and the first and second inner layers 141 and 142 are included in the high dielectric constant region to cause electric field concentration, a problem of an increased occurrence rate of short circuits may occur.
The electric field is orthogonal to the surface of the conductor in the normal direction, and the electric field inside the conductor having an equipotential inside the conductor is cancelled out to 0.
When a neutral conductor is positioned between electrodes having a potential difference, the charge in the conductor rearranges according to the properties of the conductor.
The neutral conductor having the rearranged charges has the same effect as the electrodes, and has the effect of reducing the distance between the electrodes. Therefore, the increase in the electric field intensity is as shown in the following equation.
[ formula 1]
y=-∮E·dl
Therefore, when the dielectric constant of the first inner layer 141 is lower than that of the first outer layer 151 and the dielectric constant of the second inner layer 142 is lower than that of the second outer layer 152, the electric field is reduced to reduce the possibility of dielectric breakdown, and thus the reliability of the multilayer capacitor can be improved.
In this case, since the first and second side portions, when the ratio of the dielectric constant of the first inner layer 141 to the dielectric constant of the first outer layer 151 is less than or equal to 0.5 and the ratio of the dielectric constant of the second inner layer 142 to the dielectric constant of the second outer layer 152 is less than or equal to 0.5, the electric field is further reduced, and thus the reliability of the multilayer capacitor can be further improved.
In addition, the average thickness of each of the first side portion and the second side portion may be less than or equal to 10 μm. Here, referring to fig. 5, the average thickness of the first and second side portions may refer to an average thickness "a" of the first and second side portions in a width direction (Y-axis direction) of the capacitor body 110.
As the capacitor body 110 becomes smaller, the thickness of the side portion may further affect the electrical characteristics of the multilayer capacitor 100.
According to the embodiments of the present disclosure, the average thickness of each of the first side portion and the second side portion is formed to be less than or equal to 10 μm, and thus the characteristics of the miniaturized multilayer capacitor can be improved.
That is, since the average thickness of the first side portion and the second side portion is formed to be less than or equal to 10 μm, the maximum overlapping area of the inner electrodes forming the capacity is secured, and thus, a high capacity and a small multilayer capacitor can be realized.
Further, the average thickness of the first and second inner layers 141 and 142 and the first and second outer layers 151 and 152 may be different in the first and second side portions.
Electric field refraction occurs at the interface between a layer formed using a high dielectric constant material and a layer formed using a low dielectric constant material. When the electric field moves from a layer having a high dielectric constant to a layer having a low dielectric constant, the velocity of the electric field increases, and therefore the field shift amount becomes smaller, and therefore the angle of refraction of the electric field becomes larger than the angle of incidence. When the electric field moves from a layer having a low dielectric constant to a layer having a high dielectric constant, the velocity of the electric field decreases, so the field shift amount becomes large, and thus the angle of refraction of the electric field becomes smaller than the incident angle.
Here, the capacitor body 110 has a dielectric constant. Due to the above principle, the multilayer capacitor according to the embodiment is a combination of a high dielectric constant, a low dielectric constant, and a high dielectric constant arranged in this order. Accordingly, the electric field is concentrated in the first and second inner layers 141 and 142 having a low dielectric constant by the refracted electric field.
Therefore, in the first and second side portions, when the average thickness of the first inner layer 141 is different from the average thickness of the first outer layer 151 and the average thickness of the second inner layer 142 is different from the average thickness of the second outer layer 152, the magnitude of the electric field may be reduced. In detail, when the thickness (e.g., average thickness) of the first outer layer 151 is greater than the thickness (e.g., average thickness) of the first inner layer 141 and the thickness (e.g., average thickness) of the second outer layer 152 is greater than the thickness (e.g., average thickness) of the second inner layer 142, the electric field concentration phenomenon may be significantly reduced, thus reducing the total electric field to further improve the reliability of the multilayer capacitor.
Voltages having different polarities are supplied to the first and second external electrodes 131 and 132, and the first and second external electrodes are respectively disposed on both ends of the capacitor body 110 in the X direction, and are in contact with and connected to portions of the first and second internal electrodes 121 and 122 exposed through the third and fourth surfaces 3 and 4 of the capacitor body 110, and portions of the first and second internal electrodes 121 and 122 exposed through the third and fourth surfaces 3 and 4 of the capacitor body 110.
The first external electrode 131 may include a first connection portion 131a and a first band portion 131 b.
The first connection portion 131a is disposed on the third surface 3 of the capacitor body 110, and physically contacts and connects the first inner electrode 121 to the first outer electrode 131 with an end of the first inner electrode 121 exposed outward through the third surface 3 of the capacitor body 110.
The first band part 131b is a part extending from the first connection part 131a to a part of the first surface 1 of the capacitor main body 110.
In this case, if necessary, the first band part 131b also extends to the second surface 2, the fifth surface 5 and the sixth surface 6 of the capacitor main body 110 to improve the adhesive strength so as to cover one end of the first side part and one end of the second side part.
The second external electrode 132 may include a second connection portion 132a and a second band portion 132 b.
The second connection part 132a is disposed on the fourth surface 4 of the capacitor body 110, and physically contacts an end of the second inner electrode 122 exposed outward through the fourth surface 4 of the capacitor body 110, and connects the second inner electrode 122 to the second outer electrode 132.
The second band part 132b is a part extending from the second connection part 132a to a part of the first surface 1 of the capacitor body 110.
In this case, if necessary, the second band part 132b also extends to the second surface 2, the fifth surface 5, and the sixth surface 6 of the capacitor main body 110 to improve adhesive strength so as to cover the other end portion of the first side part and the other end portion of the second side part.
In addition, the average thickness of the first external electrode 131 and the average thickness of the second external electrode 132 may be less than or equal to 10 μm.
If the average thickness of the first external electrode 131 and the average thickness of the second external electrode 132 both exceed 10 μm, the size specification of the designed multilayer capacitor is exceeded, and thus there may be a problem in that the multilayer capacitor forms a high capacity.
Further, according to an embodiment, an ultra-small multilayer capacitor is provided. Here, the average thickness of the dielectric layer 111 is 0.4 μm or less, and the average thickness of the first and second internal electrodes 121 and 122 is 0.41 μm or less.
The dielectric layer 111, the first internal electrode 121, and the second internal electrode 122 may be in the form of thin films. Here, the thin film means not that the thickness of the dielectric layer 111 is less than or equal to 0.4 μm and the thickness of the first and second internal electrodes 121 and 122 is less than or equal to 0.41 μm, but may be understood as a concept including dielectric layers and internal electrodes having a reduced thickness as compared to products according to the related art.
Further, in the first side portion, a ratio of an average thickness of the first inner layer 141 to an average thickness of the first outer layer 151 may be 0.08 to 0.15, and in the second side portion, a ratio of an average thickness of the second inner layer 142 to an average thickness of the second outer layer 152 may be 0.08 to 0.15.
If the ratio of the average thickness of the first inner layer 141 to the average thickness of the first outer layer 151 is less than 0.08 and the ratio of the average thickness of the second inner layer 142 to the average thickness of the second outer layer 152 is less than 0.08, an electric field is contained in a region having a high dielectric constant and the average thickness of the inner layer is reduced, so that there may be a problem in that a short-circuit rate is increased.
If the ratio of the average thickness of the first inner layer 141 to the average thickness of the first outer layer 151 exceeds 0.15 and the ratio of the average thickness of the second inner layer 142 to the average thickness of the second outer layer 152 exceeds 0.15, the electric field value converges, and thus there may be a problem in that the dielectric function cannot be sufficiently performed.
Therefore, when the ratio of the average thickness of the first inner layer 141 to the average thickness of the first outer layer 151 is set between 0.08 and 0.15 and the ratio of the average thickness of the second inner layer 142 to the average thickness of the second outer layer 152 is set between 0.08 and 0.15, the short defect rate may be significantly reduced.
The dielectric layer may comprise nickel (Ni) particles or nickel oxide on the Y-Z plane.
Fig. 6 is a graph showing electric field intensity according to the size of Ni particles or nickel oxide included in such a dielectric layer, and the y-coordinate in fig. 6 represents a model coordinate in ANSYS Maxwell.
The size of the nickel particles or nickel oxide remaining in the dielectric layer needs to be smaller than that of the dielectric layer to prevent the occurrence of short circuits. In this experiment, the thickness of the dielectric layer was 5 μm, and the maximum diameter of the nickel particles or nickel oxide was 4 μm.
That is, fig. 6 shows the electric field intensity at a position where y is 90 μm and its vicinity according to the thickness of the inner layer of the side portion (e.g., first side portion, second side portion), and the electric field intensity decreases as y is away from 90 μm. For example, FIG. 6 shows that the thicknesses of the inner layers in the side portions of the two-layer structure, the dielectric constants ε of the inner layers, are respectively 0.5 μm, 1 μm, 1.5 μm, 2 μm, 3 μm, and the thicknesses of the corresponding outer layers are respectively 19.5 μm, 19 μm, 18.5 μm, 18 μm, 17 μmr1A dielectric constant ε of 1500r23000, the electric field intensity at a position where y is 90 μm and its vicinity; also shown are electric field strengths at positions where y is 90 μm and its vicinity when the dielectric constants of the side portions of the single-layer structure as a reference example are 1500 and 3000 (ref 1500 and ref3000 as shown in fig. 6), respectively.
The electric field of the side portion formed using the double layer in the embodiment is smaller than that in the case where the side portion is formed using a single layer having a low dielectric constant. Further, when the thickness of the inner layer of the side portion is 2 μm or more, the electric field value converges, and thus an optimum thickness can be set.
Accordingly, in the first and second side portions, a ratio of the average thickness of the first inner layer 141 to the average thickness of the first outer layer 151 may be preferably 0.08 to 0.15, and a ratio of the average thickness of the second inner layer 142 to the average thickness of the second outer layer 152 may be preferably 0.08 to 0.15.
Referring to fig. 7, the mounting substrate of the multilayer capacitor according to the embodiment includes a substrate 210 having first and second electrode pads 221 and 222 on one surface, and the multilayer capacitor 100 mounted such that first and second external electrodes 131 and 132 are respectively connected to the first and second electrode pads 221 and 222 on one surface (e.g., on an upper surface) of the substrate 210.
In an embodiment, although the multilayer capacitor 100 is shown and described as being mounted on the substrate 210 by solders 231 and 232, a conductive paste may be used instead of the solders if necessary.
As described above, according to the embodiments of the present disclosure, since the inner and outer layers of the side portion have different dielectric constants, refraction of an electric field occurs at the interface, and thus the reliability of the multilayer capacitor can be improved.
While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the scope of the invention defined by the appended claims.
Claims (27)
1. A multilayer capacitor, comprising:
a capacitor body including a dielectric layer and having first and second surfaces opposite to each other, third and fourth surfaces opposite to each other connecting the first surface to the second surface, and fifth and sixth surfaces opposite to each other connecting to the first, second, third and fourth surfaces;
a plurality of internal electrodes disposed inside the capacitor body, exposed to the fifth surface and the sixth surface, and having one end exposed to the third surface or the fourth surface;
first and second external electrodes disposed on the third and fourth surfaces of the capacitor body, respectively; and
first and second side portions disposed on ends of the internal electrodes exposed to the fifth and sixth surfaces, respectively,
wherein the first side portion and the second side portion are divided into an inner layer formed adjacent to the capacitor body and an outer layer formed on the inner layer and having a dielectric constant smaller than that of the outer layer, respectively,
the inner layer extending from the first surface to the second surface and from the third surface to the fourth surface, the inner layer separating the capacitor body from the outer layer,
wherein the first and second side portions are arranged such that a ratio of a dielectric constant of the inner layer to a dielectric constant of the outer layer is less than or equal to 0.5.
2. The multilayer capacitor of claim 1, further comprising: an upper cover region and a lower cover region each containing a dielectric material and disposed above an uppermost internal electrode of the plurality of internal electrodes and below a lowermost internal electrode of the plurality of internal electrodes, respectively.
3. The multilayer capacitor of claim 1, wherein the first and second side portions are arranged such that the ratio of the average thickness of the inner layer to the average thickness of the outer layer is 0.08 to 0.15.
4. The multilayer capacitor of claim 1, wherein the dielectric layers have an average thickness of less than or equal to 0.4 μm and the internal electrodes have an average thickness of less than or equal to 0.41 μm.
5. The multilayer capacitor of claim 1, wherein the average thickness of the first side portion and the average thickness of the second side portion are each less than or equal to 10 μ ι η.
6. The multilayer capacitor of claim 1, wherein the plurality of internal electrodes are stacked in a number of 400 or more layers.
7. The multilayer capacitor of claim 2, wherein the average thickness of each of the upper and lower cap regions of the capacitor body is less than or equal to 20 μ ι η.
8. The multilayer capacitor of claim 1, wherein the average thickness of the first external electrode and the average thickness of the second external electrode are each less than or equal to 10 μm.
9. The multilayer capacitor of claim 1, wherein the dielectric constant of the inner layer is less than the dielectric constant of the capacitor body.
10. The multilayer capacitor of claim 1, wherein the first external electrode comprises: a first connection portion provided on the third surface of the capacitor body and connected to an internal electrode; and a first strap portion extending from the first connection portion onto a portion of the first surface of the capacitor body;
the second external electrode includes: a second connection portion provided on the fourth surface of the capacitor body and connected to an internal electrode; and a second strap portion extending from the second connection portion onto a portion of the first surface of the capacitor body.
11. A multilayer capacitor, comprising:
a capacitor body including a dielectric layer and having first and second surfaces opposite to each other, third and fourth surfaces opposite to each other connecting the first surface to the second surface, and fifth and sixth surfaces opposite to each other connecting to the first, second, third and fourth surfaces;
a plurality of internal electrodes disposed inside the capacitor body, exposed to the fifth surface and the sixth surface, and having one end exposed to the third surface or the fourth surface;
first and second external electrodes disposed on the third and fourth surfaces of the capacitor body, respectively; and
first and second side portions disposed on ends of the inner electrodes exposed to the fifth and sixth surfaces, respectively,
wherein the first side portion and the second side portion are divided into an inner layer formed adjacent to the capacitor body and an outer layer formed on the inner layer and having a dielectric constant smaller than that of the outer layer, respectively,
the inner layer extending from the first surface to the second surface and from the third surface to the fourth surface, the inner layer separating the capacitor body from the outer layer,
wherein the first side portion and the second side portion are disposed such that a ratio of an average thickness of the inner layer to an average thickness of the outer layer is 0.08 to 0.15.
12. The multilayer capacitor of claim 11, further comprising: an upper cover region and a lower cover region each containing a dielectric material and disposed above an uppermost internal electrode of the plurality of internal electrodes and below a lowermost internal electrode of the plurality of internal electrodes, respectively.
13. The multilayer capacitor of claim 11, wherein the dielectric layers have an average thickness of less than or equal to 0.4 μm and the internal electrodes have an average thickness of less than or equal to 0.41 μm.
14. The multilayer capacitor of claim 11, wherein the average thickness of the first side portion and the average thickness of the second side portion are each less than or equal to 10 μ ι η.
15. The multilayer capacitor of claim 11, wherein the plurality of internal electrodes are stacked in a number of 400 or more layers.
16. The multilayer capacitor of claim 12, wherein the average thickness of each of the upper and lower cap regions of the capacitor body is less than or equal to 20 μ ι η.
17. The multilayer capacitor of claim 11, wherein the average thickness of the first external electrode and the average thickness of the second external electrode are each less than or equal to 10 μ ι η.
18. The multilayer capacitor of claim 11, wherein the dielectric constant of the inner layer is less than the dielectric constant of the capacitor body.
19. The multilayer capacitor of claim 11, wherein the first external electrode comprises: a first connection portion provided on the third surface of the capacitor body and connected to an internal electrode; and a first strap portion extending from the first connection portion onto a portion of the first surface of the capacitor body;
the second external electrode includes: a second connection portion provided on the fourth surface of the capacitor body and connected to an internal electrode; and a second strap portion extending from the second connection portion onto a portion of the first surface of the capacitor body.
20. A multilayer capacitor, comprising:
a body including first and second internal electrodes stacked in a thickness direction with a dielectric layer interposed between each pair of the first and second internal electrodes, the first internal electrode being exposed to a third surface of the body in a length direction and spaced apart from a fourth surface of the body opposite to the third surface, the second internal electrode being exposed to the fourth surface and spaced apart from the third surface;
a first external electrode disposed on the third surface and connected to the first internal electrode;
a second external electrode disposed on the fourth surface and connected to the second internal electrode; and
first and second side portions provided on fifth and sixth surfaces of the body, respectively, which are opposite to each other in a width direction, each of the first and second side portions including an inner layer contacting edges of the first and second internal electrodes in the width direction and an outer layer provided on the corresponding inner layer and having an average thickness greater than that of the inner layer, and
wherein the dielectric constant of the inner layer is smaller than the dielectric constant of the outer layer, and the inner layer extends from an upper surface to a lower surface of the body in the thickness direction, and the inner layer extends from the third surface to the fourth surface, the inner layer separates the body from the outer layer, and the first side portion and the second side portion are provided such that a ratio of the dielectric constant of the inner layer to the dielectric constant of the outer layer is less than or equal to 0.5.
21. The multilayer capacitor of claim 20, wherein the dielectric constant of the inner layer is less than the dielectric constant of the body.
22. The multilayer capacitor of claim 20, further comprising: upper and lower cover layers each containing a dielectric material and disposed above and below an uppermost one of the first and second internal electrodes, respectively.
23. The multilayer capacitor of claim 22, wherein each of the upper and lower cover layers has an average thickness of less than or equal to 20 μ ι η.
24. The multilayer capacitor of claim 20, wherein each of the first and second internal electrodes has an average thickness of less than or equal to 0.41 μ ι η.
25. The multilayer capacitor of claim 20, wherein the dielectric layers have an average thickness of less than or equal to 0.4 μ ι η.
26. The multilayer capacitor of claim 20, wherein the dielectric layer comprises nickel particles or nickel oxide.
27. A mounting substrate for a multilayer capacitor, comprising:
a substrate having first and second electrode pads on one surface; and
the multilayer capacitor as claimed in any one of claims 1 to 26, mounted such that the first and second external electrodes are connected to the first and second electrode pads, respectively.
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US12014880B2 (en) | 2024-06-18 |
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JP7516712B2 (en) | 2024-07-17 |
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JP2021015962A (en) | 2021-02-12 |
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