CN112187195B - Low-power-consumption radio frequency gain module amplifier chip - Google Patents
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- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
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Abstract
The invention discloses a low-power-consumption radio frequency gain module amplifier chip. The low-power-consumption radio frequency gain module amplifier chip comprises a common-emitter amplification structure, a Darlington amplification structure and a dynamic feedback structure. On one hand, the amplifier adopts a mode of cascading the common-emitter amplification structure and the Darlington amplification structure to improve the gain, and meanwhile, the amplifier is also beneficial to adjusting and improving the gain flatness. On the other hand, the dynamic feedback structure stabilizes the static working point and improves the linearity.
Description
Technical Field
The invention relates to a radio frequency gain module amplifier chip with low power consumption, belonging to the technical field of microelectronics, semiconductors and communication.
Background
The radio frequency gain module amplifier is widely applied to the system link stage and mainly used for providing gain compensation for a system link and amplifying signal power, and the noise coefficient, the linearity, the static power consumption and other radio frequency performances of the radio frequency gain module amplifier also need to be considered. The gain module is internally matched with the system impedance of 50 omega, so that the direct cascade use is facilitated. The gain module amplifier chip is widely used in radio frequency transceiving systems such as radio frequency communication, radio frequency measurement, radio frequency instruments, radars, electronic countermeasure and the like.
The performance of the gain module amplifier chip restricts the performance of the whole radio frequency system to a certain extent, and plays a vital role in improving the technical level of the whole radio frequency system. One radio frequency system usually needs a plurality of radio frequency gain module amplifiers, and the effect of reducing the static power consumption of a gain module amplifier chip is obvious for reducing the power consumption of the whole radio frequency system, so that the research on the high-performance radio frequency gain module amplifier chip with low power consumption has great application prospect and practical significance.
Disclosure of Invention
The radio frequency gain module amplifier chip with low power consumption improves the gain by adopting a cascade mode of a common emitter amplification structure and a Darlington amplification structure, and is also beneficial to adjusting and improving the gain flatness.
In order to solve the technical problem, the technical scheme of the invention is realized as follows:
the embodiment of the invention provides a low-power-consumption radio frequency gain module amplifier chip, which comprises a common emitter amplification structure, a Darlington amplification structure and a dynamic feedback structure, wherein the common emitter amplification structure comprises a common emitter, a Darlington amplifier and a dynamic feedback structure;
the common emitter amplifying structure comprises a transistor Q1, resistors R1, R2 and R6 and an inductor L1; the collector of the transistor Q1 is connected with a power supply through a resistor R1, and the emitter of the transistor Q1 is grounded through a series structure of a resistor R2 and an inductor L1; the base of the transistor Q1 is connected with the emitter of the transistor Q2 in the Darlington amplifying structure and the base of the transistor Q3 through a resistor R6, the collector of the transistor Q1 is connected with the base of the transistor Q2 in the Darlington amplifying structure, and the emitter of the transistor Q1 is connected with one end of a resistor R5 of the dynamic feedback circuit;
the Darlington amplifying structure comprises transistors Q2 and Q3, resistors R3 and R4, an inductor L2 and a capacitor C2; the base of the transistor Q2 is connected with the collector of the transistor Q1, the collector of the transistor Q2 is connected with the collector of the transistor Q3, the emitter of the transistor Q2 is connected with the base of the transistor Q3 and one end of a resistor R3, the other end of the resistor R3 is grounded, the resistor R4 and a capacitor C2 are connected in parallel to form a first parallel structure, one end of the first parallel structure is connected with the emitter of the transistor Q3, and the other end of the first parallel structure is grounded through an inductor L2;
the dynamic feedback structure comprises resistors R5 and R7, a capacitor C1 and a diode D1; the resistor R7 and the capacitor C1 are connected in parallel to form a second parallel structure, one end of the second parallel structure is connected with the base electrode of the transistor Q2, and the other end of the second parallel structure is connected with the other end of the resistor R5 through a diode;
the common emitter amplifying structure and the Darlington amplifying structure form a cascade circuit.
In the embodiments provided by the present invention, the negative feedback structure is widely applied. The common emitter amplifying structure comprises a common emitter negative feedback structure, and the common emitter negative feedback structure comprises an inductor L1 and a resistor R2. The Darlington amplification structure comprises a final negative feedback structure, and the final negative feedback structure comprises a resistor R4, a capacitor C2 and an inductor L2.
Further comprising an off-chip element comprising capacitances C3, C4 and C5, an inductance L3; the capacitor C3 is arranged at the input end of the amplifier chip; the capacitor C4 is arranged at the output end of the amplifier chip; the capacitor C5 is connected with a power supply in parallel and one end of the capacitor C5 is grounded; the inductor L3 is connected between the power supply end of the common emitter amplifying structure and the power supply end of the Darlington amplifying structure in a bridging mode and is connected with the power supply end.
Further, the cascade circuit is a multi-stage serial cascade or a parallel cascade. In the dynamic feedback structure, a plurality of dynamic feedback structures can be connected in parallel to form a new dynamic feedback circuit. In the dynamic feedback structure, a plurality of diodes D1 may also be connected in parallel. In the dynamic feedback structure, the diode D1 may also be changed to a diode connection of a transistor that connects the base and collector of the transistor.
The amplifier adopts a cascade mode of a common emitter amplification structure and a Darlington amplification structure to improve the gain, and is also beneficial to adjusting and improving the gain flatness. On the other hand, the dynamic feedback structure stabilizes the static operating point and improves the linearity. The parallel structure of the resistor and the capacitor is added on the dynamic feedback branch, for the direct current equivalent circuit, the total resistance of the dynamic feedback branch is increased, and the quiescent current of the branch is reduced, so that the total quiescent current of the circuit is reduced; for the radio frequency equivalent circuit, the resistance added on the dynamic feedback branch circuit is short-circuited by the capacitor connected in parallel, and the dynamic feedback effect is obvious. The circuit structure has the disadvantages that under the condition of extremely low frequency, in the parallel structure of the resistor and the capacitor added on the dynamic feedback branch, the resistance effect is more obvious, the total resistance on the feedback branch is overlarge to cause the feedback to be almost invalid, and the circuit can normally work in a working frequency band by increasing the capacitor. The gain module amplifier chip has the advantages of simple structure, small size, high gain, good gain flatness, high linearity, low static power consumption, good return loss and the like, and the low static power consumption especially improves the practicability of the gain module amplifier chip.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic circuit diagram of a low power consumption gain module amplifier chip according to an embodiment of the present invention.
FIG. 2 is a circuit diagram of an application of the chip circuit of the present invention.
FIG. 3 is a simulation result of the variation of quiescent current with temperature according to the present invention;
FIG. 4 is a simulation result of the small signal gain varying with frequency under the five temperature conditions of-55 deg.C, -40 deg.C, 25 deg.C, 85 deg.C, 125 deg.C;
FIG. 5 is a simulation result of the variation of noise coefficient with frequency under the five temperature conditions of-55 deg.C, -40 deg.C, 25 deg.C, 85 deg.C, 125 deg.C;
FIG. 6 shows the simulation results of the present invention outputting 1dB power compression point varying with frequency under the five temperature conditions of-55 deg.C, -40 deg.C, 25 deg.C, 85 deg.C, 125 deg.C;
FIG. 7 shows the simulation results of the third-order intermodulation point varying with frequency under the five-temperature conditions of-55 deg.C, -40 deg.C, 25 deg.C, 85 deg.C and 125 deg.C.
Detailed Description
The present invention is further described in detail below with reference to the attached drawings so that those skilled in the art can implement the invention by referring to the description text.
It will be understood that terms such as "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof.
The terms "first" and "second," and the like, in the description and in the claims of embodiments of the present invention are used for distinguishing between different objects and not for describing a particular order of the objects.
The invention provides a low-power consumption radio frequency gain module amplifier chip, which comprises a common emitter amplifying structure 1, a Darlington amplifying structure 2 and a dynamic feedback structure 3, wherein the common emitter amplifying structure comprises a common emitter amplifier, a common emitter amplifier and a common emitter amplifier; on one hand, the amplifier adopts a cascade mode of the common emitter amplification structure 1 and the Darlington amplification structure 2 to improve the gain, and is also beneficial to adjusting and improving the gain flatness. On the other hand, the dynamic feedback structure stabilizes the static operating point and improves the linearity.
The following explains the circuit principle of a low power consumption rf gain module amplifier chip according to an embodiment of the present invention in detail by using specific embodiments with reference to the drawings.
As shown in fig. 1, it can be seen that the low power consumption rf gain module amplifier chip includes a common emitter amplifying structure 1, a darlington amplifying structure 2, and a dynamic feedback structure 3;
it can be seen that the radio frequency signal is Input from the Input port of the chip, passes through the cascade circuit of the common emitter amplification structure and the darlington amplification structure configured by the dynamic feedback circuit with the resistor and capacitor parallel structure and the negative feedback circuit, and is Output from the Output port of the chip. The chip is powered by a single power supply Vcc.
The common emitter amplifying structure 1 comprises a transistor Q1, resistors R1, R2 and R6 and an inductor L1; the collector of the transistor Q1 is connected with a power supply through a resistor R1, and the emitter of the transistor Q1 is grounded through a resistor R2 and an inductor L1 in sequence; the base of the transistor Q1 is connected with the emitter of the transistor Q2 in the Darlington amplifying structure and the base of the transistor Q3 through a resistor R6, the collector of the transistor Q1 is connected with the base of the transistor Q2 in the Darlington amplifying structure, and the emitter of the transistor Q1 is connected with one end of a resistor R5 of the dynamic feedback circuit;
the Darlington amplifying structure 2 comprises transistors Q2 and Q3, resistors R3 and R4, an inductor L2 and a capacitor C2; the base of the transistor Q2 is connected with the collector of the transistor Q1, the collector of the transistor Q2 is connected with the collector of the transistor Q3, the emitter of the transistor Q2 is connected with the base of the transistor Q3 and one end of a resistor R3, the other end of the resistor R3 is grounded, the resistor R4 and a capacitor C2 are connected in parallel to form a first parallel structure, one end of the first parallel structure is connected with the emitter of the transistor Q3, and the other end of the first parallel structure is grounded through an inductor L2;
the resistor R4 and the capacitor C2 are connected in parallel to raise the high-frequency gain of the amplifier and improve the gain flatness, and the inductor L2 is mainly used for improving the output return loss.
The dynamic feedback structure 3 comprises resistors R5 and R7, a capacitor C1 and a diode D1; the resistor R7 and the capacitor C1 are connected in parallel to form a second parallel structure, one end of the second parallel structure is connected with the base electrode of the transistor Q2, and the other end of the second parallel structure is connected with the other end of the resistor R5 through a diode;
in the embodiment provided by the invention, a parallel structure of a resistor and a capacitor is added on the dynamic feedback structure, so that a direct current equivalent circuit and a radio frequency equivalent circuit of the dynamic feedback branch circuit are different. The resistance in the parallel structure of the resistance and the capacitor increases the series total resistance of the dynamic feedback branch circuit direct current equivalent circuit, and reduces the direct current power consumption of the dynamic feedback branch circuit, which is also the basis for reducing the direct current power consumption by the design; for the radio frequency equivalent circuit, the capacitor in the parallel structure short-circuits the resistor, which is the same as the radio frequency equivalent circuit of the dynamic feedback branch circuit without the resistor and capacitor parallel structure, thereby hardly influencing the radio frequency performance of the circuit. A disadvantage of this structure is that in a parallel arrangement of a resistor and a capacitor on the dynamic feedback branch, the capacitance cannot be infinite, resulting in that the operating frequency of the structure cannot be extended to very low frequencies, which is especially the case in integrated circuits.
Further, in the embodiment provided by the present invention, the common emitter amplifying structure includes a common emitter degeneration structure therein, and the common emitter degeneration structure includes an inductor L1 and a resistor R2.
Further, in the embodiment provided by the present invention, the darlington amplifying structure includes a final negative feedback structure, and the final negative feedback structure includes a resistor R4, a capacitor C2, and an inductor L2.
As shown in fig. 2, it can be seen that the off-chip also includes off-chip elements including capacitors C3, C4, and C5, inductor L3; the capacitor C3 is arranged at the input end of the amplifier chip; the capacitor C4 is arranged at the output end of the amplifier chip; the capacitor C5 is connected with a power supply in parallel and one end of the capacitor C5 is grounded; the inductor L3 is connected between the power supply end of the common emitter amplifying structure and the power supply end of the Darlington amplifying structure in a bridging mode and is connected with the power supply end.
Specifically, in the embodiment provided by the invention, the off-chip element comprises an inductor L3, a capacitor C3, a capacitor C4 and a capacitor C5. The capacitors C3 and C4 are off-chip blocking capacitors of the input port and the output port respectively; the capacitor C5 is an off-chip decoupling capacitor; the inductor L3 is an off-chip choke inductor, which isolates the common emitter amplifying structure power supply terminal from the Darlington amplifying structure power supply terminal in radio frequency, and also prevents output power leakage. The power supply end is connected with an external decoupling capacitor C5 in parallel, and radio frequency leakage signals and power supply clutter are filtered out, so that signal crosstalk is prevented.
Preferably, the cascade circuit is a multi-stage serial cascade or a parallel cascade.
Preferably, in the dynamic feedback structure, a plurality of dynamic feedback structures may be connected in parallel to form a new dynamic feedback circuit.
Preferably, in the dynamic feedback structure, a plurality of diodes D1 may be connected in parallel.
Preferably, in the dynamic feedback structure, the diode D1 can be changed into a diode connection mode of a transistor; the diode connection mode of the transistor is that the base electrode of the transistor is connected with the collector electrode.
The invention adopts the cascade circuit of the common emitter amplification structure and the Darlington amplification structure to realize high gain, and uses the negative feedback circuit to improve the gain flatness of the amplifier and realize broadband matching.
The resistor R2 and the inductor L1 are a negative feedback structure of a first common emitter amplifier stage, improve input echo and adjust gain, noise and linearity of the first common emitter amplifier stage;
a resistor R4, a capacitor C2 and an inductor L2 form a final-stage transistor negative feedback structure of a Darlington amplification structure, R4 adjusts static bias current and serves as a ballast resistor to improve the thermal stability of the circuit, the parallel connection structure of R4 and C2 improves high-frequency gain and gain flatness, and the inductor L2 improves output echo;
resistor R6 is both feedback and provides self-bias for the first common-emitter amplifier stage;
the parallel structure of the resistor R5, the diode D1, the resistor R7 and the capacitor C1 forms a dynamic feedback branch circuit, so that the circuit performance is influenced, the static working point is further stabilized, the linearity of the amplifier is improved, and the circuit stability is improved;
the parallel structure of the resistor R7 and the capacitor C1 can reduce the static power consumption of the dynamic feedback branch circuit, so that the static power consumption of a chip is reduced, meanwhile, the capacitance value of the capacitor C1 is properly selected, the radio frequency short circuit of the resistor R7 is realized in a working frequency band, and the normal realization of the radio frequency performance is ensured.
As shown in fig. 3, it can be seen that in the solution provided by the present invention, the quiescent current becomes larger as the temperature increases.
As shown in fig. 4, it can be seen that, in the technical solution provided by the present invention, at different temperatures, when the frequency is 0.1-3 GHz, the signal gain is basically unchanged, but when the frequency exceeds 3GHz, the signal gain begins to decrease.
As shown in fig. 5, it can be seen that, in the technical solution provided by the present invention, at different temperatures, when the frequency gradually increases, the noise coefficient also starts to slowly increase gradually, but different temperatures have certain influence on the noise coefficient, and the higher the temperature is, the larger the noise coefficient is.
As shown in fig. 6, it can be seen that, in the technical solution provided by the present invention, at different temperatures, when the frequency is 0.1-2.5 GHz, the output 1dB power compression point is basically unchanged, but when the frequency exceeds 2.5GHz, the output 1dB power compression point starts to drop significantly.
As shown in fig. 7, it can be seen that, in the technical solution provided by the present invention, at different temperatures, when the frequency is gradually increased, the third-order intermodulation point is decreased with the increase of the frequency.
While embodiments of the invention have been disclosed above, it is not limited to the applications listed in the description and the embodiments. It can be applied to all kinds of fields suitable for the present invention. Additional modifications will readily occur to those skilled in the art. It is therefore intended that the invention not be limited to the exact details and illustrations described and illustrated herein, but fall within the scope of the appended claims and equivalents thereof.
Claims (8)
1. A radio frequency gain module amplifier chip with low power consumption is characterized by comprising a common emitter amplification structure, a Darlington amplification structure and a dynamic feedback structure;
the common emitter amplifying structure comprises a transistor Q1, resistors R1, R2 and R6 and an inductor L1; the collector of the transistor Q1 is connected with a power supply through a resistor R1, and the emitter of the transistor Q1 is grounded through a series structure of a resistor R2 and an inductor L1; the base of the transistor Q1 is connected with the emitter of the transistor Q2 in the Darlington amplifying structure and the base of the transistor Q3 through a resistor R6, the collector of the transistor Q1 is connected with the base of the transistor Q2 in the Darlington amplifying structure, and the emitter of the transistor Q1 is connected with one end of a resistor R5 in the dynamic feedback structure;
the Darlington amplifying structure comprises transistors Q2 and Q3, resistors R3 and R4, an inductor L2 and a capacitor C2; the base of the transistor Q2 is connected with the collector of the transistor Q1, the collector of the transistor Q2 is connected with the collector of the transistor Q3, the emitter of the transistor Q2 is connected with the base of the transistor Q3 and one end of a resistor R3, the other end of the resistor R3 is grounded, the resistor R4 and a capacitor C2 are connected in parallel to form a first parallel structure, one end of the first parallel structure is connected with the emitter of the transistor Q3, and the other end of the first parallel structure is grounded through an inductor L2;
the dynamic feedback structure comprises resistors R5 and R7, a capacitor C1 and a diode D1; the resistor R7 and the capacitor C1 are connected in parallel to form a second parallel structure, the second parallel structure is used for reducing static power consumption of the dynamic feedback structure, one end of the second parallel structure is connected with a collector of the transistor Q2, and the other end of the second parallel structure is connected with the other end of the resistor R5 through a diode;
the common emitter amplifying structure and the Darlington amplifying structure form a cascade circuit.
2. The low power consumption rf gain modular amplifier chip as defined in claim 1, wherein the common emitter amplifying structure comprises a common emitter degeneration structure, the common emitter degeneration structure comprising an inductor L1 and a resistor R2.
3. The low power consumption rf gain module amplifier chip as defined in claim 1, wherein the darlington amplifying structure comprises a final negative feedback structure, the final negative feedback structure comprising a resistor R4, a capacitor C2, and an inductor L2.
4. The low power consumption radio frequency gain module amplifier chip of claim 1, further comprising off-chip elements including capacitors C3, C4, and C5, an inductor L3;
the capacitor C3 is arranged at the input end of the amplifier chip;
the capacitor C4 is arranged at the output end of the amplifier chip;
the capacitor C5 is connected with a power supply in parallel and one end of the capacitor C5 is grounded;
the inductor L3 is bridged between the power supply end of the common emitter amplifying structure and the power supply end of the Darlington amplifying structure and is connected with the power supply end.
5. The low power consumption rf gain module amplifier chip as defined in claim 1, wherein the cascade circuit is a multi-stage serial cascade or a parallel cascade.
6. The low power consumption rf gain module amplifier chip as defined in claim 1, wherein in the dynamic feedback structure, a plurality of dynamic feedback structures are connected in parallel to form a new dynamic feedback circuit.
7. The low power consumption rf gain module amplifier chip as defined in claim 1, wherein in the dynamic feedback configuration a plurality of diodes D1 are connected in parallel.
8. The RF gain module amplifier chip with low power consumption as claimed in claim 1, 6 or 7, wherein in the dynamic feedback structure, the diode D1 is changed into diode connection mode of the transistor, i.e. the base and collector of the transistor are connected.
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| US3378780A (en) * | 1964-10-07 | 1968-04-16 | Westinghouse Electric Corp | Transistor amplifier |
| US3764929A (en) * | 1971-06-07 | 1973-10-09 | Rca Corp | Push-pull darlington amplifier with turn-off compensation |
| JP2000068755A (en) * | 1998-08-18 | 2000-03-03 | Nec Corp | Feedback amplifier |
| TW200937881A (en) * | 2008-02-21 | 2009-09-01 | Univ Nat Central | Wideband active balance converter of Darlington pair |
| CN102111111A (en) * | 2009-12-23 | 2011-06-29 | 中国科学院微电子研究所 | Monolithic low noise amplifier using resistor for coupling and matching |
| KR101203010B1 (en) * | 2012-06-26 | 2012-11-21 | 주식회사 에이알디텍 | Linearity improved darlington amplifier circuit |
| US9124222B2 (en) * | 2013-03-14 | 2015-09-01 | Hittite Microwave Corporation | Internally, resistively, sensed darlington amplifier |
| JP6461652B2 (en) * | 2015-03-09 | 2019-01-30 | 株式会社東芝 | Transimpedance circuit |
| CN108649912A (en) * | 2018-07-24 | 2018-10-12 | 青海民族大学 | A kind of distributed power amplifier based on feedback-type three-level Darlington transistor |
| CN111756335B (en) * | 2020-07-01 | 2021-10-26 | 西安博瑞集信电子科技有限公司 | Radio frequency gain module amplifier chip |
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Address after: Building 12, Hard Technology Enterprise Community, No. 3000 Biyuan Second Road, High tech Zone, Xi'an City, Shaanxi Province, 710065 Patentee after: Borui Jixin (Xi'an) Electronic Technology Co.,Ltd. Address before: 22nd floor, East Building, block B, Tengfei Kehui City, 88 Tiangu 7th Road, Yuhua Street office, high tech Zone, Xi'an, Shaanxi 710000 Patentee before: XI'AN BORUI JIXIN ELECTRONIC TECHNOLOGY Co.,Ltd. |