CN112151618B - Manufacturing method of transverse super junction structure - Google Patents
Manufacturing method of transverse super junction structure Download PDFInfo
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
Abstract
The invention discloses a method for manufacturing a transverse super junction structure, wherein the transverse super junction structure is positioned in an epitaxial layer of a transverse diffusion transistor, and the method comprises the following steps: forming a plurality of barrier ribs which are arranged at intervals on the upper surface of the epitaxial layer; injecting first type doping ions obliquely downwards from the side edge of the barrier rib to form a first type doping rib with the width limited by the adjacent barrier ribs; attaching a side wall to the barrier strip to form a shielding layer covering the first type doping strip; and vertically injecting second-type doping ions from the upper part of the epitaxial layer to the lower part of the epitaxial layer so as to form second-type doping strips at the parts of the epitaxial layer which are not shielded by the shielding layer. The invention solves the technical problem that the manufacturing cost of the transverse super junction transistor is consumed due to the fact that a large number of masks are used.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a manufacturing method of a transverse super junction structure.
Background
A lateral-diffused metal-oxide semiconductor (LDMOS) is a power semiconductor device, and has a significant characteristic in that an epitaxial region is provided therein to share a reverse voltage, thereby having an excellent withstand voltage characteristic.
With the increasing use of LDMOS in integrated circuits, LDMOS also requires a low specific on-resistance to be reduced without losing withstand voltage, and one common method is to form a super junction structure in the epitaxial region. The super junction structure is specifically composed of N-type doped strips and P-type doped strips which are alternately arranged, the P-type doped strips have an auxiliary depletion effect on the N-type doped strips and the N-type epitaxial region for the N-type LDMOS, and the N-type doped strips have an auxiliary depletion effect on the P-type doped strips and the P-type epitaxial region for the P-type LDMOS, so that the epitaxial region can have higher doping concentration under the same voltage-resistant state, and the specific on-resistance of the LDMOS is further reduced. And the PN junction in the super junction structure can adjust the electric field distribution, so that the electric field distribution is more uniform, and the voltage resistance of the LDMOS is improved.
The conventional manufacturing process of the super junction structure is as follows: a mask is used for windowing the epitaxial region to inject N-type doped ions into the epitaxial region to form an N-type doped strip; and using another mask to open a window on the epitaxial region so as to implant P-type doping ions into the epitaxial region to form a P-type doping strip. The process needs two masks to manufacture the super junction structure, and has the technical problem of higher manufacturing cost.
Disclosure of Invention
In view of the above problems, it is an object of the present invention to provide a method of manufacturing a lateral superjunction structure to reduce the manufacturing cost of a lateral superjunction diffusion transistor by reducing the number of reticles used.
According to the present invention, there is provided a method of manufacturing a lateral super junction structure located within an epitaxial layer of a lateral diffusion transistor, the method comprising:
forming a plurality of barrier ribs arranged at intervals on the upper surface of the epitaxial layer;
injecting first type doping ions obliquely downwards from the side edge of the barrier rib to form a first type doping rib with the width limited by the adjacent barrier ribs;
attaching a side wall to the barrier strip to form a shielding layer covering the first type doping strip;
and vertically injecting second-type doping ions downwards from the upper part of the epitaxial layer to form second-type doping strips at the parts of the epitaxial layer which are not shielded by the shielding layer.
Optionally, forming a plurality of barrier ribs arranged at intervals on the upper surface of the epitaxial layer, includes:
forming a photoresist layer on the upper surface of the epitaxial layer;
pasting a mask plate on the upper surface of the photoresist layer, wherein the mask plate is made according to the preset shape and the preset arrangement condition of the stop bars;
and exposing and developing the photoresist layer by using the mask plate so as to form a plurality of barrier strips together with the patterned photoresist layer and the mask plate.
Optionally, the implanting of the first type dopant ions obliquely downward from the side edge of the barrier rib includes:
acquiring a preset edge position of a first type doped strip below the barrier strip on the target side of the barrier strip;
acquiring the height of the adjacent barrier rib of the barrier rib on the target side;
determining a tilt angle of the tilt implant with the preset edge position and the height of the adjacent barrier rib, and performing the tilt implant on the target side based on the tilt angle.
Optionally, performing the tilted implantation on the target side based on the tilt angle comprises:
determining an inside path with the bottom of the barrier rib and the inclination angle;
determining an outboard path with the top of the adjacent barrier rib and the tilt angle;
implanting the first type dopant ions under the barrier rib at the tilt angle within an intermediate range defined by the inner path and the outer path as boundaries.
Optionally, attaching a side wall to the barrier rib includes:
determining each edge of the first type doping strip below the barrier strip as an outer boundary;
coating a plurality of sub shielding layers between the side edge of the barrier strip and the outer boundary at the same side of the barrier strip layer by layer from the bottom to the top of the upper surface of the epitaxial layer, wherein,
the inner edge of each sub-shielding layer is adjacent to the blocking strip, and the outer edges of the sub-shielding layers gradually approach the blocking strip and form an arc surface from bottom to top.
Optionally, before coating the plurality of sub-shielding layers layer by layer from bottom to top, attaching a sidewall to the barrier rib further includes: removing the mask;
from bottom to top a plurality of sub-shielding layers of successive layer coating includes: and coating a plurality of sub shielding layers around the patterned photoresist layer.
Optionally, the first type of doped ions are P-type doped ions, and the second type of doped ions are N-type doped ions.
Optionally, the first type of doped ions are N-type doped ions, and the second type of doped ions are P-type doped ions.
Optionally, the laterally diffused transistor is an N-type laterally diffused transistor or a P-type laterally diffused transistor.
Optionally, the epitaxial layer is an initial epitaxial layer, and after a second-type doping strip is formed on a portion of the initial epitaxial layer that is not covered by the shielding layer, the method further includes:
removing the shielding layer on the upper surface of the initial epitaxial layer;
judging whether the accumulated thickness of each type of doping strips reaches the required thickness, if not, forming a current epitaxial layer on the upper surface of the initial epitaxial layer, wherein the preset thicknesses of the two types of doping strips in the current epitaxial layer are the same, and the thickness of the current epitaxial layer is equal to the preset thickness;
and determining the current epitaxial layer as the initial epitaxial layer, and jumping to the step of forming a plurality of barrier strips arranged at intervals on the upper surface of the initial epitaxial layer until the accumulated thickness of each type of doped strips reaches the respective required thickness.
Optionally, the first type doping strips and the second type doping strips are alternately arranged on the upper surface of the epitaxial layer along a direction perpendicular to the channel; and (c) a second step of,
one end of each of the first type doping strip and the second type doping strip is contacted with the body region of the transverse diffusion transistor;
the channel is a channel between a drain region and a source region in the lateral diffusion transistor, the body region is arranged on the epitaxial layer and in parallel with the super junction structure, the drain region is located on one side, far away from the body region, of the lateral super junction structure, and the source region is located in the body region and spaced from the lateral super junction structure.
The embodiment of the invention has the following beneficial effects:
in the manufacturing method of the transverse super junction structure, the first type doping strips are formed in an inclined injection mode limited by the barrier strips, the second type doping strips are formed in a vertical injection mode limited by the shielding layers, and the shielding layers are formed by attaching the side walls to the barrier strips, so that the participation of mask plates is not needed in the forming process of the second type doping strips, and the using number of the mask plates is reduced; and the barrier ribs are recycled in the forming process of the first type doping ribs and the second type doping ribs, so that the manufacturing cost of the transverse super junction diffusion transistor is effectively reduced.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
fig. 1 shows an exemplary schematic perspective structure of a lateral double diffused transistor;
fig. 2 shows a flowchart of a method for manufacturing a lateral super junction structure provided by a first embodiment of the present invention;
fig. 3a, 3b, 3c, 3d and 3e show schematic cross-sectional views of a lateral superjunction structure at various stages of manufacture in a first embodiment of the invention;
fig. 4 shows a flowchart of a method for manufacturing a lateral super junction structure provided by a second embodiment of the present invention;
fig. 5a, 5b, 5c, 5d, 5e, 5f, and 5g show schematic cross-sectional views of a lateral superjunction structure at various stages of manufacture in a second embodiment of the invention.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown. For simplicity, the semiconductor structure obtained after several steps can be described in one figure.
When a layer, a region, or a region is referred to as being "on" or "over" another layer, another region, or a region may be directly on or over the other layer, the other region, or another layer or a region may be included between the layer and the other layer or the other region. And, if the device is turned over, that layer, region, or regions would be "under" or "beneath" another layer, region, or regions.
If for the purpose of describing the situation directly on another layer, another region, the expressions "a is directly on B", "a is on and adjacent to B", "a is on and in contact with B", or "a is on the upper surface of B" will be used herein. In the present application, "a is directly in B" means that a is in B and a and B are directly adjacent, rather than a being in a doped region formed in B. Further, "a is located at the upper part of B" means that a is located in B and the top of a is exposed outside B.
The following detailed description of embodiments of the present invention is provided in connection with the accompanying drawings and examples.
Fig. 1 illustrates an exemplary lateral diffused transistor having a lateral super junction structure. Referring to fig. 1, the lateral diffusion transistor includes: a substrate 1; an epitaxial layer 2 located on the upper surface of the substrate 1; a body region 3 and a transverse super junction structure 4 which are positioned on the upper surface of the epitaxial layer 2 and are arranged side by side; a source region 5 located in the body region 3 and spaced apart from the lateral super junction structure 4, and a drain region 6 located on a side of the lateral super junction structure 4 away from the body region 3; a body contact region 7 positioned in the body region 3 and a gate dielectric structure 8 positioned on the upper surface of the body region 4; the body contact region 7 and the source region 5 are connected with the gate electrode S, the drain region 6 is connected with the drain electrode D, the gate dielectric structure 8 is connected with the gate electrode G, the transverse super junction structure 4 is composed of N-type doping strips N _ top and P-type doping strips P _ top which are arranged alternately, the N-type doping strips N _ top and the P-type doping strips P _ top are arranged alternately on the upper surface of the epitaxial layer 2 along the direction (the y direction as shown in the figure) vertical to the channel, and one end of each of the N-type doping strips N _ top and the P-type doping strips P _ top is in contact with the body region 4.
It will be appreciated that figure 1 shows an N-type lateral diffused transistor, the substrate 1, body region 3 and body contact regions 7 being P-type doped and the epitaxial region 2, source region 5 and drain region 6 being N-type doped. For a P-type ldmos transistor, the substrate 1, the body region 3 and the body contact region 7 are doped N-type, the epitaxial region 2, the source region 5 and the drain region 6 are doped P-type, and the lateral super junction structure 4 is also composed of alternately arranged N-type doped stripes N _ top and P-type doped stripes P _ top.
In the prior art, the manufacturing process of the transverse super junction structure 4 is as follows: a mask is used for windowing on the epitaxial region 2 to inject N-type doped ions into the epitaxial region 2, and N-type doped strips N _ top are formed; and, using another mask to open a window on the epitaxial region 2 to inject P-type doped ions into the epitaxial region 2, thereby forming a P-type doped strip P _ top. The process needs two masks to manufacture the transverse super junction structure 4, and has the technical problem of high manufacturing cost. In view of the above, embodiments of the present invention provide a method for manufacturing a lateral super junction structure, so as to reduce the manufacturing cost of a lateral diffusion transistor by reducing the number of masks used.
It should be noted that the method for manufacturing a lateral super junction structure provided by the embodiment of the present invention is used for manufacturing a lateral super junction structure in a lateral diffusion transistor, where the lateral diffusion transistor is an N-type lateral diffusion transistor or a P-type lateral diffusion transistor, and the lateral diffusion transistor includes, but is not limited to, the lateral diffusion transistor shown in fig. 1.
Fig. 2 is a flowchart illustrating a method for manufacturing a lateral super junction structure according to a first embodiment of the present invention. With reference to fig. 1 and 2, a method for manufacturing the lateral super junction structure includes:
in step S101, a plurality of barrier ribs are formed on the upper surface of the epitaxial layer 2.
Specifically, each barrier rib extends in the direction of the x-axis, and a plurality of barrier ribs are arranged in the y-direction. The dimension of each barrier rib in the y direction (hereinafter referred to as thickness) is set to be large enough to block ions without increasing the cost in consideration of the fact that the barrier rib blocks ions. The dimension (hereinafter referred to as height) of each barrier rib in the z direction and the spacing distance from the adjacent barrier rib need to be configured according to the preset width of the first type doping rib below the barrier rib.
Step S102, injecting first type doping ions from the side edge of the barrier rib to incline downwards so as to form a first type doping rib with the width limited by the adjacent barrier ribs.
In particular, the doping stripes of the first type are located directly below the barrier stripes in the epitaxial layer 2 and extend to both sides in the y-direction. The first type dopant ions are obliquely implanted into the epitaxial layer 2 under one barrier rib at a certain inclination angle, and the traveling path of the first type dopant ions is blocked by the adjacent barrier rib, so that the width of the first type dopant rib under the current barrier rib is limited by the adjacent barrier rib.
Step S103, pasting a side wall on the barrier strip to form a shielding layer covering the first type doping strip.
Specifically, the shielding layer is also used to block ions, so the thickness of the shielding layer needs to ensure that the ions cannot pass through; and, since the shielding layer covers the already formed first-type doping strip, the cross-sectional areas of the shielding layer and the first-type doping strip in the xy plane are equal.
Step S104, vertically implanting second-type doping ions from above the epitaxial layer 2 to form second-type doping strips at portions of the epitaxial layer 2 not shielded by the shielding layer, that is, forming second-type doping strips in gaps of the first-type doping strips, so that the second-type doping strips and the first-type doping strips are alternately arranged along the y direction to form the lateral super-junction structure 4.
In the embodiment of the invention, the first type doping strip is formed in an inclined injection mode limited by the barrier strip, the second type doping strip is formed in a vertical injection mode limited by the shielding layer, wherein the shielding layer is formed by attaching the side wall to the barrier strip, so that the participation of a mask is not needed in the forming process of the second type doping strip, and the using number of the mask is reduced; and the barrier ribs are recycled in the forming process of the first type doping ribs and the second type doping ribs, so that the manufacturing cost of the transverse super junction diffusion transistor is effectively reduced.
It should be noted that the doping types of the first type doping ions and the second type doping ions are different, wherein if the first type doping ions are P type doping ions, the second type doping ions are N type doping ions, the first type doping strips are P type doping strips P _ top, and the second type doping strips are N type doping strips N _ top; if the first type doping ions are N type doping ions, the second type doping ions are P type doping ions, the first type doping strips are N type doping strips N _ top, and the second type doping strips are P type doping strips P _ top. The first type dopant ions are not limited to P-type dopant ions or N-type dopant ions.
Fig. 3 a-3 e show schematic cross-sectional views of lateral superjunction structure 4 at various stages of fabrication, i.e., cross-sectional views at yz parallel plane taken along cross-section AA' in fig. 1, according to an embodiment of the present invention. The above-mentioned method for manufacturing the lateral superjunction structure 4 is described in detail with reference to fig. 3a to 3e, taking the first type dopant ions as P-type dopant ions as an example.
Referring to fig. 3a, in step S101, a plurality of barrier ribs arranged at intervals are formed on an upper surface of the epitaxial layer 2, including: forming a photoresist layer PR on the upper surface of the epitaxial layer 2, attaching a mask to the upper surface of the photoresist layer PR, exposing and developing the photoresist layer PR by using the mask, and finally forming a patterned photoresist layer PR as shown in fig. 3 b. The mask is made according to preset shapes and preset arrangement conditions of the barrier strips, and projection graphs of the barrier strips 11 on the xy plane are determined by the mask; the patterned photoresist layer PR and the mask together form a plurality of barrier ribs 11, and the height of each barrier rib 11 is equal to the sum of the height of the photoresist layer PR and the height of the mask. It should be understood that fig. 3a and 3b show a cross-sectional view of a single reticle mask, not multiple reticle masks, and that fig. 3a and 3b show an exemplary reticle mask for forming 3 barrier ribs 11. In this way, in the step S101, a plurality of barrier ribs 11 are manufactured by using one mask, and finally, the mask serves as a part of the barrier ribs 11, so that the height of the barrier ribs 11 does not need to be provided by completely depending on the photoresist layer PR, which is beneficial to saving the manufacturing cost.
Referring to fig. 3c, in step S102, first type dopant ions are implanted from the side of the barrier rib 11 to be inclined downward, including: acquiring a preset edge position Q of a first type doping strip P _ top below a barrier strip 11 at the target side of the barrier strip 11; acquiring the height h of the adjacent barrier rib 11 of the barrier rib 11 on the target side; and determining the inclination angle alpha of the inclined implantation according to the preset edge position Q and the height h of the adjacent barrier rib 11, and performing the inclined implantation on the target side based on the inclination angle alpha to ensure that the edge position of the first type doping strip P _ top on the target side of the barrier rib 11 is coincident with the preset edge position Q.
Specifically, the tilt angle α of the tilt implantation is determined by the preset edge position Q and the height h of the adjacent barrier rib 11, that is, the angle between the line from the edge position Q to the top end of the adjacent barrier rib 11 and the upper surface of the epitaxial layer 2 is determined as the tilt angle α. It should be understood that the tilt angle α is the angle between the first type dopant ion implantation path and the upper surface of epitaxial layer 2, and for tilt implantation, 0 ° < tilt angle α <90 °.
It should be noted that, for the barrier rib 11 located at the left edge of the epitaxial layer 2, the target side is only the right side; for the barrier rib 11 located at the right edge of the epitaxial layer 2, the target side is only the left side; for the barrier rib 11 located at the non-edge position of the epitaxial layer 2, the target side includes a left side and/or a right side, wherein the tilt angles of the two sides may be equal or different if the target side includes the left side and the right side, if equal, the barrier rib 11 is finally located at the midpoint of the first-type doping rib P _ top, and if not equal, the barrier rib 11 is finally located above the first-type doping rib P _ top and is biased to the side with the smaller tilt angle α (i.e., the first-type doping rib P _ top extends further from the side with the larger tilt angle α directly below the barrier rib 11). In fig. 3c, for the barrier ribs 11 located at the non-edge positions of the epitaxial layer 2, the target side includes the left side and the right side, and the tilt angles of the two sides are equal.
Further, performing tilt implantation on the target side based on the tilt angle α, includes: determining an inner path (r) by the bottom of the barrier rib (11) and the inclination angle (alpha); determining an outer path (II) by the top of the adjacent barrier rib (11) of the target layer and the inclination angle (alpha); in the middle range defined by the inner path (i) and the outer path (ii), the first type doping ions are implanted under the current barrier rib 11 at the tilt angle α, so that the first type doping ions are all effectively utilized under normal conditions, and the cost of the first type doping ions is reduced. Here, the current barrier rib 11 and the adjacent barrier ribs 11 serve to block ions which are accidentally deviated from the predetermined trajectory, and assist in ensuring process accuracy.
Referring to FIG. 3d, step S103, the resistor pairLateral wall Spacer is established in 11 subsides of blend stop, includes: the edges of the first type doped stripes P _ top under the barrier stripes 11 are determined as an outer boundary (the left side is the outer boundary L) 1 The right side is an outer boundary L 2 ) (ii) a Between the stop strip side and the outer boundary of stop strip 11 with one side, begin from epitaxial layer 2 upper surface by the lower to upper successive layer coating a plurality of sub shielding layers, wherein, the inner edge of each sub shielding layer all borders on stop strip 11, and the outward flange of a plurality of sub shielding layers approaches stop strip 11 and form the cambered surface according to from the bottom up order gradually to have following a plurality of advantages: (1) ensuring that the first type doping strips P _ top are also completely covered by the shielding layer; (2) the material needed by the side wall Spacer is reduced relative to the situation that the outer edges of the plurality of sub-shielding layers form a vertical surface; (3) for the reason that the outer edges of the plurality of sub shielding layers form the vertical plane, the second type doped ions can avoid returning under the reflection action of the arc surface if impacting on the side wall Spacer in the process of vertically injecting the epitaxial layer 2.
It will be appreciated that the barrier rib 11 and its side wall Spacer together form a barrier layer.
Specifically, in order to save the manufacturing cost, for the barrier rib 11 located at the left edge of the epitaxial layer 2, a sidewall Spacer may be attached only to the right side of the barrier rib 11; for the barrier rib 11 located at the right edge of the epitaxial layer 2, a sidewall Spacer may be attached only to the left side of the barrier rib 11. Taking the left side of the barrier rib 11 as an example, a plurality of sub-shielding layers are located at the outer boundary L 1 And between the left side of the barrier rib 11, and the right edges of the plurality of sub-shielding layers are all adjacent to the barrier rib 11, and the left edges of the plurality of sub-shielding layers gradually approach the barrier rib 11 rightward according to the sequence from bottom to top and form an arc surface.
Optionally, before coating the plurality of sub-shielding layers layer by layer from bottom to top, attaching a sidewall Spacer to the barrier rib 11 further includes: removing the mask of the mask plate; correspondingly, a plurality of sub-shielding layers are coated layer by layer from bottom to top, and the method comprises the following steps: a plurality of sub-masking layers are applied around the patterned photoresist layer PR, thereby further reducing the material used for the sidewall Spacer.
Referring to fig. 3e, in step S104, second-type dopant ions are implanted vertically from above the epitaxial layer 2, i.e., the second-type dopant ions are injected toward the upper surface of the epitaxial layer 2 at an incident angle β of 90 °. Generally, there are a plurality of second-type doping strips N _ top in the epitaxial layer 2, and in order to reduce the waste of the second-type doping ions, one second-type doping ion beam may be used to form one second-type doping strip N _ top, that is, the second-type doping ion beam and the second-type doping strip N _ top are in a one-to-one correspondence relationship. Specifically, the plurality of second-type doping ion beams may be emitted simultaneously or in multiple times, which is not limited herein. For a second-type doping ion beam which vertically injects into a gap between two adjacent first-type doping strips P _ top, the width d of the second-type doping ion beam is larger than a first value and smaller than a second value, wherein the first value is a preset width of the first-type doping strip P _ top; the second value is the sum of the preset width of one first-type doped stripe P _ top and the preset width of one second-type doped stripe N _ top. The method for determining the width d of the second type doping ion beam by the preset width of the first type doping strip P _ top and the preset width of one second type doping strip N _ top enables the second type doping ion beam to be configured with the width in advance; and, when the ion implanter is located approximately in the middle of the gap between two adjacent first-type doping strips P _ top, the second-type doping ion beam can completely implant the epitaxial layer 2 between two adjacent first-type doping strips P _ top with the second-type doping ions, and there are not too many ineffective ion paths.
It should be noted that the preset widths of the plurality of first-type doping strips P _ top may not be identical, and the preset widths of the plurality of second-type doping strips N _ top may also not be identical, and in the process of forming the second-type doping strips N _ top by using the second-type doping ion beams, the width d of the second-type doping ion beams is determined by taking the preset width of the current second-type doping strip N _ top and the preset width of the first-type doping strip P _ top adjacent to the current second-type doping strip N _ top as references.
Fig. 4 is a flowchart illustrating a method for manufacturing a lateral super junction structure according to a second embodiment of the present invention. Referring to fig. 4, the manufacturing method includes:
step S101, forming a plurality of barrier ribs which are arranged at intervals on the upper surface of an initial epitaxial layer;
step S102, injecting first type doping ions from the side edge of the barrier rib to incline downwards so as to form a first type doping rib with the width limited by the adjacent barrier rib;
step S103, attaching a side wall to the barrier strip to form a shielding layer covering the first type of doped strip;
step S104, injecting second type doping ions vertically downwards from above the initial epitaxial layer to form second type doping strips at the parts of the initial epitaxial layer which are not shielded by the shielding layer;
step S105, removing the shielding layer on the upper surface of the initial epitaxial layer;
step S106, judging whether the accumulated thickness of each type of doping strips reaches the respective required thickness, if not, executing step S107, and if so, finishing the manufacture of the transverse super junction structure;
and S107, forming a current epitaxial layer on the upper surface of the initial epitaxial layer, wherein the preset thicknesses of the two types of doping strips in the current epitaxial layer are the same and equal to the preset thicknesses, and then, determining the current epitaxial layer as the initial epitaxial layer and then skipping to the step S101.
It should be noted that the first-type doping strips P _ top formed in the next initial epitaxial layer and the first-type doping strips P _ top formed in the previous initial epitaxial layer are stacked in a manner of being completely aligned in the vertical direction; similarly, the second-type doping strips N _ top formed in the subsequent initial epitaxial layer and the second-type doping strips N _ top formed in the previous initial epitaxial layer are stacked in such a manner as to be completely aligned in the vertical direction. Since the thickness of the current epitaxial layer formed in step S107 is equal to the preset thickness, there is no gap between two adjacent first-type doped strips P _ top and no gap between two adjacent second-type doped strips N _ top.
In particular, there are two types of doped stripes, namely a first type of doped stripe and a second type of doped stripe. It should be noted that, in the embodiment of the present invention, the thickness of the second-type doping strip N _ top formed in the first execution of step S104 is not limited to be the same as the thickness of the first-type doping strip P _ top in the same initial epitaxial layer, so that the first-type doping strip P _ top accumulated in multiple layers in the finally formed lateral super junction structure 4 may be different from the first-type doping strip N _ top accumulated in multiple layers, and the manufacturing of the lateral super junction structure is finished only after the accumulated thicknesses of the doping strips of the respective types are greater than the respective required thicknesses. It should be understood that the thickness of the second-type doped stripe N _ top formed during the first execution of step S104 is the same as the thickness of the first-type doped stripe P _ top in the same initial epitaxial layer, which is an alternative.
Compared with the manufacturing method provided by the first embodiment, the lateral super junction structure in this embodiment is configured by alternately arranging the multiple accumulated first-type doped stripes P _ top and the multiple accumulated second-type doped stripes N _ top. That is, the manufacturing method according to the embodiment of the present invention is to manufacture the lateral super junction structure 4 in multiple steps, and one layer of the first-type doping bar P _ top and the second-type doping bar N _ top is manufactured in each step, and the following description refers to "manufacturing the nth layer of the first-type doping bar P _ top and the second-type doping bar N _ top in the nth manufacturing process". The process of manufacturing a layer of the first-type doped stripe P _ top and the second-type doped stripe N _ top can refer to the content described in the first embodiment, and is not described herein again.
Fig. 5a to 5g are schematic cross-sectional views of the second layer of the first-type doped stripe P _ top and the second-type doped stripe N _ top (hereinafter, "the nth layer of the first-type doped stripe P _ top and the second-type doped stripe N _ top" is also referred to as "nth sub-super-junction structure layer") at various manufacturing stages in the second-step manufacturing process, wherein the first-type doped ions are selected as P-type doped ions. The second step manufacturing process is more clearly illustrated by combining fig. 3 a-3 e and fig. 5 a-5 g, and the manufacturing process of the k (k >2) th step can be referred to the second step manufacturing process. Fig. 5 a-5 g are briefly described below.
FIG. 5a shows: a cross-sectional view after forming the current epitaxial layer 12 (hereinafter, the epitaxial layer formed in the n-th fabrication process will be referred to as the n-th epitaxial layer 12) on the upper surface of the initial epitaxial layer 2.
FIG. 5b shows: and forming a photoresist layer PR on the upper surface of the second epitaxial layer 12, and attaching a mask on the upper surface of the photoresist layer PR.
FIG. 5c shows: the process of fig. 5b to 5c for the cross-sectional view after the formation of the patterned photoresist layer PR can be referred to the description of fig. 3a to 3b in the first embodiment.
FIG. 5d shows: the process from fig. 5c to fig. 5d can refer to the description of fig. 3b to fig. 3c in the first embodiment, through a cross-sectional view after the first-type dopant strips P _ top are formed in the second epitaxial layer 12 by means of a tilted implantation.
Fig. 5e shows: the process from fig. 5d to fig. 5e can refer to the description of fig. 3c to fig. 3d in the first embodiment, for the cross-sectional view after attaching the sidewalls to the barrier ribs above the second epitaxial layer 12.
FIG. 5f shows: the process from fig. 5e to fig. 5f can refer to the description of fig. 3d to fig. 3e in the first embodiment, after the formation of the second-type doped stripe N _ top in the second epitaxial layer 12 by vertical implantation.
FIG. 5g shows: in the cross-sectional view of fig. 5f with the blocking layer on the upper surface of the second epitaxial layer 12 removed, the lateral super junction structure 4 in this case includes a first sub-super junction structure layer and a second sub-super junction structure layer.
In the embodiment of the invention, the transverse super-junction structure 4 is formed by a plurality of sub super-junction structure layers formed in multiple steps, so that under the condition that an ion implanter is not enough to implant ions into the epitaxial layer for a preset depth at a single time, the transverse super-junction structure with the P-type doping strips P _ top and the N-type doping strips N _ top with preset thicknesses can still be manufactured.
Unless otherwise specifically noted above, various layers or regions of a semiconductor device may be composed of materials well known to those skilled in the art. Semiconductor materials include, for example, group III-V semiconductors such as GaAs, InP, GaN, and group IV semiconductors such as Si, Ge. The source, drain and gate electrodes and the gate conductive material may be formed of various conductive materials, such as a metal layer, a doped polysilicon layer, or a laminated conductor including a metal layer and a doped polysilicon layer, or other conductive materials, such as TaC, TiN, TaSiN, HfSiN, TiSiN, TiCN, TaAlC, TiAlN, TaN, PtSix, Ni 3 Si、Pt、Ru、W, and combinations of the various conductive materials. In the present application, the term "semiconductor structure" refers to the general term for the entire semiconductor structure formed in the various steps of manufacturing a semiconductor device, including all layers or regions that have been formed.
While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.
Claims (11)
1. A method of manufacturing a lateral superjunction structure, wherein the lateral superjunction structure is located within an epitaxial layer of a laterally diffused transistor, the method comprising:
forming a plurality of barrier ribs arranged at intervals on the upper surface of the epitaxial layer;
injecting first type doping ions obliquely downwards from the side edge of the barrier rib to form a first type doping rib with the width limited by the adjacent barrier ribs;
attaching a side wall to the barrier strip to form a shielding layer covering the first type doping strip;
vertically injecting second-type doping ions from the upper part of the epitaxial layer to the lower part of the epitaxial layer, so as to form a second-type doping strip at the part of the epitaxial layer which is not shielded by the shielding layer;
the first-type doping strips located at the non-edge positions of the epitaxial layer are formed by respectively injecting the first-type doping ions obliquely from the double-side edges of the barrier strips above the first-type doping strips.
2. The method for manufacturing the lateral super junction structure according to claim 1, wherein forming a plurality of barrier ribs arranged at intervals on the upper surface of the epitaxial layer comprises:
forming a photoresist layer on the upper surface of the epitaxial layer;
pasting a mask plate on the upper surface of the photoresist layer, wherein the mask plate is made according to the preset shape and the preset arrangement condition of the stop bars;
and exposing and developing the photoresist layer by using the mask plate so as to form a plurality of barrier strips together with the patterned photoresist layer and the mask plate.
3. The method for manufacturing the lateral super junction structure according to claim 2, wherein implanting first type dopant ions obliquely downward from the barrier rib side comprises:
acquiring a preset edge position of a first type doped strip below the barrier strip on the target side of the barrier strip;
acquiring the height of the adjacent barrier rib of the barrier rib on the target side;
determining a tilt angle of the tilt implant with the preset edge position and the height of the adjacent barrier rib, and performing the tilt implant on the target side based on the tilt angle.
4. The method of manufacturing a lateral superjunction structure according to claim 3, wherein performing the tilt implantation on the target side based on the tilt angle comprises:
determining an inside path with the bottom of the barrier rib and the inclination angle;
determining an outboard path with the top of the adjacent barrier rib and the tilt angle;
implanting the first type dopant ions under the barrier rib at the tilt angle within an intermediate range defined by the inner path and the outer path as boundaries.
5. The method for manufacturing a lateral super junction structure according to claim 2, wherein attaching a sidewall to the barrier rib comprises:
determining each edge of the first type doping strip below the barrier strip as an outer boundary;
coating a plurality of sub shielding layers between the side edge of the barrier strip and the outer boundary at the same side of the barrier strip layer by layer from the bottom to the top of the upper surface of the epitaxial layer, wherein,
the inner edge of each sub-shielding layer is adjacent to the blocking strip, and the outer edges of the sub-shielding layers gradually approach the blocking strip and form an arc surface from bottom to top.
6. The method of manufacturing a lateral superjunction structure of claim 5,
before coating a plurality of sub-shielding layers from bottom to top layer by layer, it still includes to block that the strip subsides establish the lateral wall: removing the mask;
from bottom to top a plurality of sub-shielding layers of successive layer coating includes: and coating a plurality of sub shielding layers around the patterned photoresist layer.
7. The method of manufacturing a lateral superjunction structure of claim 1,
the first type of doped ions are P-type doped ions, and the second type of doped ions are N-type doped ions.
8. The method of manufacturing a lateral superjunction structure of claim 1,
the first type of doped ions are N type doped ions, and the second type of doped ions are P type doped ions.
9. The method for manufacturing a lateral super junction structure according to claim 1, wherein the laterally diffused transistor is an N-type laterally diffused transistor or a P-type laterally diffused transistor.
10. The method for manufacturing a lateral superjunction structure according to any of claims 1 to 9, wherein the epitaxial layer is an initial epitaxial layer, and after forming the second-type doping strips in the portions of the initial epitaxial layer not shielded by the shielding layer, the method further comprises:
removing the shielding layer on the upper surface of the initial epitaxial layer;
judging whether the accumulated thickness of each type of doping strips reaches the required thickness, if not, forming a current epitaxial layer on the upper surface of the initial epitaxial layer, wherein the preset thicknesses of the two types of doping strips in the current epitaxial layer are the same, and the thickness of the current epitaxial layer is equal to the preset thickness;
and determining the current epitaxial layer as the initial epitaxial layer, and jumping to the step of forming a plurality of barrier strips arranged at intervals on the upper surface of the initial epitaxial layer until the accumulated thickness of each type of doped strips reaches the respective required thickness.
11. Method of manufacturing a lateral superjunction structure according to any of claims 1 to 9,
the first type doping strips and the second type doping strips are alternately arranged on the upper surface of the epitaxial layer along the direction vertical to the channel; and the number of the first and second groups,
one end of each of the first type doping strip and the second type doping strip is contacted with the body region of the transverse diffusion transistor;
the channel is a channel between a drain region and a source region in the lateral diffusion transistor, the body region is arranged on the epitaxial layer and in parallel with the super junction structure, the drain region is located on one side, far away from the body region, of the lateral super junction structure, and the source region is located in the body region and spaced from the lateral super junction structure.
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