CN112135390A - Dimming circuit and power supply chip - Google Patents
Dimming circuit and power supply chip Download PDFInfo
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- CN112135390A CN112135390A CN202011324829.9A CN202011324829A CN112135390A CN 112135390 A CN112135390 A CN 112135390A CN 202011324829 A CN202011324829 A CN 202011324829A CN 112135390 A CN112135390 A CN 112135390A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/32—Pulse-control circuits
- H05B45/325—Pulse-width modulation [PWM]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
Abstract
The invention discloses a dimming circuit and a power supply chip. The dimming circuit of the invention amplifies the reference voltage into the first amplified voltage, and then processes the first amplified voltage and the duty ratio of a received pulse width modulation dimming signal through the signal processing module, so that the first amplified voltage is associated with the duty ratio of the received pulse width modulation dimming signal, outputs the second output voltage, is superposed with the first output voltage generated by the output current on the sampling resistor after filtering attenuation operation, and is transmitted to the inverting terminal of the transconductance amplifier of the second amplifying module. The power supply chip can solve the problems that when the pulse width modulation is adopted for dimming and a small current is output, the difference among a plurality of power supply chips is easy to generate and the use of a user is influenced.
Description
Technical Field
The invention relates to the technical field of power chips, in particular to a dimming circuit and a power chip.
Background
Generally, a constant current driving is required for an LED (light emitting diode), and when the luminance is to be changed, the output current needs to be adjusted. Common current regulation techniques are PWM (pulse width modulation) and analog modulation.
Although the PWM dimming circuit is simple, easy to control, good in overall performance, and popular, it has the following problems: firstly, with the problems of myopia, asthenopia and the like of modern people, the requirements of people on eye hygiene are stronger and stronger, the stroboflash generated by the PWM dimming mode is easy to cause discomfort of eyes, and the use experience of users is not ideal; second, analog dimming can better avoid stroboscopic, and the PWM signal may be converted into analog dimming in a certain manner, but the method is usually implemented by adjusting a feedback pin of a power chip. Because the consistency of the reference of the feedback pin, the consistency of the PWM signal and the processing network thereof, and the like exist, the dimming method easily causes the problem of poor current consistency performance when the current is small, and is specifically embodied that when the brightness is adjusted for a plurality of devices at the same time, if the current is small, the brightness among the devices has an obvious difference, which affects the experience of consumers.
And in the working process of the PWM signal, the power supply chip is controlled to be switched on and off by using the PWM signal. If the frequency of the PWM signal is too low, a problem of LED flicker may occur. Meanwhile, if the frequency of the PWM signal is within the audio frequency range, it may cause an inductive howling; if the frequency of the PWM signal is too high, there is a high demand on the response speed of the power supply chip, and if the response speed is not sufficient, non-ideal linearity between the current and the duty ratio may occur. If the feedback pin of the power chip is directly controlled by the PWM signal, for the switching power chip, the response speed of the feedback pin is limited by the switching frequency inside the power chip, and the switching power chip cannot accept the high-frequency dimming signal, and can only perform dimming through the low frequency, and the problems are as described above. If the PWM signal is converted to a DC signal in a certain manner, the problems of flicker and howling can be avoided. However, due to the problems of consistency of peripheral devices, voltage consistency of feedback pins and consistency of amplitudes of PWM level signals, poor consistency is generated when a small current is output, and output current of partial equipment is zero and an LED is not bright directly; and the control method does not meet the requirement of mass production.
Disclosure of Invention
The embodiment of the invention provides a dimming circuit and a power supply chip, wherein the dimming circuit correlates the duty ratio of a dimming signal with the reference voltage of the power supply chip, so that the problems that when pulse width modulation is adopted for dimming and small current is output, the difference among a plurality of power supply chips is easy to generate and the use of a user is influenced can be solved.
According to an aspect of the present invention, there is provided a dimming circuit comprising: the current sampling module is used for collecting a first input current and outputting a first output voltage; the first amplifying module is used for receiving a reference voltage and amplifying according to the reference voltage so as to output a first amplifying voltage; the signal processing module is connected with the first amplifying module and used for receiving the first amplifying voltage and carrying out pulse width modulation on a signal corresponding to the first amplifying voltage so as to output a second output voltage; the signal integration module is respectively connected with the current sampling module and the signal processing module, and is used for superposing the received first output voltage and the second output voltage and outputting a third output voltage; and the second amplification module is connected with the signal integration module and used for amplifying the error between the third output voltage and the reference voltage and outputting a fourth output voltage, and the fourth output voltage is used for controlling the duty ratio of the power supply chip power tube.
Optionally, the first amplifying module includes: the operational amplifier, the second resistor and the third resistor; the first power end of the operational amplifier is connected with a power supply voltage end, the second power end of the operational amplifier is grounded, the non-inverting input end of the operational amplifier receives the reference voltage, the inverting input end of the operational amplifier is respectively connected with the first end of the second resistor and the second end of the third resistor, and the output end of the operational amplifier is connected with the output end of the first amplification module; the second end of the second resistor is grounded; and the first end of the third resistor is connected with the output end of the operational amplifier.
Optionally, the current sampling module includes: a sampling resistor and a light emitting diode; the first end of the sampling resistor is respectively connected with the cathode of the light-emitting diode and the output end of the current sampling module, and the second end of the sampling resistor is grounded; the anode of the light emitting diode receives a first input current, and the cathode of the light emitting diode is connected with the output end of the current sampling module.
Optionally, the signal processing module includes: a first comparator, a first transistor, and a second transistor; a first power supply end of the first comparator is connected with a power supply voltage end, a second power supply end of the first comparator is grounded, a non-inverting input end of the first comparator receives a pulse width modulation voltage signal, and an inverting input end of the first comparator receives the reference voltage; the grid electrode of the first transistor is connected with the output end of the first comparator, the source electrode of the first transistor is connected with the output end of the first amplification module, and the drain electrode of the first transistor is connected with the output end of the signal processing module; and the grid electrode of the second transistor is respectively connected with the output end of the first comparator and the grid electrode of the first transistor, the source electrode of the second transistor is grounded, and the drain electrode of the second transistor is respectively connected with the drain electrode of the first transistor and the output end of the signal processing module.
Optionally, when the voltage value of the pwm voltage signal is greater than the reference voltage, the second transistor is turned on, and the first transistor is turned off; when the voltage value of the pulse width modulation voltage signal is smaller than the reference voltage, the second transistor is turned off, and the first transistor is turned on.
Optionally, the signal integration module includes: the circuit comprises a first resistor, a fourth resistor, a fifth resistor and a first capacitor; the first end of the first resistor is connected with the output end of the current sampling module, and the second end of the first resistor is connected with the output end of the signal integration module; the first end of the first capacitor is connected to a connection point of the second end of the fourth resistor and the first end of the fifth resistor, and the second end of the first capacitor is grounded; a first end of the fourth resistor receives the second output voltage; and the second end of the fifth resistor is connected with the output end of the signal integration module.
Optionally, the second amplifying module comprises: an error amplifying unit and a compensating unit; the error amplifying unit is used for receiving the third output voltage and the reference voltage, amplifying the voltage difference between the third output voltage and the reference voltage and outputting a first current signal; the first end of the compensation unit is connected with the output end of the error amplification unit, the second end of the compensation unit is grounded, and the compensation unit is used for outputting corresponding fourth output voltage according to the first current signal.
Optionally, the error amplifying unit includes: a transconductance amplifier; a first power supply terminal of the transconductance amplifier is connected to a power supply voltage terminal, a second power supply terminal of the transconductance amplifier is grounded, an inverting input terminal of the transconductance amplifier receives the third output voltage, a non-inverting input terminal of the transconductance amplifier receives the reference voltage, and an output terminal of the transconductance amplifier outputs the first current signal.
Optionally, the compensation unit comprises: a sixth resistor and a second capacitor; a first end of the sixth resistor is connected to the output end of the error amplifying unit and the output end of the second amplifying module, respectively, and a second end of the sixth resistor is connected to the first end of the second capacitor; and the second end of the second capacitor is grounded.
The present invention also provides a power supply chip, including: the first amplifying module is used for receiving a reference voltage and amplifying according to the reference voltage so as to output a first amplifying voltage; the signal processing module is connected with the first amplifying module and used for receiving the first amplifying voltage and carrying out pulse width modulation on a signal corresponding to the first amplifying voltage so as to output a second output voltage; the signal integration module is connected with the signal processing module and used for superposing the received first output voltage and the second output voltage to output a third output voltage, wherein the first output voltage is output by an output end of an external current sampling module connected with the power supply chip; the second amplification module is connected with the signal integration module and used for receiving the third output voltage and the reference voltage, amplifying the voltage difference between the third output voltage and the reference voltage and outputting a first current signal, wherein the first current signal outputs a fourth output voltage after flowing through the compensation unit; the in-phase end of the second comparator is connected with the oscillator, the inverting end of the second comparator receives the fourth output voltage, the second comparator compares the output voltage of the oscillator with the fourth output voltage, and a fifth output voltage is correspondingly output according to the comparison result; when the output voltage of the oscillator is greater than the fourth output voltage, the fifth output voltage is at a high level, and when the output voltage of the oscillator is less than the fourth output voltage, the fifth output voltage is at a low level; the latch module is connected with the second comparator and used for receiving and storing the fifth output voltage and the first trigger signal; and the driving module is connected with the latch module and used for controlling the power tube of the power chip to be switched on or switched off according to the first trigger signal, the fifth output voltage is at a high level, the power tube of the power chip is in a cut-off state, and when the fifth output voltage is at a low level, the power tube of the power chip is in a switched-on state.
The embodiment of the invention provides a dimming circuit and a power supply chip. The dimming circuit of the invention amplifies the reference voltage into the first amplified voltage, and then processes the first amplified voltage and the duty ratio of a received pulse width modulation dimming signal through the signal processing module, so that the first amplified voltage is associated with the duty ratio of the received pulse width modulation dimming signal, outputs the second output voltage, is superposed with the first output voltage generated by the output current on the sampling resistor after filtering attenuation operation, and is transmitted to the inverting terminal of the transconductance amplifier of the second amplifying module. The power supply chip can solve the problems that when the pulse width modulation is adopted for dimming and a small current is output, the difference among a plurality of power supply chips is easy to generate and the use of a user is influenced.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
Fig. 1 is a schematic diagram of a dimming circuit according to an embodiment of the invention.
Fig. 2 is a connection diagram of a dimming circuit according to an embodiment of the invention.
Fig. 3 is a schematic diagram illustrating a variation of the output current IO with the duty ratio D under different reference voltage VREF deviations according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a power chip according to an embodiment of the invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Specifically, referring to fig. 1, the present invention provides a light modulation circuit 100, which includes: the current sampling module 110, the first amplifying module 120, the signal processing module 130, the signal integration module 140, and the second amplifying module 150.
The current sampling module 110 is configured to collect a first input current IO and output a first output voltage VRCS.
The first amplifying module 120 is configured to receive a reference voltage VREF and amplify the reference voltage VREF to output a first amplified voltage VA.
The signal processing module 130 is connected to the first amplifying module 120, and configured to receive the first amplified voltage VA, and perform pulse width modulation on a signal corresponding to the first amplified voltage VA to output a second output voltage VB.
The signal integration module 140 is respectively connected to the current sampling module 110 and the signal processing module 130, and is configured to superimpose the first output voltage VRCS and the second output voltage VB according to the received first output voltage VRCS and the second output voltage VB, so as to output a third output voltage VD.
The second amplifying module 150 is connected to the signal integration module 140, and is configured to amplify an error between the third output voltage and the reference voltage and output a fourth output voltage, where the fourth output voltage is used to control a duty ratio of a chip power tube, so as to adjust an output current of a power chip, that is, a current of a string of LEDs (formed by connecting a plurality of light emitting diodes DI in series), that is, a current flowing through a sampling resistor RCS.
Referring to fig. 2, the structure and function of each module will be described in detail below.
The current sampling module 110 includes: a sampling resistor RCS and a light emitting diode DI. A first end of the sampling resistor RCS is connected to the cathode of the light emitting diode DI and the output end of the current sampling module 110, respectively, and a second end of the sampling resistor RCS is grounded. The anode of the light emitting diode DI receives the first input current IO and is connected to the forward terminal LED +, and the cathode of the light emitting diode DI is connected to the output terminal of the current sampling module 110.
In the current sampling module 110, the string LEDs are connected in series with the sampling resistor RCS, so that the current ILED of the string LEDs is equal to the current IRCS flowing through the sampling resistor RCS and also equal to the first input current IO. Therefore, the voltage drop generated by the first input current IO flowing through the sampling resistor RCS is denoted as VRCS, i.e., the first output voltage VRCS.
The first amplification module 120 includes: an operational amplifier OP, a second resistor R2 and a third resistor R3.
A first power end of the operational amplifier OP is connected to a power supply voltage end, a second power end of the operational amplifier OP is grounded, a non-inverting input end of the operational amplifier OP receives the reference voltage VREF, inverting input ends of the operational amplifier OP are respectively connected to a first end of the second resistor R2 and a second end of the third resistor R3, and an output end of the operational amplifier OP is connected to an output end of the first amplifying module 120; a second end of the second resistor R2 is grounded; a first end of the third resistor R3 is connected to an output end of the operational amplifier OP.
In the first amplifying module 120, the operational amplifier OP, the second resistor R2 and the third resistor R3 form an in-phase operational amplifier, which amplifies the reference voltage VREF. The calculation formula of the first amplified voltage VA is as follows: VA = VREF (R3/R2+ 1).
The signal processing module 130 includes: a first comparator COMP1, a first transistor Q1, and a second transistor Q2.
A first power terminal of the first comparator COMP1 is connected to a supply voltage terminal VDD, a second power terminal of the first comparator COMP1 is grounded, a non-inverting input terminal of the first comparator COMP1 receives a pulse width modulation voltage signal VPWM, and an inverting input terminal of the first comparator COMP1 receives the reference voltage VREF.
The gate of the first transistor Q1 is connected to the output terminal of the first comparator COMP1, the source of the first transistor Q1 is connected to the output terminal of the first amplifying module 120, and the drain of the first transistor Q1 is connected to the output terminal of the signal processing module 130; the gate of the second transistor Q2 is connected to the output terminal of the first comparator COMP1 and the gate of the first transistor Q1, respectively, the source of the second transistor Q2 is grounded, and the drain of the second transistor Q2 is connected to the drain of the first transistor and the output terminal of the signal processing module, respectively.
When the voltage value of the pwm voltage signal VPWM is greater than the reference voltage, the second transistor Q2 is turned on, and the first transistor Q1 is turned off. When the voltage value of the pwm voltage signal VPWM is smaller than the reference voltage VREF, the second transistor Q2 is turned off, and the first transistor Q1 is turned on.
It should be noted that the pulse width modulation voltage signal VPWM is an amplitude signal of the PWM dimming signal, and when the voltage value of the pulse width modulation voltage signal VPWM is greater than the reference voltage VREF, the second transistor Q2 is turned on, and the first transistor Q1 is turned off; when the voltage value of the pwm voltage signal VPWM is smaller than the reference voltage VREF, the second transistor Q2 is turned off, and the first transistor Q1 is turned on. The signal processing module 130 generates a square wave signal with a high level amplitude VA, a low level amplitude 0 and a duty ratio of 1-D, so that the average voltage of the second output voltage VB is: VB = (1-D) × VA.
The signal integration module 140 includes: the circuit comprises a first resistor R1, a fourth resistor R4, a fifth resistor R5 and a first capacitor C1.
A first terminal of the first resistor R1 is connected to the output terminal of the current sampling module 110, and a second terminal of the first resistor R1 is connected to the output terminal of the signal integration module 140. The first end of the first capacitor C1 is connected to the connection point of the second end of the fourth resistor R4 and the first end of the fifth resistor R5, and the second end of the first capacitor C1 is grounded. A first end of the fourth resistor R4 receives the second output voltage VB; a second end of the fifth resistor R5 is connected to the output end of the signal integration module 140.
Since the time constants of the fourth resistor R4 and the first capacitor C1 are set to be much larger than the dimming frequency, the voltage signal of the second output voltage VB can be filtered into the voltage signal of the dc voltage VC after passing through the fourth resistor R4 and the first capacitor C1.
It should be noted that the third output voltage VD may be considered to be formed by superimposing two voltage portions, one of which is derived from the second output voltage VB, and the other of which is derived from the first output voltage VRCS. By using the principle of superposition, the third output voltage VD can be calculated.
When the second output voltage VB alone acts, the third output voltage VD can be referred to as VD 1. Since the sampling resistor RCS is very small compared to the first resistor R1, typically several tens of milliohms to several hundreds of milliohms, the influence of the sampling resistor RCS can be ignored, and then VD1 is calculated as follows:
VD1=(VB*R1)/(R1+R4+R5)
when the first output voltage VRCS alone acts, the third output voltage VD can be written as VD 2:
VD2=(VRCS*(R4+R5))/(R1+R4+R5)
the third output voltage VD after the two paths of signals are superimposed is the sum of VD1 and VD2, and equation 1 is obtained:
VD=(VB*R1)/(R1+R4+R5)+(VRCS*(R4+R5))/(R1+R4+R5)。
substituting the values of the second output voltage VB and the first output voltage VRCS into equation 1 can result in equation 2:
VD=(VREF*(R3/R2+1)*(1-D)*R1)/(R1+R4+R5)+(IO*RCS*(R4+R5))/(R1+R4+R5)。
the second amplification module 150 includes: an error amplification unit and a compensation unit 1501.
The error amplifying unit is used for receiving the third output voltage VD and the reference voltage VREF, amplifying the voltage difference of the third output voltage VD and the reference voltage VREF and outputting a first current signal.
A first end of the compensation unit 1501 is connected to an output end of the error amplification unit, a second end of the compensation unit 1501 is grounded, and the compensation unit is configured to output a corresponding fourth output voltage VE according to the first current signal.
The error amplifying unit includes a transconductance amplifier EA.
A first power end of the transconductance amplifier EA is connected to a supply voltage end VDD, a second power end of the transconductance amplifier EA is grounded, an inverting input end of the transconductance amplifier EA receives the third output voltage VD, a non-inverting input end of the transconductance amplifier EA receives the reference voltage VREF, and an output end of the transconductance amplifier EA outputs the first current signal.
The compensation unit 1501 includes: a sixth resistor RCOMP and a second capacitor CCOMP.
A first end of the sixth resistor RCOMP is connected to the output end of the transconductance amplifier EA and the output end of the second amplifying module 150, a second end of the sixth resistor RCOMP is connected to the first end of the second capacitor CCOMP, and a second end of the second capacitor CCOMP is grounded.
The compensation unit 1501 forms the second amplification module 150 into a closed loop.
In the transconductance amplifier EA, when the third output voltage VD is equal to the reference voltage VREF during normal operation, that is, VD = VREF, if corresponding resistors are set at the same time, the following steps are performed: R3/R2+1= (R1+ R4+ R5)/R1 and R1< < R4+ R5), equation 2 can be written as:
VREF=VREF*（1-D）+IO*RCS
sorting and IO solving:
IO = D × VREF/RCS, thereby enabling regulation of the output current IO by the duty cycle D.
The duty ratio D can be changed between 0 and 1, when the duty ratio D is 1, the output current is maximum, and when the duty ratio D is 0, the power tube of the power supply chip is cut off. In the production process of the power supply chip, certain errors are inevitably generated by the reference voltage VREF. Although theoretically raising the accuracy of the reference voltage VREF may reduce the problem of consistency in the output current IO, the accuracy of the reference voltage VREF cannot be raised infinitely. The precision of the reference voltage VREF commonly used at present is between 1% and 5%.
If the PWM signal and the filter network are superimposed on the feedback pin of the power chip, assuming that the defined maximum output current is IOMAX, and assuming that the reference voltage VREF has an error range of 5%, when the output current IO is maximum, the actual output current IO range is IOMAX ± 5% IOMAX. Considering the sensitivity of the human eye to light, these errors are generally not discernible by the human eye; however, when the output current IO is small, if the minimum output current set at this time is IOMIN, the actual output current IO range will be IOMIN ± 5% IOMAX. Since the value of the IOMIN is generally small, this range of current error is sufficient for the user to perceive the difference in brightness.
By using the circuit of the present invention, the relationship between the output current deviation Δ IO and the deviation Δ VREF of the reference voltage VREF is as follows:
∆IO=(D*∆VREF)/RCS。
also assuming that the deviation Δ VREF = 5%. VREF, then when the maximum current is output (D = 1), then
ΔIO=5%*IOMAX。
As shown in fig. 3, when the output current is a small current value, such as D =0.01, the output current deviation Δ IO = 0.05%. IOMAX; the error caused by the reference voltage deviation is attenuated by a factor of 100. It can be seen that when the duty ratio D is small, the error of the output current caused by the deviation of the reference voltage VREF can be greatly reduced or even completely ignored. As shown in fig. 3, reference numeral 11 is a 1.05 × VREF bias line, reference numeral 12 is a zero bias, and reference numeral 13 is a 0.95 × VREF bias line.
The embodiment of the invention provides a dimming circuit 100, which can be applied to a power chip. And the feedback voltage of the power supply chip is connected to the dimming circuit. After the reference voltage VREF of the power supply chip is compared, amplified and compensated, the reference voltage VREF is transmitted to the post-stage operation for controlling the conduction or the cut-off of the power tube.
The dimming circuit 100 can also be applied to a constant current chip, and since the feedback pin is to sample the voltage generated by the output current IO in the sampling resistor RCS to control the output current, the reference voltage VREF is usually set to be relatively low, for example, 0.1V to 0.2V, in order to reduce the loss of the sampling resistor.
As shown in fig. 4, the present invention further provides a power chip 200. The power supply chip 200 includes: the circuit comprises a power supply module 210, a first amplification module 220, a signal processing module 230, a signal integration module 240, a second amplification module 250, a latch module 260, a driving module 270, an oscillator 280, and a second comparator COMP 2.
The power supply module 210 is connected to a pin VCC.
The first amplifying module 220 is configured to receive a reference voltage VREF and amplify the reference voltage VREF to output a first amplified voltage VA.
The signal processing module 230 is configured to receive the first amplified voltage VA and perform pulse width modulation on a signal corresponding to the first amplified voltage VA to output a second output voltage VB.
The signal integration module 240 is connected to the signal processing module 230, and configured to output a third output voltage VD in a superimposed manner according to the received first output voltage VRCS and the second output voltage VB, where the first output voltage VRCS is output from an output terminal of an external current sampling module connected to the power chip.
The second amplifying module 250 is connected to the signal integration module 240, and is configured to receive the third output voltage VD and the reference voltage VREF, amplify a voltage difference between the third output voltage VD and the reference voltage VREF, and output a first current signal, where the first current signal flows through a compensation unit and then outputs a fourth output voltage VE.
The in-phase end of the second comparator COMP2 is connected to the oscillator 280, the inverting end of the second comparator COMP2 receives the fourth output voltage VE, and the second comparator COMP2 compares the output voltage of the oscillator 280 with the fourth output voltage VE and outputs a fifth output voltage VF according to the comparison result; when the output voltage of the oscillator 280 is greater than the fourth output voltage VE, the fifth output voltage VF is at a high level, and when the output voltage of the oscillator 280 is less than the fourth output voltage VE, the fifth output voltage VF is at a low level.
The latch module 260 is connected to an output terminal of the second comparator COMP2, and is configured to receive and store the fifth output voltage VF.
The driving module 270 is connected to the latch module 260, and is configured to control the power transistor of the power chip to be turned on or off according to the fifth output voltage VF. When the fifth output voltage VF is at a high level, the power tube of the power chip is in an off state, and when the fifth output voltage VF is at a low level, the power tube of the power chip is in an on state.
The power chip 200 of the present invention is based on the following principle: because the voltage value of the reference voltage VREF of the power chip 200 is relatively small and cannot be directly associated with the PWM signal, the first amplification module 220 is required to amplify the reference voltage VREF by a times, and the amplitude a of the signal output by the operational amplifier is the first amplification voltage VA of VREF; the first amplified voltage VA is processed by the signal processing module 230, so that the first amplified voltage VA is associated with the duty ratio of the input PWM dimming signal, and the associated voltage output by the signal processing module 230 is changed to (1-D) × a × VREF, which is the second output voltage VB. Because the amplitude of the second output voltage VB is large, the second output voltage VB cannot be directly integrated with the voltage signal on the sampling resistor RCS, and needs to be attenuated by the signal integration module 240, the second output voltage VB is attenuated to 1/a times of the original output voltage VB, and is superposed with the first output voltage VRCS generated by the RCS on the sampling resistor by the output current IO, and is transmitted to the inverting terminal of the transconductance amplifier of the second amplification module 250, because the inverting terminal of the transconductance amplifier is connected with the reference voltage source VREF, the voltage value of the inverting terminal is also VREF, and can be obtained:
VREF=VREF*（1-D）+IO*RCS
sorting and IO solving:
IO=D*VREF/RCS。
as can be seen from the formula, the output current IO is related to the duty ratio D of the power chip 200, and the reference voltage VREF of the power chip is related to the resistance value of the sampling resistor. For the mass-produced power chips 200, the reference voltage VREF value has positive and negative deviations, so the output current IO is also affected by the accuracy of the reference voltage VREF.
The power supply chip 200 of the present invention can solve the problems that when dimming is performed by pulse width modulation and a small current is output, differences among a plurality of power supply chips are easily generated and user usage is affected.
The output current IO is changed by changing the duty ratio D of the PWM signal. When the duty ratio is 100%, the output current IO is maximum. When the duty ratio is 0, the output current IO is 0. If the output current IO needs to be reduced, the reduction can be realized only by reducing the duty ratio D. When the duty cycle D falls to 1%, the output current IO =0.01 × VREF/RCS. Then, the difference Δ IO =0.01 × Δ VREF/RCS in output current between the plurality of power supply chips. Because the deviation delta VREF is originally small and is attenuated by 100 times, when the output current is small, the difference among a plurality of power chips can be ignored and can not be recognized by human eyes certainly, so that the functions of small output current and high consistency of the power chips during dimming are realized, and the problems of small output current and poor consistency of the power chips during dimming of the constant current chips in the market at present are solved.
The dimming circuit and the power supply chip provided by the embodiment of the invention are described in detail, and the principle and the implementation mode of the invention are explained by applying a specific example, and the description of the embodiment is only used for helping to understand the technical scheme and the core idea of the invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A dimming circuit, comprising:
the current sampling module is used for collecting a first input current and outputting a first output voltage;
the first amplifying module is used for receiving a reference voltage and amplifying according to the reference voltage so as to output a first amplifying voltage;
the signal processing module is connected with the first amplifying module and used for receiving the first amplifying voltage and carrying out pulse width modulation on a signal corresponding to the first amplifying voltage so as to output a second output voltage;
the signal integration module is respectively connected with the current sampling module and the signal processing module, and is used for superposing the received first output voltage and the second output voltage and outputting a third output voltage; and
and the second amplification module is connected with the signal integration module and used for amplifying the error between the third output voltage and the reference voltage and outputting a fourth output voltage, and the fourth output voltage is used for controlling the duty ratio of the power supply chip power tube.
2. The dimming circuit of claim 1,
the first amplification module includes: the operational amplifier, the second resistor and the third resistor; wherein the content of the first and second substances,
the first power end of the operational amplifier is connected with a power supply voltage end, the second power end of the operational amplifier is grounded, the non-inverting input end of the operational amplifier receives the reference voltage, the inverting input end of the operational amplifier is respectively connected with the first end of the second resistor and the second end of the third resistor, and the output end of the operational amplifier is connected with the output end of the first amplification module; the second end of the second resistor is grounded; and the first end of the third resistor is connected with the output end of the operational amplifier.
3. The dimming circuit of claim 1,
the current sampling module includes: a sampling resistor and a light emitting diode; the first end of the sampling resistor is respectively connected with the cathode of the light-emitting diode and the output end of the current sampling module, and the second end of the sampling resistor is grounded; the anode of the light emitting diode receives a first input current, and the cathode of the light emitting diode is connected with the output end of the current sampling module.
4. The dimming circuit of claim 1,
the signal processing module includes: a first comparator, a first transistor, and a second transistor; wherein the content of the first and second substances,
a first power end of the first comparator is connected with a power supply voltage end, a second power end of the first comparator is grounded, a non-inverting input end of the first comparator receives a pulse width modulation voltage signal, and an inverting input end of the first comparator receives the reference voltage;
the grid electrode of the first transistor is connected with the output end of the first comparator, the source electrode of the first transistor is connected with the output end of the first amplification module, and the drain electrode of the first transistor is connected with the output end of the signal processing module; and
the grid electrode of the second transistor is respectively connected with the output end of the first comparator and the grid electrode of the first transistor, the source electrode of the second transistor is grounded, and the drain electrode of the second transistor is respectively connected with the drain electrode of the first transistor and the output end of the signal processing module.
5. The dimming circuit of claim 4,
when the voltage value of the pulse width modulation voltage signal is greater than the reference voltage, the second transistor is turned on, and the first transistor is turned off;
when the voltage value of the pulse width modulation voltage signal is smaller than the reference voltage, the second transistor is turned off, and the first transistor is turned on.
6. The dimming circuit of claim 1,
the signal integration module comprises: the circuit comprises a first resistor, a fourth resistor, a fifth resistor and a first capacitor; wherein the content of the first and second substances,
the first end of the first resistor is connected with the output end of the current sampling module, and the second end of the first resistor is connected with the output end of the signal integration module; the first end of the first capacitor is connected to a connection point of the second end of the fourth resistor and the first end of the fifth resistor, and the second end of the first capacitor is grounded; a first end of the fourth resistor receives the second output voltage; and the second end of the fifth resistor is connected with the output end of the signal integration module.
7. The dimming circuit of claim 1,
the second amplification module includes: an error amplifying unit and a compensating unit; wherein the content of the first and second substances,
the error amplifying unit is used for receiving the third output voltage and the reference voltage, amplifying the voltage difference between the third output voltage and the reference voltage and outputting a first current signal;
the first end of the compensation unit is connected with the output end of the error amplification unit, the second end of the compensation unit is grounded, and the compensation unit is used for outputting corresponding fourth output voltage according to the first current signal.
8. The dimming circuit of claim 7,
the error amplification unit includes: a transconductance amplifier;
a first power supply terminal of the transconductance amplifier is connected to a power supply voltage terminal, a second power supply terminal of the transconductance amplifier is grounded, an inverting input terminal of the transconductance amplifier receives the third output voltage, a non-inverting input terminal of the transconductance amplifier receives the reference voltage, and an output terminal of the transconductance amplifier outputs the first current signal.
9. The dimming circuit of claim 7,
the compensation unit includes: a sixth resistor and a second capacitor;
a first end of the sixth resistor is connected to the output end of the error amplifying unit and the output end of the second amplifying module, respectively, and a second end of the sixth resistor is connected to the first end of the second capacitor;
and the second end of the second capacitor is grounded.
10. A power supply chip, characterized in that the power supply chip comprises:
the first amplifying module is used for receiving a reference voltage and amplifying according to the reference voltage so as to output a first amplifying voltage;
the signal processing module is connected with the first amplifying module and used for receiving the first amplifying voltage and carrying out pulse width modulation on a signal corresponding to the first amplifying voltage so as to output a second output voltage;
the signal integration module is connected with the signal processing module and used for superposing the received first output voltage and the second output voltage to output a third output voltage, wherein the first output voltage is output by an output end of an external current sampling module connected with the power supply chip;
the second amplification module is connected with the signal integration module and used for receiving the third output voltage and the reference voltage, amplifying the voltage difference between the third output voltage and the reference voltage and outputting a first current signal, wherein the first current signal flows through the compensation unit and then outputs a fourth output voltage;
the in-phase end of the second comparator is connected with the oscillator, the inverting end of the second comparator receives the fourth output voltage, the second comparator compares the output voltage of the oscillator with the fourth output voltage, and a fifth output voltage is correspondingly output according to the comparison result; when the output voltage of the oscillator is greater than the fourth output voltage, the fifth output voltage is at a high level, and when the output voltage of the oscillator is less than the fourth output voltage, the fifth output voltage is at a low level;
the latch module is connected with the output end of the second comparator and used for receiving and storing the fifth output voltage; and
and the driving module is connected with the latch module and used for controlling the conduction or the cut-off of the power tube of the power chip according to the fifth output voltage, when the fifth output voltage is at a high level, the power tube of the power chip is in a cut-off state, and when the fifth output voltage is at a low level, the power tube of the power chip is in a conduction state.
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| CN202011324829.9A CN112135390B (en) | 2020-11-24 | 2020-11-24 | Dimming circuit and power supply chip |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114594303A (en) * | 2022-05-10 | 2022-06-07 | 深圳英集芯科技股份有限公司 | Current sampling circuit and electronic equipment |
| CN114679815A (en) * | 2022-04-19 | 2022-06-28 | 珠海市圣昌电子有限公司 | Control circuit capable of changing response speed of feedback loop of LED dimming power supply in real time |
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| CN106102239A (en) * | 2016-07-05 | 2016-11-09 | 成都中冶节能环保工程有限公司 | A kind of LED energy-saving driving system based on power amplification circuit |
| CN107071982A (en) * | 2017-05-19 | 2017-08-18 | 深圳市晟碟半导体有限公司 | LED drive device and its invariable power light adjusting circuit, light-dimming method |
| CN206585793U (en) * | 2017-02-09 | 2017-10-24 | 上海晶丰明源半导体股份有限公司 | Controller, chip and LED drive system |
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| CN106102239A (en) * | 2016-07-05 | 2016-11-09 | 成都中冶节能环保工程有限公司 | A kind of LED energy-saving driving system based on power amplification circuit |
| CN206585793U (en) * | 2017-02-09 | 2017-10-24 | 上海晶丰明源半导体股份有限公司 | Controller, chip and LED drive system |
| CN107071982A (en) * | 2017-05-19 | 2017-08-18 | 深圳市晟碟半导体有限公司 | LED drive device and its invariable power light adjusting circuit, light-dimming method |
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| CN114679815A (en) * | 2022-04-19 | 2022-06-28 | 珠海市圣昌电子有限公司 | Control circuit capable of changing response speed of feedback loop of LED dimming power supply in real time |
| CN114594303A (en) * | 2022-05-10 | 2022-06-07 | 深圳英集芯科技股份有限公司 | Current sampling circuit and electronic equipment |
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| CN112135390B (en) | 2021-02-02 |
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