CN112105146A - Multilayer interconnection electronic circuit board - Google Patents
Multilayer interconnection electronic circuit board Download PDFInfo
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- CN112105146A CN112105146A CN202010981392.XA CN202010981392A CN112105146A CN 112105146 A CN112105146 A CN 112105146A CN 202010981392 A CN202010981392 A CN 202010981392A CN 112105146 A CN112105146 A CN 112105146A
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- 239000010410 layer Substances 0.000 claims description 16
- 210000001503 joint Anatomy 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 238000005476 soldering Methods 0.000 claims description 10
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 8
- 239000002356 single layer Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 abstract description 14
- 238000003466 welding Methods 0.000 abstract description 13
- 229910000679 solder Inorganic materials 0.000 description 16
- 238000003032 molecular docking Methods 0.000 description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 4
- 230000002411 adverse Effects 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 239000003292 glue Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000002390 adhesive tape Substances 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 239000006071 cream Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
Abstract
The invention relates to a multilayer interconnected electronic circuit board which comprises a mainboard, wherein at least two connecting points are arranged on the mainboard, a jumper board is correspondingly connected to the connecting points of the mainboard, the jumper board is a single-sided board, the area of the jumper board is smaller than that of the mainboard, a jumper line and a butt-joint welding pad are arranged on one surface, close to the mainboard, of the jumper board, a welding pad is arranged on the connecting points, and the butt-joint welding pad is connected with the welding pad. The invention has high material utilization rate and can effectively reduce the cost.
Description
[ technical field ] A method for producing a semiconductor device
The invention belongs to the technical field of circuit boards, and particularly relates to a multilayer interconnected electronic circuit board.
[ background of the invention ]
Both printed circuit boards and flexible circuit boards have the problem of line crossing, however, the wires cannot cross, so that one circuit board needs to be mounted on the other circuit board, and the lines which cannot be avoided are well arranged on the other circuit board in a non-crossed manner. When the actual crossed lines are simpler and fewer, the circuit board with large area will cause the disadvantages of low utilization rate and high cost.
[ summary of the invention ]
In order to overcome the problems in the prior art, the invention provides a multilayer interconnected electronic circuit board.
The multilayer interconnection electronic circuit board comprises a mainboard, at least two connecting points are arranged on the mainboard, jumper boards are correspondingly connected to the connecting points of the mainboard, the area of each jumper board is smaller than that of the mainboard, jumper circuits and butt-joint bonding pads are arranged on one surfaces, close to the mainboard, of the jumper boards, bonding pads are arranged on the connecting points, and the butt-joint bonding pads are connected with the bonding pads.
Preferably, a main output area and a main input area are arranged on the main board, the pads include a main input pad and a main output pad, the main output pad is arranged in the main output area, and the main input pad is arranged in the main input area; the secondary board is provided with a secondary output area and a secondary input area, the butt joint bonding pad comprises a secondary input bonding pad and a secondary output bonding pad, the secondary output bonding pad is arranged in the secondary output area, and the secondary input bonding pad is arranged in the secondary input area.
Preferably, the primary output pads are uniformly or non-uniformly distributed within the primary output region; the main input pads are uniformly or non-uniformly distributed in the main input area; the secondary output bonding pads are uniformly or non-uniformly distributed in the secondary output area; the secondary input pads are uniformly or non-uniformly distributed in the secondary input area.
Preferably, all be provided with the via hole on inferior input pad and the inferior output pad, the via hole switches on the upper and lower two sides of secondary board, inferior input pad and inferior output pad with the jumper wire circuit passes through the via hole switches on.
Preferably, the main board is a single-layer board or a multilayer board, and the material of the main board is any one or a combination of two of a PCB (printed circuit board) and an FPC (flexible printed circuit); the jumper wire board is a single-layer board or a multi-layer board, and is made of one or a combination of a PCB, an FPC and an insulating board; and/or the shape of the through hole is one or the combination of a plurality of oval holes, round holes, linear holes and cross holes.
Preferably, a solder is melted into the through hole, and the butt-joint bonding pad is connected with the bonding pad through the solder; and/or an ACF is arranged on the butt joint bonding pad or the bonding pad, and the butt joint bonding pad is connected with the bonding pad through the ACF.
Preferably, a plurality of main output test pads are uniformly arranged around the main output area, and secondary input test pads corresponding to the main output test pads one to one are uniformly arranged around the secondary input area; be equipped with many on the mainboard respectively with a plurality of the main output test circuit that main output test pad is connected, be equipped with many on the secondary board respectively with a plurality of the inferior input test circuit that inferior input test pad is connected, main output test circuit with the circuit of mainboard is not connected, inferior input test circuit with the circuit of secondary board is not connected, on the main output test pad with also be equipped with on the inferior input test pad the via hole, main output test pad with inferior input test pad is connected.
Preferably, a plurality of main input test pads are uniformly arranged around the main input area, and secondary output test pads corresponding to the main input test pads one to one are uniformly arranged around the secondary output area; the main board is provided with a plurality of main input test circuits which are respectively connected with the plurality of main input test pads, the secondary board is provided with a plurality of secondary output test circuits which are respectively connected with the plurality of secondary output test pads, the main input test circuits are not connected with the circuits of the main board, and the secondary output test circuits are not connected with the circuits of the secondary board; the main input test pad and the secondary output test pad are also provided with the via holes, and the main input test pad is connected with the secondary output test pad.
Preferably, at least one vent hole is formed in each of the main output area and the main input area, and the vent holes are communicated with the upper surface and the lower surface of the main board; and/or the secondary output area and the secondary input area are both provided with at least one exhaust hole, and the exhaust holes are communicated with the upper surface and the lower surface of the jumper board.
Preferably, a metal layer is plated in the through hole, the metal layer of the through hole on the secondary output pad is connected with the secondary output pad, and the metal layer of the through hole on the secondary input pad is connected with the secondary input pad.
Compared with the prior art, the multilayer interconnected electronic circuit board has the following advantages:
1. the multilayer interconnected electronic circuit board comprises a mainboard, wherein at least two connecting points are arranged on the mainboard, jumper boards are correspondingly connected to the connecting points of the mainboard, butt-joint bonding pads are arranged on the jumper boards, bonding pads are arranged on the connecting points, and the butt-joint bonding pads are connected with the bonding pads, so that more jumper circuits can be arranged on the jumper boards with smaller areas, the material utilization rate is further improved, and the cost can be effectively reduced.
2. The multilayer interconnected electronic circuit board provided by the first embodiment of the invention comprises the jumper board, and the jumper board adopts a double-sided board, so that more jumper circuits can be arranged on the jumper board with a smaller area, the material utilization rate is further improved, and the cost can be effectively reduced.
3. The multilayer interconnected electronic circuit board provided by the second embodiment of the invention comprises a secondary board, wherein the secondary board adopts a single-sided window board, a window is arranged at the position of the secondary board corresponding to the butt-joint bonding pad, the butt-joint bonding pad with a proper size is exposed, and the bonding pad penetrates through the window to be connected with the butt-joint bonding pad, so that more jumper circuits can be arranged on the jumper board with a smaller area, the material utilization rate is further improved, and the cost can be effectively reduced.
4. The butt joint bonding pad is provided with a via hole, the via hole enables the bonding pad with a certain area to vacate more tin passing channels, so that soldering tin can smoothly flow into the via hole, and insufficient soldering and other adverse phenomena can be effectively avoided.
5. The invention can discharge air through the vent hole during welding, effectively prevent cold joint, accelerate the solder inflow speed, and has sufficient solder amount, stable welding performance and high product quality.
[ description of the drawings ]
Fig. 1 is a schematic front view of a multilayer interconnected electronic circuit board according to a first embodiment of the present invention.
Fig. 2 is an enlarged view at a in fig. 1.
Fig. 3 is a schematic structural view of a multilayer interconnected electronic circuit board according to a first embodiment of the present invention.
Fig. 4 is a schematic view of a matching structure of the multilayer interconnected electronic circuit board according to the first embodiment of the present invention.
FIG. 5 is a schematic diagram of the structure of the back side of the jumper board and the front side of the main board of the multi-layer interconnection electronic circuit board according to the second embodiment of the present invention.
Fig. 6 is a schematic front view of a multilayer interconnected electronic circuit board according to a third embodiment of the present invention.
The attached drawings indicate the following: 1. a multilayer interconnected electronic circuit board; 10. soldering tin; 11. a main board; 12. a jumper board; 121. butting the bonding pads; 1211. a via hole; 111. a pad; 112. a primary output area; 113. a primary input area; 122. a secondary output area; 123. a secondary input area; 1121. a primary output pad; 1131. a primary input pad; 1221. a secondary output pad; 1231. a secondary input pad; 1122. a main output test pad; 1232. a secondary input test pad; 1132. a main input test pad; 1222. a secondary output test pad; 13. air holes; 14. a metal layer; 15. double-sided adhesive tape; 2. a multilayer interconnected electronic circuit board; 20. a window; 21. a secondary plate; 22. butting the bonding pads; 23. a main board; 24. a pad; 3. a multilayer interconnected electronic circuit board; 31. a jumper board; 32. butting the bonding pads; 33. a main board; 34. and a bonding pad.
[ detailed description ] embodiments
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1 and fig. 2, a multilayer interconnected electronic circuit board 1 according to a first embodiment of the present invention includes a main board 11 and one or more jumper boards 12, a jumper line (not shown) is disposed on a side of the jumper board 12 away from the main board 11, a plurality of butt-joint pads 121 are disposed on a side of the jumper board 12 close to the main board 11, via holes 1211 are disposed on the butt-joint pads 121, the butt-joint pads 121 and the jumper line are connected through the via holes 1211, a plurality of pads 111 are disposed on the main board 11 corresponding to the butt-joint pads 121, and the butt-joint pads 121 and the pads 111 are connected in a one-to-one correspondence.
It is understood that, in the embodiment of the present invention, the area of the jumper board 12 is smaller than that of the main board 11, the number of the jumper boards 12 is one, and a double-sided board is selected as the jumper board 12, so that the jumper line and the docking pad 121 can be disposed on two opposite sides of the jumper board 12. After the bonding pad 111 is connected to the butt bonding pad 121, the main board 11 is connected to the jumper board 12, so that the circuits of the multilayer interconnected electronic circuit board 1 are communicated through the jumper board 12. The via hole 1211 conducts opposite sides of the jumper board 12.
Further, the material of the main board 11 is any one of or a combination of two of a PCB and an FPC; the jumper board 12 is made of one or a combination of a PCB, an FPC and an insulating board. In the embodiment of the present invention, the main board 11 is a single-layer board, and the jumper board 12 is also a single-layer board. Referring to fig. 3, solder 10 is melted into the via 1211, the butt-joint pad 121 is connected to the pad 111 through the solder 10, and the via 1211 is circular in shape, so that more solder channels are left for the pad with a certain area, the solder 10 can smoothly flow into the via 1211, and insufficient solder and other adverse phenomena can be effectively avoided.
In other embodiments of the present invention, the main board 11 and the jumper board 12 may also be multilayer boards, and the shape of the via 1211 may be one or a combination of oval holes, straight holes, and cross holes. The docking pad 121 and the pad 111 may be connected by ACF or ACP, and ACF or silk-screen ACP paste is disposed on the docking pad 121 or the pad 111, so that the docking pad 121 and the pad 111 are connected.
Furthermore, to ensure the reliability of the connection between the docking pad 121 and the pad 111, a sealant (not shown) may be dispensed in the region of the docking pad 121 or the region of the pad 111, so as to enhance the connection strength between the docking pad 121 and the pad 111.
Referring to fig. 1, a main output area 112 and a main input area 113 are disposed on the main board 11, and a sub-output area 122 and a sub-input area 123 are disposed on the jumper board 12; a plurality of main output pads 1121 connected with the main board 11 in a circuit manner are arranged in the main output area 112, a plurality of main input pads 1131 connected with the main board 11 in a circuit manner are arranged in the main input area 113, and the pads 111 include the main output pads 1121 and the main input pads 1131. Be provided with in the inferior output district 122 a plurality of with jumper board 12 circuit connection and with the secondary output pad 1221 of main input pad 1131 one-to-one, be provided with in the inferior input district 123 a plurality of with jumper board 12 circuit connection and with main input pad 1121 one-to-one's secondary input pad 1231, the butt joint pad 121 include secondary output pad 1221 and secondary input pad 1231. The secondary input pad 1231 is soldered to the primary output pad 1121, and the secondary output pad 1221 is soldered to the primary input pad 1131, so that the circuit of the present invention is connected through the jumper board 12. The invention has simple structure, can avoid using the material of the whole board surface for a simple circuit, has high material utilization ratio compared with the traditional multilayer electronic circuit board, and can effectively reduce the cost.
In the embodiment of the present invention, the secondary output pad 1221 and the secondary input pad 1231 are both provided with a via 1211, and the via 1211 conducts the upper and lower surfaces of the jumper board 12. Through the design of the through hole 1211, the welding between the secondary output pad 1221 and the main input pad 1131 and between the secondary input pad 1231 and the main output pad 1121 can be firmer, the contact is more sufficient, and the phenomena of poor contact and the like can not be generated. In the present embodiment, the plurality of primary output pads 1121 are uniformly or non-uniformly distributed in the primary output region 112. Since the plurality of main output pads 1121 are not linearly distributed, more main output pads 1121 can be disposed in the main output region 112, so as to meet more requirements.
In an embodiment of the present invention, a plurality of the main input pads 1131 are distributed in a two-dimensional matrix in the main input area 113. Since the main input pads 1131 are distributed in a two-dimensional matrix, more main input pads 1131 can be arranged in the main input area 113, which meets more requirements.
Referring to fig. 1-3, at least one air vent 13 is disposed on both the main output area 112 and the main input area 113, and the air vent 13 communicates with the upper and lower surfaces of the motherboard 11; or the secondary output area 122 and the secondary input area 123 are both provided with at least one exhaust hole 13, and the exhaust holes 13 are communicated with the upper surface and the lower surface of the jumper board 12. The invention adopts a reflow soldering mode, wherein the reflow soldering is to melt tin from the surface to the inside by hot air, the air in the melted surface is exhausted through the exhaust holes 13, so that the insufficient soldering cannot be generated, and the design size of the hole diameter of the exhaust holes 13 is 0.05-0.2mm, and the optimal size is 0.1 mm. The invention can discharge air through the vent hole 13 during welding, effectively prevent cold joint, accelerate the solder inflow speed, and has sufficient solder amount, stable welding performance and high product quality.
Referring to fig. 1, a plurality of main output test pads 1122 are uniformly arranged around the main output region 112, and secondary input test pads 1232 corresponding to the main output test pads 1122 in a one-to-one manner are uniformly arranged around the secondary input region 123; be equipped with many on the mainboard 11 respectively with a plurality of main output test circuit (not shown) that main output test pad 1122 is connected, be equipped with many on the jumper board 12 respectively with a plurality of secondary input test circuit (not shown) that secondary input test pad 1232 is connected, main output test circuit with mainboard 11's circuit is disconnected, secondary input test circuit with the circuit of jumper board 12 is disconnected, also be equipped with on the main output test pad 1122 and on the secondary input test pad 1232 via hole 1211, main output test pad 1122 with secondary input test pad 1232 is connected.
A plurality of primary input test pads 1132 are uniformly arranged around the primary input area 113, and secondary output test pads 1222 corresponding to the primary input test pads 1132 in a one-to-one manner are uniformly arranged around the secondary output area 122; a plurality of main input test lines (not shown) connected to the plurality of main input test pads 1132, respectively, are disposed on the motherboard 11, a plurality of sub output test lines (not shown) connected to the plurality of sub output test pads 1222, respectively, are disposed on the jumper board 12, the main input test lines are not connected to the circuit of the motherboard 11, and the sub output test lines are not connected to the circuit of the jumper board 12; the primary input test pad 1132 and the secondary output test pad 1222 are also provided with the via 1211, and the primary input test pad 1132 and the secondary output test pad 1222 are connected.
In an embodiment of the present invention, the number of the primary output test pads 1122, the secondary input test pads 1232, the primary input test pads 1132, and the secondary output test pads 1222 is 4. In other embodiments of the present invention, the number of the primary output test pads 1122, the secondary input test pads 1232, the primary input test pads 1132, and the secondary output test pads 1222 may be 2, 3, 6, 8, and so on.
Referring to fig. 1-3, in the embodiment of the invention, the via 1211 is plated with a metal layer 14, the metal layer 14 of the via 1211 on the sub-output pad 1221 is connected to the sub-output pad 1221, and the metal layer 14 of the via 1211 on the sub-input pad 1231 is connected to the sub-input pad 1231. Solder 10 is fused into the through hole 1211, the primary input pad 1131 and the secondary output pad 1221 are communicated through the solder 10, and the primary output pad 1121 and the secondary input pad 1231 are communicated through the solder 10.
In the specific embodiment of the present invention, a double-sided tape 15 is disposed between the motherboard 11 and the jumper board 12, and the double-sided tape 15 is used for pre-fixing the motherboard 11 and the jumper board 12, so as to ensure that subsequent welding has high precision and ensure a good product rate. In this embodiment, the main board 11 and the jumper board 12 each include a base material PI, copper foils are disposed on both surfaces of the base material PI, a cover film or green oil is disposed on the surfaces of the copper foils, and the two copper foils of the jumper board 12 are connected by plating gold in the through hole 1211. The main output pad 1121 and the main input pad 1131 are both connected to the upper copper foil of the motherboard 11. The mainboard 11 and the jumper wire board 12 can realize the same function with a four-layer electronic circuit board after welding, and a local four-layer electronic circuit board structure is formed. Compared with the traditional multilayer electronic circuit board, the invention has high material utilization rate and more stable performance.
Further, referring to fig. 4, the motherboard 11 and the jumper board 12 are connected as shown in fig. 4.
Referring to fig. 5, a multilayer interconnected electronic circuit board 2 according to a second embodiment of the present invention is different from the multilayer interconnected electronic circuit board 1 according to the first embodiment in that: the secondary board 21 is a single-sided window board, one side of the secondary board 21, which is far away from the main board 23, is provided with a butt-joint bonding pad 22 and a jumper line (not shown), the butt-joint bonding pad 22 is directly communicated with the jumper line, and a window 20 is arranged at the position of the secondary board 21, which corresponds to the butt-joint bonding pad 22, and the butt-joint bonding pad 22 with a proper size is exposed. The main board 23 is provided with a pad 24 corresponding to the docking pad 22 of the secondary board 21. The pads 24 are connected to the landing pads 22 through the windows 20, and the landing pads 22 of the secondary board 21 and the pads 24 of the main board 23 are tinned or solder-pasted. The butt-joint bonding pad 22 of the secondary board 21 and the bonding pad 24 of the main board 23 are aligned and are properly pressed and heated to be welded together, so that the function of integral design is realized. Further, in other embodiments of the present invention, the connection between the docking pads 22 and the pads 24 may be realized by ACF or silk-screen ACP glue.
Referring to fig. 6, a multilayer interconnected electronic circuit board 3 according to a third embodiment of the present invention is different from the multilayer interconnected electronic circuit board 1 according to the first embodiment and the multilayer interconnected electronic circuit board 2 according to the second embodiment in that: be provided with two at least tie points (not shown in the figure) on the mainboard 33 correspond on the tie point of mainboard 33 and be connected with jumper board 31, jumper board 31 is the single-sided board, jumper board 31's area is less than the area of mainboard 33, jumper board 31 is close to one side of mainboard 33 is provided with jumper wire way (not shown in the figure) and butt joint pad 32, be provided with pad 34 on the tie point, butt joint pad 32 with pad 34 is connected, jumper board 31 butt joint pad 32 with mainboard 33 pad 24 tin-plating or tin-plating cream. The butt-joint bonding pad 32 of the jumper board 31 and the bonding pad 34 of the mainboard 33 are aligned and are properly pressed and heated to be welded together, so that the function of integral design is realized. Further, in other embodiments of the present invention, the connection between the docking pads 32 and the pads 34 may be realized by ACF or silk-screen ACP glue.
Compared with the prior art, the multilayer interconnected electronic circuit board has the following advantages:
1. the multilayer interconnected electronic circuit board comprises a mainboard, wherein at least two connecting points are arranged on the mainboard, jumper boards are correspondingly connected to the connecting points of the mainboard, butt-joint bonding pads are arranged on the jumper boards, bonding pads are arranged on the connecting points, and the butt-joint bonding pads are connected with the bonding pads, so that more jumper circuits can be arranged on the jumper boards with smaller areas, the material utilization rate is further improved, and the cost can be effectively reduced.
2. The multilayer interconnected electronic circuit board provided by the first embodiment of the invention comprises the jumper board, and the jumper board adopts a double-sided board, so that more jumper circuits can be arranged on the jumper board with a smaller area, the material utilization rate is further improved, and the cost can be effectively reduced.
3. The multilayer interconnected electronic circuit board provided by the second embodiment of the invention comprises a secondary board, wherein the secondary board adopts a single-sided window board, a window is arranged at the position of the secondary board corresponding to the butt-joint bonding pad, the butt-joint bonding pad with a proper size is exposed, and the bonding pad penetrates through the window to be connected with the butt-joint bonding pad, so that more jumper circuits can be arranged on the jumper board with a smaller area, the material utilization rate is further improved, and the cost can be effectively reduced.
4. The butt joint bonding pad is provided with a via hole, the via hole enables the bonding pad with a certain area to vacate more tin passing channels, so that soldering tin can smoothly flow into the via hole, and insufficient soldering and other adverse phenomena can be effectively avoided.
5. The invention can discharge air through the vent hole during welding, effectively prevent cold joint, accelerate the solder inflow speed, and has sufficient solder amount, stable welding performance and high product quality.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A multilayer interconnected electronic circuit board, comprising: multilayer interconnection electronic circuit board includes the mainboard, be provided with two at least tie points on the mainboard the correspondence is connected with the jumper board on the tie point of mainboard, the jumper board is the single-sided board, the area of jumper board is less than the area of mainboard, the jumper board is close to the one side of mainboard is provided with jumper wire circuit and butt joint pad, be provided with the pad on the tie point, butt joint pad with the pad is connected.
2. The multilayer interconnected electronic circuit board of claim 1, wherein: the main board is provided with a main output area and a main input area, the bonding pads comprise a main input bonding pad and a main output bonding pad, the main output bonding pad is arranged in the main output area, and the main input bonding pad is arranged in the main input area; the secondary board is provided with a secondary output area and a secondary input area, the butt joint bonding pad comprises a secondary input bonding pad and a secondary output bonding pad, the secondary output bonding pad is arranged in the secondary output area, and the secondary input bonding pad is arranged in the secondary input area.
3. The multilayer interconnected electronic circuit board of claim 2, wherein: the main output pads are uniformly or non-uniformly distributed in the main output area; the main input pads are uniformly or non-uniformly distributed in the main input area; the secondary output bonding pads are uniformly or non-uniformly distributed in the secondary output area; the secondary input pads are uniformly or non-uniformly distributed in the secondary input area.
4. The multilayer interconnected electronic circuit board of claim 2, wherein: all be provided with the via hole on inferior input pad and the inferior output pad, the via hole switches on the upper and lower two sides of secondary board, inferior input pad and inferior output pad with the wire jumper circuit passes through the via hole switches on.
5. The multilayer interconnected electronic circuit board of claim 4, wherein: the main board is a single-layer board or a multi-layer board, and the main board is made of any one of or a combination of two of a PCB (printed Circuit Board) or an FPC (Flexible printed Circuit); the jumper wire board is a single-layer board or a multi-layer board, and is made of one or a combination of a PCB, an FPC and an insulating board; and/or the shape of the through hole is one or the combination of a plurality of oval holes, round holes, linear holes and cross holes.
6. The multilayer interconnected electronic circuit board of claim 5, wherein: soldering tin is melted into the through hole, and the butt-joint bonding pad is connected with the bonding pad through the soldering tin; and/or an ACF is arranged on the butt joint bonding pad or the bonding pad, and the butt joint bonding pad is connected with the bonding pad through the ACF.
7. The multilayer interconnected electronic circuit board of claim 6, wherein: a plurality of main output test pads are uniformly arranged around the main output area, and secondary input test pads corresponding to the main output test pads one to one are uniformly arranged around the secondary input area; be equipped with many on the mainboard respectively with a plurality of the main output test circuit that main output test pad is connected, be equipped with many on the secondary board respectively with a plurality of the inferior input test circuit that inferior input test pad is connected, main output test circuit with the circuit of mainboard is not connected, inferior input test circuit with the circuit of secondary board is not connected, on the main output test pad with also be equipped with on the inferior input test pad the via hole, main output test pad with inferior input test pad is connected.
8. The multilayer interconnected electronic circuit board of claim 6, wherein: a plurality of main input test pads are uniformly arranged around the main input area, and secondary output test pads corresponding to the main input test pads one to one are uniformly arranged around the secondary output area; the main board is provided with a plurality of main input test circuits which are respectively connected with the plurality of main input test pads, the secondary board is provided with a plurality of secondary output test circuits which are respectively connected with the plurality of secondary output test pads, the main input test circuits are not connected with the circuits of the main board, and the secondary output test circuits are not connected with the circuits of the secondary board; the main input test pad and the secondary output test pad are also provided with the via holes, and the main input test pad is connected with the secondary output test pad.
9. The multilayer interconnected electronic circuit board of claim 8, wherein: at least one exhaust hole is formed in the main output area and the main input area, and the exhaust holes are communicated with the upper surface and the lower surface of the mainboard; and/or the secondary output area and the secondary input area are both provided with at least one exhaust hole, and the exhaust holes are communicated with the upper surface and the lower surface of the jumper board.
10. The multilayer interconnected electronic circuit board of claim 8, wherein: the metal layer is plated in the through hole, the metal layer of the through hole on the secondary output bonding pad is connected with the secondary output bonding pad, and the metal layer of the through hole on the secondary input bonding pad is connected with the secondary input bonding pad.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202010981392.XA CN112105146A (en) | 2020-09-17 | 2020-09-17 | Multilayer interconnection electronic circuit board |
Applications Claiming Priority (1)
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CN202010981392.XA CN112105146A (en) | 2020-09-17 | 2020-09-17 | Multilayer interconnection electronic circuit board |
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CN112105146A true CN112105146A (en) | 2020-12-18 |
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Family Applications (1)
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CN202010981392.XA Pending CN112105146A (en) | 2020-09-17 | 2020-09-17 | Multilayer interconnection electronic circuit board |
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