CN112083891A - Method for detecting data block in memory and related equipment - Google Patents
Method for detecting data block in memory and related equipment Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/062—Securing storage systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Abstract
The application provides a method and related equipment for detecting a data block in a memory, which are used for determining an available data block in the memory and avoiding data writing errors caused by writing data into the memory by mistake and writing the data into wrong data blocks in the memory. The method comprises the following steps: writing random data into each data block in the erased first source data block set to obtain a second source data block set, and writing data of each data block in the second source data block set into the first data block set to obtain a second data block set; performing data verification on each data block in the second data block set to determine a third data block set with correct data verification; writing the data of each data block in the fourth source data block set filled with the random data into the first source data block set to obtain a fifth source data block set; and performing data check on each data block in the fifth source data block set to determine a fourth data block set with correct data check.
Description
Technical Field
The present application relates to the field of storage, and in particular, to a method and related device for detecting a data block in a memory.
Background
In order to improve the storage security of Nand Flash, it is necessary to determine which blocks of Nand Flash are available good blocks before storing data.
At present, when a good block in Nand Flash is determined, data is written into all pages of a whole block one by using a page programming mode for all blocks of the Nand Flash, and verification is performed while writing, so as to pick out a block with a verification error.
Disclosure of Invention
The application provides a method and related equipment for detecting a data block in a memory, which are used for determining an available data block in the memory and avoiding data writing errors caused by writing data into the memory by mistake and writing the data into wrong data blocks in the memory.
The first aspect of the present application provides a method for detecting a data block in a memory, including:
determining a first set of source data blocks in memory;
writing each data block in the erased first source data block set with random data to obtain a second source data block set;
writing data of each data block in the second source data block set into a first data block set to obtain a second data block set, where the first data block set is a set of data blocks in the memory except for the first source data block set;
performing data verification on each data block in the second data block set to determine a third data block set with correct data verification in the second data block set;
determining a third source data block set in the third source data block set, where the number of data blocks in the third source data block set is the same as the number of data blocks in the first source data block set;
writing each data block in the erased third source data block set with random data to obtain a fourth source data block set;
writing the data of each data block in the fourth source data block set into the first source data block set to obtain a fifth source data block set;
and performing data check on each data block in the fifth source data block set to determine a fourth data block set with correct data check in the fifth source data block set.
Optionally, the determining the first source data block set in the memory includes:
acquiring the effective page number M of the data block in the memory and the page number N of the memory in an SLC mode;
and extracting from the data blocks corresponding to the memory according to the effective page number M and the page number N to obtain the first source data block set.
Optionally, the extracting from the data block corresponding to the memory according to the effective number of pages M and the number of pages N to obtain the first source data block set includes:
determining the number of data blocks in the first source data block set according to the ratio of the effective page number M to the page number N;
and extracting the data blocks corresponding to the memory based on the number of the data blocks to obtain the first source data block set.
Optionally, the extracting from the data blocks corresponding to the memory based on the number of the data blocks to obtain the first source data block set includes:
extracting data blocks corresponding to the memory based on the number of the data blocks to obtain an initial data block set;
determining an error data block from the initial data block set in a data reading and writing mode;
determining a set of data blocks in the initial set of data blocks, except the erroneous data block, as the first set of source data blocks.
Optionally, the method further comprises:
marking data blocks in the memory other than the third set of data blocks and the fourth set of data blocks as bad blocks;
receiving a target operation instruction for the memory;
and responding to the target operation instruction, and writing target data into a data block in the third data block set and/or a data block in the fourth data block set, wherein the target data is data to be written into the memory corresponding to the target operation instruction.
A second aspect of the present application provides an apparatus for detecting a data block in a memory, including:
a determining unit, configured to determine a first source data block set in a memory;
a writing unit, configured to write each erased data block in the first source data block set with random data to obtain a second source data block set;
the writing unit is further configured to write data of each data block in the second source data block set into a first data block set to obtain a second data block set, where the first data block set is a set of data blocks in the memory except for the first source data block set;
the checking unit is used for performing data checking on each data block in the second data block set to determine a third data block set with correct data checking in the second data block set;
the determining unit is further configured to determine a third source data block set in the third source data block set, where a number of data blocks in the third source data block set is the same as a number of data blocks in the first source data block set;
the writing unit is further configured to write each data block in the erased third source data block set with random data to obtain a fourth source data block set;
the writing unit is configured to write data of each data block in the fourth source data block set into the first source data block set, so as to obtain a fifth source data block set;
the checking unit is configured to perform data check on each data block in the fifth source data block set, so as to determine a fourth data block set in the fifth source data block set, where the data check is correct.
Optionally, the determining unit includes:
an obtaining module, configured to obtain an effective number M of pages of the data block in the memory and a number N of pages of the memory in the SLC mode;
and the extraction module is used for extracting the data blocks corresponding to the memory according to the effective page number M and the page number N to obtain the first source data block set.
Optionally, the extraction module is specifically configured to:
determining the number of data blocks in the first source data block set according to the ratio of the effective page number M to the page number N;
and extracting the data blocks corresponding to the memory based on the number of the data blocks to obtain the first source data block set.
Optionally, the extracting module extracts, based on the number of data blocks, data blocks corresponding to the storage to obtain the first source data block set, where the extracting module includes:
extracting data blocks corresponding to the memory based on the number of the data blocks to obtain an initial data block set;
determining an error data block from the initial data block set in a data reading and writing mode;
determining a set of data blocks in the initial set of data blocks, except the erroneous data block, as the first set of source data blocks.
Optionally, the apparatus further comprises:
a processing unit to:
marking data blocks in the memory other than the third set of data blocks and the fourth set of data blocks as bad blocks;
receiving a target operation instruction for the memory;
and responding to the target operation instruction, and writing target data into a data block in the third data block set and/or a data block in the fourth data block set, wherein the target data is data to be written into the memory corresponding to the target operation instruction.
A third aspect of the present application provides a computer apparatus comprising at least one processor and a memory connected to each other, wherein the memory is used for storing program codes, and the program codes are loaded and executed by the processor to implement the steps of the method for detecting data blocks in the memory.
A fourth aspect of the present application provides a computer-readable storage medium, which includes instructions that, when executed on a computer, cause the computer to perform the steps of the method for detecting a data block in a memory described above.
In summary, it can be seen that, in the embodiment provided by the present application, a small number of data blocks in a memory are selected as source data blocks, random data are written into the source data blocks page by page, data in the source data blocks in which the random data are written into other data blocks in the memory except the source data blocks one by one, and then the data are read out for verification, so as to obtain a data block in the memory with correct data verification, so that when data are written into the memory, the data can be written into the data block with correct data verification, thereby avoiding bad blocks in the memory, and solving the problem of data writing errors.
Drawings
FIG. 1 is a flowchart illustrating a method for detecting a data block in a memory according to an embodiment of the present disclosure;
FIG. 2 is a schematic view of a virtual structure of an apparatus for detecting a data block in a memory according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a hardware structure of a server according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.
The terms "first," "second," and the like in the description and in the claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Furthermore, the terms "comprise," "include," and "have," and any variations thereof, are intended to cover non-exclusive inclusions, such that a process, method, system, article, or apparatus that comprises a list of steps or modules is not necessarily limited to those steps or modules expressly listed, but may include other steps or modules not expressly listed or inherent to such process, method, article, or apparatus, the division of modules presented herein is merely a logical division that may be implemented in a practical application in a further manner, such that a plurality of modules may be combined or integrated into another system, or some feature vectors may be omitted, or not implemented, and such that couplings or direct couplings or communicative coupling between each other as shown or discussed may be through some interfaces, indirect couplings or communicative coupling between modules may be electrical or other similar, this application is not intended to be limiting. The modules or sub-modules described as separate components may or may not be physically separated, may or may not be physical modules, or may be distributed in a plurality of circuit modules, and some or all of the modules may be selected according to actual needs to achieve the purpose of the present disclosure.
The method for detecting a data block in a memory provided in the present application is described below from the perspective of a device for detecting a data block in a memory, and the device for detecting a data block in a memory may be a server or a service unit in a server, and is not particularly limited.
Referring to fig. 1, fig. 1 is a schematic flowchart illustrating a method for detecting a data block in a memory according to an embodiment of the present disclosure, including:
101. a first set of source data blocks in memory is determined.
In this embodiment, the detection apparatus for the data block in the memory may determine the first source data block set in the memory, where the memory is NandFlash.
In one embodiment, the detecting means for detecting the data blocks in the storage determining the first source data block set in the storage comprises:
acquiring the effective page number M of the data block in the memory and the page number N of the memory in an SLC mode;
and extracting the data blocks corresponding to the memory according to the effective page number M and the page number N to obtain a first source data block set.
In this embodiment, the detection apparatus for the data block in the memory may obtain the effective number M of pages of the data block in the memory and the number N of pages of the memory in the SLC mode, and specifically may obtain the effective number M of pages of the data block in the memory and the number N of pages of the memory in the SLC mode according to detection software, and the specific setting is manually performed, where the general setting mode is that, in a data set, an Identifier (ID) of the memory (such as Nand Flash) is used as a keyword, the detection software sends an ID command for reading the ID of the Nand Flash, and after the ID of the Nand Flash is read, the M and N are found by the ID of the Nand Flash, and certainly, the M and N may also be detected by a series of Nand Flash operation commands, and the specific limitation is not made, as long as the effective number M of pages of the data block in the memory and the number N of pages of the memory in the SLC mode can be obtained, and in addition, because the page writing speed, then copyback, or in MLC mode, this is not limited specifically. After the effective number of pages M and the number of pages N are obtained, extraction may be performed from the data blocks corresponding to the memory according to M and N, so as to obtain a first source data block set. Specifically, the number of data blocks in the first source data block set may be determined by the ratio of the effective number of pages M to the number of pages N, and then extracted from the data blocks corresponding to the memory according to the number of data blocks to obtain the first source data block set, for example, the ratio of M to N is 5, then 5 data blocks may be extracted from the data blocks corresponding to the memory as the first source data block set, and the extraction may be random extraction, or may be performed according to a certain rule, and is not particularly limited as long as 5 data blocks can be extracted.
It should be noted that, when M cannot be divided by N, the ratio of M/N is an integer, for example, when M/N is 3.6, the number of data blocks is 3, and when M/N is less than 1, the number of data blocks is M/N +1, and the number of data blocks is 1.
When the data blocks corresponding to the memory are extracted according to the number of the data blocks, an erroneous data block may be determined from the initial data block set by reading and writing data from and into the extracted initial data block set, and then a data block set other than the erroneous data block in the initial data block set may be determined as the first data block set. That is to say, after the data block corresponding to the memory is extracted, a full block scan may be performed on the extracted data block once, data is simply written and read for comparison, an erroneous data block in the extracted data block is found out, and an error-free data block is used as a source data block, so that it is ensured that, when a copy back is performed subsequently according to the source data block, an error-free data block in the data blocks in the memory other than the first source data block set can be found more accurately.
It should be noted that, the above-mentioned determination of the number of data blocks in the first source data block set is only an example, and of course, other manners may also be adopted, for example, the number may be directly selected according to an instruction of a user, or the number may be selected according to an actual situation, which is not limited specifically.
102. And writing each data block in the erased first source data block set with random data to obtain a second source data block set.
In this embodiment, after obtaining the first source data block set, the detection apparatus for the data blocks in the memory may perform an erasing operation on each data block in the first source data block set, and then write random data into each data block in the erased first source data block set, so as to obtain the second source data block set. It is to be understood that, here, each data block in the first source data block set may be written with random data, and certainly, other data may also be written with other data, which is not limited specifically, as long as the data written into each data block in the first source data block set is prevented from being all 0 xffs (that is, natural number 255), because the Nand flash needs to erase the block where the writing position is located before writing, and the initial data of the entire block after erasing is all 0 xffs. In practical application, writing each data block in the first source data block set into a random number can better fit the situation that a user writes data in practical use. It is to be understood that, when writing random data to each data block in the first source data block set, the random data is written in a page-by-page manner in the source data block.
103. And writing the data of each data block in the second source data block set into the first data block set to obtain a second data block set.
In this embodiment, the detection apparatus for data blocks in the memory may write data of each data block in the second source data set full of random data into the first data block set to obtain the second data block set, where the first data block set is a set of data blocks in the memory except for the first source data block set. That is to say, the detection apparatus for the data block in the memory may traverse other first data block sets that are not extracted as the source data block in the data block corresponding to the memory, and write the random data written in step 102 into each data block in the first data block set again in a copyback manner, so as to obtain the second data block set.
It can be understood that, the data in the source data block is written into each data block in the first data block set in a copy back manner, but may also be written in other manners, for example, the data may be written in a direct page programming operation manner of NandFlash, that is, the data in the source data block (that is, the data in each data block in the second source data block) is directly read out by a NandFlash read command, and then the read data in the source data block is written into each data block in the first data block set by a write command. However, the NandFlash supporting copyback operation reads data from a data block in a copyback mode and writes the data into another data block, so that the writing speed can be increased, because garbage collection is involved when data is written in the using process of a user, in the actual using process, when one page of data is possibly written, other data needs to be moved to recover a complete data block, and the moving speed can be increased by using the copyback mode during moving, so that the user experience of a product is enhanced. However, when a bad block is detected, a copy back mode is not used, and when a copy back mode is used in the actual use process, the detection mode is different from the actual use mode, and the detection result is inaccurate, so that the same writing mode is only used when data is written to the data block and the bad block is detected in the actual use process.
104. And performing data verification on each data block in the second data block set to determine a third data block set with correct data verification in the second data block set.
In this embodiment, the detection apparatus for the data block in the memory may perform data verification on each data block in the second data block set to determine a third data block set in which data verification in the second data block set is correct. For example, the a data block is any one data block in the second data block set, where the data written in the a data block is data of an a1 data block in the second source data block set, when data verification is performed, data is read from the a data block, the read data is compared with the data of the a1 data block, if the data match or the difference does not reach a preset value, the verification is passed, it is determined that the a data block is a data block with correct data verification, and if the data do not match, it is determined that the verification fails, and it is determined that the a data block is a data block with data verification error. By analogy, whether each data block in the second data block set is correct or not can be checked, and a third data block set with correct data check is obtained. It can be understood that, for simple operation, the data blocks in the memory may also be numbered, and when the data is verified, the correct data block number is directly recorded.
105. A third set of source data blocks in the third set of data blocks is determined.
In this embodiment, after determining a third data block set with correct data verification in the second data block set, the detection apparatus for data blocks in the memory may extract a third source data block set from the third data block set, where the number of data blocks in the third source data block set is the same as the number of data blocks in the first source data block set. It is to be understood that, the manner of extracting the first source data block set from the memory in step 101 has been described in detail above, and here, the manner of extracting the third source data block set from the third data block set is similar to this, and detailed description thereof is omitted here.
106. And writing each data block in the erased third source data block set with random data to obtain a fourth source data block set.
In this embodiment, after obtaining the third source data block set, the detection apparatus for the data blocks in the memory may perform an erasing operation on each data block in the third source data block set, and then write all the data blocks in the erased third source data block set with the random data to obtain a fourth source data block set, that is, write all the random data in each source data block in the fourth source data block set. It can be understood that, here, each data block in the third source data block set may be written with random data, and certainly, other data may also be written with other data, which is not limited specifically, as long as the data written into each data block in the third source data block set is prevented from being all 0 xffs (that is, natural number 255), because the Nand flash needs to erase the block where the writing position is located before writing, and the initial data of the entire block after erasing is all 0 xffs. In practical application, writing each data block in the third source data block set into a random number can better fit the situation that a user writes data in practical use.
107. And writing the data of each data block in the fourth source data block set into the first source data block set to obtain a fifth source data block set.
In this embodiment, the detection apparatus for the data blocks in the memory may write the data of each data block in the fourth source data block set full of random data into the first source data block set, so as to obtain a fifth source data block set. That is to say, the detection apparatus for the data block in the memory may traverse each source data block in the first source data block set, and write the data block in which the random data is written in step 106 into each data block in the first source data block set again in a copyback manner, so as to obtain a fifth source data block set.
108. And performing data check on each data block in the fifth source data block set to determine a fourth data block set with correct data check in the fifth source data block set.
In this embodiment, the detection apparatus for the data block in the memory may perform data check on each data block in the fifth source data block set, so as to determine a fourth data block set with correct data check in the fifth source data block set. For example, the B data block is any one data block in the fifth source data block set, where the data written in the B data block is data of a B1 data block in the fourth source data block set, during data verification, data is read from the B data block, the read data is compared with the data of the B1 data block, if the data match or the data difference does not reach the preset value, it is determined that the verification passes, the B data block is determined to be a data block with correct data verification, and if the data does not match or the data difference reaches the preset value, it is determined that the verification fails, and the B data block is determined to be a data block with data verification error. By analogy, whether each data block in the fifth source data block set is correct or not can be checked, and a fourth data block set with correct data check is obtained. It can be understood that, for simple operation, the data blocks in the memory may also be numbered, and when the data is verified, the correct data block number is directly recorded.
In one embodiment, the detecting device of the data blocks in the memory may mark the data blocks in the memory except for the third set of data blocks and the fourth set of data blocks as bad blocks after obtaining the fourth set of data blocks;
receiving a target operation instruction aiming at the memory, wherein the target operation instruction is an instruction for writing target data into the memory;
and responding to the target operation instruction, and writing target data into the data blocks in the third data block set and/or the data blocks in the fourth data block set.
In this embodiment, after the detection device of the data block in the memory determines the correct data block in the memory, the data block in the memory except the correct data block may be marked as a bad block, and in an actual use process, the data may be written into the correct data block. That is, a target operation instruction for the memory may be received, the target operation instruction being an instruction to write target data to the memory, and then the target data may be written to a data block in the third set of data blocks and/or a data block in the fourth data block.
In summary, it can be seen that, in the embodiment provided by the present application, a small number of data blocks in a memory are selected as source data blocks, random data are written into the source data blocks page by page, data in the source data blocks in which the random data are written into other data blocks in the memory except the source data blocks one by one, and then the data are read out for verification, so as to obtain a data block in the memory with correct data verification, so that when data are written into the memory, the data can be written into the data block with correct data verification, thereby avoiding bad blocks in the memory, and solving the problem of data writing errors.
The present application is described above from the perspective of a method for detecting a block of data in a memory, and the present application is described below from the perspective of an apparatus for detecting a block of data in a memory.
Referring to fig. 2, fig. 2 is a schematic view of a virtual structure of an apparatus for detecting a data block in a memory according to an embodiment of the present disclosure, including:
a determining unit 201, configured to determine a first source data block set in a memory;
a writing unit 202, configured to write each erased data block in the first source data block set with random data to obtain a second source data block set;
the writing unit 202 is further configured to write data of each data block in the second source data block set into a first data block set to obtain a second data block set, where the first data block set is a set of data blocks in the memory except for the first source data block set;
a checking unit 203, configured to perform data check on each data block in the second data block set, so as to determine a third data block set in the second data block set, where the data check is correct;
the determining unit 201 is further configured to determine a third source data block set in the third source data block set, where the number of data blocks in the third source data block set is the same as the number of data blocks in the first source data block set;
the writing unit 202 is further configured to write each data block in the erased third source data block set with random data to obtain a fourth source data block set;
the writing unit 202 is configured to write data of each data block in the fourth source data block set into the first source data block set, so as to obtain a fifth source data block set;
the checking unit 203 is configured to perform data check on each data block in the fifth source data block set, so as to determine a fourth data block set with correct data check in the fifth source data block set.
Optionally, the determining unit 201 includes:
an obtaining module 2011, configured to obtain an effective number M of pages of the data block in the memory and a number N of pages of the memory in the SLC mode;
an extracting module 2012, configured to extract from the data blocks corresponding to the memory according to the effective number of pages M and the number of pages N to obtain the first source data block set.
Optionally, the extracting module 2012 is specifically configured to:
determining the number of data blocks in the first source data block set according to the ratio of the effective page number M to the page number N;
and extracting the data blocks corresponding to the memory based on the number of the data blocks to obtain the first source data block set.
Optionally, the extracting module 2012 extracts, based on the number of data blocks, data blocks corresponding to the storage to obtain the first source data block set, including:
extracting data blocks corresponding to the memory based on the number of the data blocks to obtain an initial data block set;
determining an error data block from the initial data block set in a data reading and writing mode;
determining a set of data blocks in the initial set of data blocks, except the erroneous data block, as the first set of source data blocks.
Optionally, the apparatus further comprises:
a processing unit 204, the processing unit 204 to:
marking data blocks in the memory other than the third set of data blocks and the fourth set of data blocks as bad blocks;
receiving a target operation instruction for the memory;
and responding to the target operation instruction, and writing target data into a data block in the third data block set and/or a data block in the fourth data block set, wherein the target data is data to be written into the memory corresponding to the target operation instruction.
In summary, it can be seen that, in the embodiment provided by the present application, a small number of data blocks in a memory are selected as source data blocks, random data are written into the source data blocks page by page, data in the source data blocks in which the random data are written into other data blocks in the memory except the source data blocks one by one, and then the data are read out for verification, so as to obtain a data block in the memory with correct data verification, so that when data are written into the memory, the data can be written into the data block with correct data verification, thereby avoiding bad blocks in the memory, and solving the problem of data writing errors.
Fig. 3 is a schematic diagram of a server 300 according to an embodiment of the present application, where the server 300 may have a relatively large difference due to different configurations or performances, and may include one or more Central Processing Units (CPUs) 322 (e.g., one or more processors) and a memory 332, and one or more storage media 330 (e.g., one or more mass storage devices) for storing applications 342 or data 344. Memory 332 and storage media 330 may be, among other things, transient storage or persistent storage. The program stored on the storage medium 330 may include one or more modules (not shown), each of which may include a series of instruction operations for the server. Still further, the central processor 322 may be configured to communicate with the storage medium 330 to execute a series of instruction operations in the storage medium 330 on the server 300.
The server 300 may also include one or more power supplies 326, one or more wired or wireless network interfaces 350, one or more input-output interfaces 358, and/or one or more operating systems 341, such as Windows Server, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM, and the like.
The steps performed by the detecting means of the data blocks in the memory in the above embodiments may be based on the server structure shown in fig. 3.
The embodiment of the present application further provides a computer-readable storage medium, on which a program is stored, and when the program is executed by a processor, the method for detecting the data block in the memory is implemented.
The embodiment of the present application further provides a processor, where the processor is configured to execute a program, where the program executes the steps of the method for detecting the data block in the memory when running.
The embodiment of the present application further provides a terminal device, where the device includes a processor, a memory, and a program stored in the memory and capable of running on the processor, and the program code is loaded and executed by the processor to implement the steps of the method for detecting a data block in the memory.
The present application also provides a computer program product adapted to perform the steps of the method for detecting data blocks in a memory as described above when executed on a data processing device.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
It can be clearly understood by those skilled in the art that, for convenience and brevity of description, the specific working processes of the system, the apparatus and the module described above may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in the process, method, article, or apparatus that comprises the element.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. A method for detecting a data block in a memory, comprising:
determining a first set of source data blocks in memory;
writing each data block in the erased first source data block set with random data to obtain a second source data block set;
writing data of each data block in the second source data block set into a first data block set to obtain a second data block set, where the first data block set is a set of data blocks in the memory except for the first source data block set;
performing data verification on each data block in the second data block set to determine a third data block set with correct data verification in the second data block set;
determining a third source data block set in the third source data block set, where the number of data blocks in the third source data block set is the same as the number of data blocks in the first source data block set;
writing each data block in the erased third source data block set with random data to obtain a fourth source data block set;
writing the data of each data block in the fourth source data block set into the first source data block set to obtain a fifth source data block set;
and performing data check on each data block in the fifth source data block set to determine a fourth data block set with correct data check in the fifth source data block set.
2. The method of claim 1, wherein the determining the first set of source data blocks in the memory comprises:
acquiring the effective page number M of the data block in the memory and the page number N of the memory in an SLC mode;
and extracting from the data blocks corresponding to the memory according to the effective page number M and the page number N to obtain the first source data block set.
3. The method of claim 2, wherein the extracting from the data blocks corresponding to the memory according to the effective number of pages M and the number of pages N to obtain the first source data block set comprises:
determining the number of data blocks in the first source data block set according to the ratio of the effective page number M to the page number N;
and extracting the data blocks corresponding to the memory based on the number of the data blocks to obtain the first source data block set.
4. The method of claim 3, wherein the extracting, from the data blocks corresponding to the storage based on the number of data blocks, the first source data block set comprises:
extracting data blocks corresponding to the memory based on the number of the data blocks to obtain an initial data block set;
determining an error data block from the initial data block set in a data reading and writing mode;
determining a set of data blocks in the initial set of data blocks, except the erroneous data block, as the first set of source data blocks.
5. The method according to any one of claims 1 to 4, further comprising:
marking data blocks in the memory other than the third set of data blocks and the fourth set of data blocks as bad blocks;
receiving a target operation instruction for the memory;
and responding to the target operation instruction, and writing target data into a data block in the third data block set and/or a data block in the fourth data block set, wherein the target data is data to be written into the memory corresponding to the target operation instruction.
6. An apparatus for detecting a block of data in a memory, comprising:
a determining unit, configured to determine a first source data block set in a memory;
a writing unit, configured to write each erased data block in the first source data block set with random data to obtain a second source data block set;
the writing unit is further configured to write data of each data block in the second source data block set into a first data block set to obtain a second data block set, where the first data block set is a set of data blocks in the memory except for the first source data block set;
the checking unit is used for performing data checking on each data block in the second data block set to determine a third data block set with correct data checking in the second data block set;
the determining unit is further configured to determine a third source data block set in the third source data block set, where a number of data blocks in the third source data block set is the same as a number of data blocks in the first source data block set;
the writing unit is further configured to write each data block in the erased third source data block set with random data to obtain a fourth source data block set;
the writing unit is configured to write data of each data block in the fourth source data block set into the first source data block set, so as to obtain a fifth source data block set;
the checking unit is configured to perform data check on each data block in the fifth source data block set, so as to determine a fourth data block set in the fifth source data block set, where the data check is correct.
7. The apparatus of claim 6, wherein the determining unit comprises:
an obtaining module, configured to obtain an effective number M of pages of the data block in the memory and a number N of pages of the memory in the SLC mode;
and the extraction module is used for extracting the data blocks corresponding to the memory according to the effective page number M and the page number N to obtain the first source data block set.
8. The apparatus of claim 7, wherein the extraction module is specifically configured to:
determining the number of data blocks in the first source data block set according to the ratio of the effective page number M to the page number N;
and extracting the data blocks corresponding to the memory based on the number of the data blocks to obtain the first source data block set.
9. The apparatus of claim 8, wherein the extracting module extracts, based on the number of data blocks, data blocks corresponding to the memory, and the obtaining the first source data block set comprises:
extracting data blocks corresponding to the memory based on the number of the data blocks to obtain an initial data block set;
determining an error data block from the initial data block set in a data reading and writing mode;
determining a set of data blocks in the initial set of data blocks, except the erroneous data block, as the first set of source data blocks.
10. A computer-readable storage medium, comprising instructions which, when executed on a computer, cause the computer to carry out the steps of the method for detecting a data block in a memory according to any one of claims 1 to 5.
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