CN112074052A

CN112074052A - Structure for reducing pins of LED driving chip

Info

Publication number: CN112074052A
Application number: CN202011048652.4A
Authority: CN
Inventors: 林超
Original assignee: Avia Semiconductor Xiamen Co ltd
Current assignee: Avia Semiconductor Xiamen Co ltd
Priority date: 2020-09-29
Filing date: 2020-09-29
Publication date: 2020-12-11

Abstract

The invention discloses a structure for reducing pins of an LED driving chip, which comprises a serial interface module, a display storage module, an LED driver module and a time base generator module; the serial interface module is electrically connected with the display storage module and the LED driver module, the display storage module is electrically connected with the LED driver module, and the serial interface module is mainly used for connecting with an external singlechip for communication; updating the value of the display storage module, and controlling the working states of the LED driver module and the time base generator module; the LED driver module is contained within a chip; the serial interface module, the display storage module, the LED driver module, the time base generator module and the external single chip microcomputer are communicated by adopting a single wire to reduce chip pins. On the premise of routing and driving 128 LEDs by adopting a single-sided PCB, the number of pins of the LED driving chip designed by the invention is 16, and is reduced by about 40% compared with 28 pins of TM1640, so that the chip package is changed from SOP28 to SOP 16.

Description

Structure for reducing pins of LED driving chip

Technical Field

The invention relates to the technical field of LED driving chips, in particular to the application field of driving a plurality of display windows. In particular to a structure for reducing pins of an LED driving chip. The invention specifically relates to a multiplexing LED driving port, which reduces communication control lines, thereby obviously reducing pins of an LED driving chip under the condition of wiring of a single-sided PCB and driving the same quantity of LEDs.

Background

The traditional LED driving chip drives the number of LEDs to be equal to the product of the SEG number and the GRID number, and the pin number of the driving LED is equal to the sum of the SEG number and the GRID number. Taking TM1640 as an example, the SEG number is 8, the GRID number is 16, the total number of LEDs that can be driven is 8 × 16 — 128, and the number of pins driving LEDs is 8+16 — 24. In the electronic scale market, it is usually necessary to drive 3 display windows, namely a weight window, a unit price window and a money window, wherein the weight window is 5 bits, the unit price window is 5 bits, the money window is 6 bits, and the number of LEDs required by the 3 display windows in total is (5+5+6) × 8 ═ 128. In order to reduce the cost of the electronic scale, the 'red' display panel is gradually transited from the nixie tube drive to the LED drive, and the invention aims to further reduce the cost of the 'red' display panel from the perspective of the LED drive chip.

Disclosure of Invention

Technical problem to be solved

Aiming at the defects of the prior art, the invention provides a structure for reducing pins of an LED driving chip, and solves part of technical problems.

(II) technical scheme

Based on the technical problems in the background art, the invention provides a structure for reducing pins of an LED driving chip.

The invention provides a structure for reducing pins of an LED driving chip, which comprises a serial interface module, a display storage module, an LED driver module and a time base generator module; the serial interface module is electrically connected with the display storage module and the LED driver module, the display storage module is electrically connected with the LED driver module, the LED driver module is electrically connected with the time base generator module, and the serial interface module is electrically connected with the time base generator module;

the serial interface module is mainly used for a channel which is connected with an external singlechip for communication; updating the value of the display storage module, and controlling the working states of the LED driver module and the time base generator module; the LED driver module is contained within a chip;

the serial interface module, the display storage module, the LED driver module and the time base generator module adopt single-wire communication to reduce chip pins, and the coding rule of the single-wire communication is that an external single chip firstly sends a synchronization bit and then sends 13-bit data and 1-bit parity check bits during each communication; each bit period consists of a low level and a high level, where the low level has no strict time requirement and the high level has a strict time requirement, and the duration of the high level is used to distinguish between data 0 and data 1.

Preferably, the LED driver module is used for generating a driving waveform and a driving voltage for driving the chip pins, and the LED driver module is provided with 8 driving pins, including a0, a1, a2, A3, B0, B1, B2, and B3, wherein each pin is divided into two driving moments, namely an anode driving moment and a cathode driving moment; the LED driver module is further provided with C0, C1, C2, C3 and C4 pins.

Preferably, the time base generator module is configured to generate a working clock, drive each module in the chip to cooperatively work, and in the power saving mode, turn off the clock, stop all circuits, and reduce power consumption to the minimum.

Preferably, the display storage module is mainly used for storing the values of all the LEDs.

Preferably, the LED driver module includes 13 LED driving pins, which constitute a storage space of 8 × 16 — 128 bits.

Preferably, the chip pins simultaneously meet the single-layer PCB wiring of three LED display panels, the wiring is divided into three lines, two lines and one line, and the display panels in three lines and one line layout have 3 0 ohm jumper resistors more than the display panels in two lines layout.

(III) advantageous effects

The invention provides a structure for reducing pins of an LED driving chip. The method has the following beneficial effects: on the premise of routing and driving 128 LEDs by adopting a single-sided PCB, the number of pins of the LED driving chip designed by the invention is 16, and is reduced by about 40% compared with 28 pins of TM1640, so that the chip package is changed from SOP28 to SOP 16.

Drawings

FIG. 1 is a block diagram of the overall architecture of an embodiment of the present invention;

FIG. 2 is a diagram of a Display RAM structure according to an embodiment of the present invention;

FIG. 3 is an illustration of drive waveform logic for an embodiment of the present invention;

FIG. 4 is a diagram of a multi-window LED display panel according to an embodiment of the present invention;

FIG. 5 is a second application of the multi-window LED display panel according to the embodiment of the present invention;

FIG. 6 is a third application of the multi-window LED display panel according to the embodiment of the present invention;

FIG. 7 is a pin diagram of a chip according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of a b c d e f g dp corresponding to the 8-segment LED of the present invention;

FIG. 9 is a first schematic diagram of a PCB trace for an 8-segment LED display according to the present invention;

fig. 10 is a second schematic diagram of a PCB trace for 8-segment LED display according to the present invention.

In the figure: the device comprises a serial interface module (1), a display storage module (2), an LED driver module (3) and a time base generator module (4).

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The invention is composed of a serial interface module 1, a display storage module 2, an LED driver module 3 and a time base generator module 4, and the overall structural block diagram of the invention is shown in figure 1.

The serial interface module 1 is mainly used for communicating with an external singlechip, updating the value of the Display RAM, and controlling the working states of the LED driver module 3 and the time base generator module 4. The chip pins are reduced by adopting single-wire communication, and the coding rule of the single-wire communication in the embodiment is that an external single chip firstly sends a synchronization bit and then sends 13-bit data and 1-bit parity check bit during each communication; each bit period consists of a low level and a high level, wherein the low level has no strict time requirement, the high level has strict time requirement, data 0 and data 1 are distinguished according to the duration time of the high level, 0 is 1t, 1 is 3t, and the high level is 2t when the bit is synchronous. As shown in fig. 8, the external one-chip microcomputer transmits 11000_01011010_0 to the LED driving chip.

The display storage module 2 is mainly used for storing the values of all the LEDs, the value of 1 indicates that the LED is lighted, the LED driving pin on the left of the plus is V + level, and the LED driving pin on the right of the plus is V-level; a value of 0 indicates that the LED is turned off, the LED drive pin on the left of "+" is at V + level, and the LED drive pin on the right of "+" is at Z state; or the LED driving pin on the left is V-level, and the LED driving pin on the right of the plus is Z state or V + level; or the left LED driver pin is in Z state and the right LED driver pin is in Z state or V + level or V-level. As shown in fig. 2, the 13 LED driving pins of this embodiment form a storage space with 8 × 16 ═ 128bits, where 8 indicates 8 segments of LED display, which corresponds to a b c d e f g and dp in fig. 8, and 16 indicates 16 segments of 8 LED display, which corresponds to addresses 0 to 15, where address 0 is a0 to A3, and PCB traces are shown in fig. 9; addresses 1-4 are A0-A3 respectively driven by B3-B0, PCB routing is shown in FIG. 10; addresses 5-9 are A0-A3 respectively driven by C4-C0, PCB routing is shown in FIG. 10; address 10 is driven by B0-B3, the PCB traces are shown in FIG. 9, addresses 11-15 are driven by B0-B3 and C0-C4, respectively, and the PCB traces are shown in FIG. 10.

The LED driver module 3 is configured to generate a driving waveform and a driving voltage for driving the pins, as shown in fig. 3, where V ═ GND, V ═ VDD, and Z ═ high impedance state; when the anode of the LED lamp is V +, the cathode is V-, and the LED lamp is lightened; in other states, the LED lamp is off. As shown in fig. 3, the driving waveform cyclically drives 8 driving pins, a0, a1, a2, A3, B0, B1, B2 and B3, in turn, wherein each pin is divided into two driving moments, an anode and a cathode, so that 16 time units are provided. And in order to ensure the brightness consistency of all the LED lamps, the driving time of each time unit is the same, namely the lighting time of each LED lamp is the same. Taking the driving pin a0 as an example, at time t0, a0 serves as an anode to drive 11 LED lamps in total; at time t1, a0 serves as a cathode to drive a total of 11 LED lamps.

The time base generator module 4 is used for generating a working clock and driving all modules in the chip to work cooperatively. In the power-saving mode, the clock is turned off, all circuits stop working, and the power consumption is reduced to the minimum.

Fig. 4, fig. 5 and fig. 6 are illustrations of the application of the multi-window LED display panel according to the embodiment of the present invention. For electronic scales, two display panels are typically required, divided into a front panel (on the same side as the keyboard) for the merchant to see and a back panel for the customer to see, where the front panel is mostly a two-line (10+6) or three-line (5+5+6) layout and the back panel is mostly a one-line (16) layout. By adopting the invention, the pins of the LED driving chip are reduced, and the single-layer PCB wiring of three LED display panels is satisfied, wherein, the display panels with three rows and one row are provided with 3 0 ohm jumper resistors more than the display panels with two rows.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. A structure for reducing pins of an LED driving chip is characterized by comprising a serial interface module (1), a display storage module (2), an LED driver module (3) and a time base generator module (4); the serial interface module (1) is electrically connected with the display storage module (2) and the LED driver module (3), the display storage module (2) is electrically connected with the LED driver module (3), the LED driver module (3) is electrically connected with the time base generator module (4), and the serial interface module (1) is electrically connected with the time base generator module (4); the serial interface module (1) is mainly used for a channel which is connected with an external singlechip for communication; updating the value of the display storage module (2), controlling the working state of the LED driver module (3) and the time base generator module (4); the LED driver module (3) is contained within a chip; the serial interface module (1), the display storage module (2), the LED driver module (3) and the time base generator module (4) adopt single-wire communication to reduce chip pins, and the coding rule of the single-wire communication is that an external singlechip firstly sends a synchronization bit and then sends 13-bit data and 1-bit parity check bits during each communication; each bit period consists of a low level and a high level, where the low level has no strict time requirement and the high level has a strict time requirement, and the duration of the high level is used to distinguish between data 0 and data 1.

2. The structure for reducing the pins of the LED driving chip as claimed in claim 1, wherein: the LED driver module (3) is used for generating driving waveforms and driving voltages for driving the pins of the chip, the LED driver module (3) is provided with 8 driving pins A0, A1, A2, A3, B0, B1, B2 and B3, wherein each pin is divided into two driving moments of an anode and a cathode; the LED driver module (3) is further provided with C0, C1, C2, C3 and C4 pins.

3. The structure for reducing the pins of the LED driving chip as claimed in claim 1, wherein: and the time base generator module (4) is used for generating a working clock and driving all modules in the chip to work cooperatively, and when in a power-saving mode, the clock is turned off, all circuits stop working, and the power consumption is reduced to the minimum.

4. The structure for reducing the pins of the LED driving chip as claimed in claim 1, wherein: the display storage module (2) is mainly used for storing the values of all the LEDs.

5. The structure for reducing pins of the LED driving chip according to any one of claims 1 and 2, wherein: the LED driver module (3) comprises 13 LED driving pins to form a storage space of 8 × 16-128 bits.

6. The structure for reducing the pins of the LED driving chip as claimed in claim 1, wherein: the chip pins simultaneously meet the single-layer PCB wiring of three LED display panels, the wiring is divided into three lines, two lines and one line, and the display panels in three lines and one line layout have 3 0-ohm jumper resistors more than the display panels in two lines layout.