CN1893404A - Serial communication method and interface circuit - Google Patents
Serial communication method and interface circuit Download PDFInfo
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- CN1893404A CN1893404A CN 200510080320 CN200510080320A CN1893404A CN 1893404 A CN1893404 A CN 1893404A CN 200510080320 CN200510080320 CN 200510080320 CN 200510080320 A CN200510080320 A CN 200510080320A CN 1893404 A CN1893404 A CN 1893404A
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Abstract
Carrying out data transmission based on signal line and ground wire between transmitter and receiver, the method in serial comm. includes parts and sequences: when not carrying comm. between transmitter and receiver, maintaining signal line at first level; transmitter sets signal line to second level, and after maintains prearranged time lengths of start bit, data 1, or 0, restores level to first level to indicate starting comm. data 1, or 0. There are different time lengths among start bit, data 1, or 0. The disclosed interface circuit includes interface circuits of transmitter and receiver. Signal lines and ground wire are connected between interface circuits. When transmitting end has no input or is in high level, the receiving end is in high level; when low level is inputted to the transmitting end, the receiving end is at low level. The invention enhances interference-killing feature for serial comm. without need of transmitter and receiver of possessing same reference clock.
Description
Technical field
The present invention relates to a kind of method of serial communication, and the interface circuit of this method of realization.
Background technology
Usually all have the control board that comprises single-chip microcomputer and integrated circuit in the household electrical appliance, be used for the operation of household electrical appliance is controlled automatically.Along with the function of household electrical appliance strengthens gradually, the work that control board will be finished is also more and more, adopts two or more than two control board in the household electrical appliance of today usually.To communicate with one another between these control boards, coordinate to finish the control of whole household electrical appliance.
Because requirement does not cheaply have special-purpose communication interface on the control board of a lot of household electrical appliance, and can be used as the interface limited amount of communication.Under these circumstances, can only adopt the least possible line to carry out serial communication.
Chinese patent CN1440161 discloses a kind of method by single line connection carrying out serial communication, identifies initial signal, data 0, data 1 and confirmation signal by pulse signal waveforms different on the single line.But the mode of this serial communication requires transmit leg and recipient to have same reference clock, and communication two party could send and understand signal with identical clock frequency like this.And between two control boards, be not have same reference clock.
Chinese patent CN1449168 discloses a kind of single wire serial interface agreement, has defined a time threshold, when the low duration on the holding wire during less than this time threshold with greater than this time threshold the time designation data 0 or data 1 respectively.But the antijamming capability of this serial communication method is on duty mutually.The edge of high-low level signal saltus step is interfered easily in actual applications, makes the waveform of level enlarge or dwindles, and makes low duration that small variation take place, thus the variation of data 0 in causing transmitting or data 1.
Summary of the invention
The present invention will solve is the problem of distinguishing the poor anti jamming capability that data 0 and data 1 cause in serial communication with time threshold.
Serial communication method of the present invention carries out transfer of data based on holding wire between transmit leg and the recipient and ground wire, may further comprise the steps:
When a) not carrying out communication between transmit leg and the recipient, the holding wire of keeping therebetween is first level;
B) transmit leg becomes second level with holding wire, keeps reverting to first level behind the duration of predetermined start position, notifies recipient's communication to begin;
C) transmit leg keeps reverting to first level behind tentation data 1 duration or maintenance tentation data 0 duration respectively holding wire is become second level, transmits data 1 or data 0 to the recipient; Has certain difference between described predetermined start position duration, described tentation data 1 duration and described tentation data 0 duration.
Preferably, transmit leg keeps holding wire first level of predetermined interval between per two data bit.
Preferably, also comprise before the described step a): the data with each transmission/reception are 1 frame, and the order of data bit and implication comprise check value in the setting data frame;
Also comprise after the described step c): the recipient carries out verification to the Frame that is received according to check value, sends affirmative acknowledgement or negative response to transmit leg in predetermined acknowledging time.
Preferably, the order and the implication of data bit are specially in the described setting data frame: per 8 data bit are a byte, press the sequential delivery of little-endian; Frame adopts fixing byte number; First byte is a command word, shows the purposes of load data in the notebook data frame; Last byte is a check value, and its value is minimum 8 of all bytes before the check value byte in notebook data frame addition gained successively and value; It between command word byte and the check value byte load data in the notebook data frame.
Preferably, transmit leg resends the previous frame data after the negative response of receiving the recipient;
If transmit leg is not received recipient's affirmative acknowledgement or negative response in predetermined acknowledging time, then resend the previous frame data;
If transmit leg sends continuously the affirmative acknowledgement that still can not receive the recipient behind the predetermined number of retransmissions to a certain Frame, then communication is broken down.
The present invention also provides a kind of interface circuit of realizing above-mentioned serial communication method, comprises with the transmit leg processor being the transmission interface circuit of input and being the receiving interface circuit of output with recipient's processor, wherein:
The transmission interface circuit comprises NPN triode Q1, second to the 4th resistance R 2 to R4, transmit leg signal terminal TS and transmit leg ground wire terminal TG, the emitter-base bandgap grading of NPN triode Q1 connects power supply Vs, its base stage is connected to input by second resistance R 2, and its collector electrode is connected to transmit leg signal terminal TS by the 3rd resistance R 3; The 4th resistance R 4 is connected across between transmit leg signal terminal TS and the transmit leg ground wire terminal TG; Transmit leg ground wire terminal ground connection;
The receiving interface circuit comprises the 5th R5, optocoupler N1, recipient's signal terminal RS and recipient's ground wire terminal RG, and the light-emitting diode of optocoupler N1 is anodal to be connected with recipient's signal terminal RS, and the light-emitting diode negative pole is connected with recipient's ground wire terminal RG; Power supply Vs is connected to illuminated triode collector electrode and the output of optocoupler N1, the illuminated triode emitter grounding of optocoupler N1 by the 5th resistance R 5.
Preferably, described receiving interface circuit also comprises capacitor C 1, is connected the illuminated triode two ends of optocoupler N1.
Preferably, described receiving interface circuit comprises that also the 6th resistance R 6, one ends connect illuminated triode collector electrode and the 5th resistance R 5 of optocoupler N1, and the other end connects the output of receiving interface circuit.
Preferably, described receiving interface circuit also comprises the 7th resistance R 7, is connected across between recipient's signal terminal RS and the recipient's ground wire terminal RG.
Preferably, described transmission interface circuit also comprises first resistance R 1, is connected across between the input and power supply Vs of transmission interface circuit.
The present invention discerns start bit, data 1 and data 0 with the scheduled time length that level continues, and make between predetermined start position duration, tentation data 1 duration and tentation data 0 duration and have certain difference, thereby, strengthened the antijamming capability of serial communication not needing transmit leg and recipient to have under the condition of same reference clock.
Description of drawings
Figure 1 shows that the flow chart of serial communication method of the present invention;
Figure 2 shows that the level variation diagram of start bit in the embodiment of the invention, data 1 and data 0;
Figure 3 shows that the circuit diagram of interface circuit of the present invention.
Embodiment
The flow process of serial communication method of the present invention as shown in Figure 1.
At step S010, be 1 frame with the data of each transmission/reception, the order of data bit and implication in the setting data frame.
Serial communication carries out according to each bit, and before carrying out communication, transmit leg and recipient should make a stipulation with regard to the order and the implication of transmit data.For example, the 1st is the type of Frame to the A1 position, and (A1+1) position is the length of these frame data to the A2 position, is the load data of these frame data afterwards.Simultaneously, to be that little-endian transmission or big-endian transmission are made a stipulation also to data, the data of the deciphering transmit leg transmission that recipient's ability is correct like this.
Under or situation that transmission environment not good higher, can in Frame, increase the check value field and the method for set-up and calculated check value to the reliability requirement of data.
At step S020, when not carrying out communication between transmit leg and the recipient, the holding wire of keeping therebetween is first level.
At step S030, transmit leg becomes second level with holding wire, keeps reverting to first level behind the duration of predetermined start position, notifies recipient's communication to begin.Transmit leg is the start bit of Frame with second level of keeping predetermined start position duration on holding wire, notifies recipient's communication to begin.
At step S040, transmit leg keeps reverting to first level behind tentation data 1 duration or maintenance tentation data 0 duration respectively holding wire is become second level, transmits data 1 or data 0 to the recipient.Transmit leg is according to the order and the implication of the data bit of setting among the step S010, transmit data 1 with second level of on holding wire, keeping tentation data 1 duration, transmit data 0 with second level of on holding wire, keeping tentation data 0 duration, up to notebook data frame end of transmission.
In the present invention, predetermined start position duration, tentation data 1 duration and tentation data 0 duration are set by the user, but the above-mentioned duration that requires to set has certain difference, and the big I of difference is determined according to applied environment.Simultaneously the recipient, can with one be that the time range at center is discerned start bit and data with certain scheduled duration, when promptly the second level duration is in this time range, think that all what receive is the data or the start bit of this scheduled duration correspondence.
In order to distinguish each data bit exactly, transmit leg can be kept a period of time with holding wire at first level between per two data bit, length during this period of time can be fixed as certain predetermined interval, also can not fix, and for example can change in certain scope.
At step S050, the recipient carries out verification to the Frame that is received according to check value, sends affirmative acknowledgement or negative response to transmit leg in predetermined acknowledging time.
In Frame, be provided with under the situation of check value, after the recipient receives Frame, calculate the check value of received data according to the computational methods of setting, compare with the check value that receives, if two values are identical in predetermined acknowledging time to the affirmative acknowledgement of transmit leg feedback; If difference in predetermined acknowledging time to the negative response of transmit leg feedback.
At step S060, transmit leg does not receive that in the negative response of receiving the recipient or in predetermined acknowledging time recipient's positive or negative replys, and resends the previous frame data.
If transmit leg sends continuously the affirmative acknowledgement that still can not receive the recipient behind the predetermined number of retransmissions to a certain Frame, think that then communication breaks down.
Below by serial communication method among a specific embodiment explanation the present invention.
Two control boards are arranged in certain electrical equipment, and the processor on every control board carries out communication by common I/O (I/O) port and another piece control board.When not carrying out transfer of data between two processors, the holding wire between two control boards is in high level.Data are that unit transmits with the byte, low level formerly, high-order after.
Figure 2 shows that the level variation diagram of start bit in the present embodiment, data 1 and data 0.Start bit is to be the low level square wave of 10ms the duration, and data 1 are to be the square wave of 6ms the duration, and data 0 are to be the square wave of 3ms the duration.Simultaneously, between start bit and first data bit, there is the duration to be fixed as the high level signal of 3ms between per two data bit to do differentiation.
Each Frame comprises 5 bytes, and wherein first byte is a command word, shows the purposes of load data in the notebook data frame; Middle 3 bytes are the load data in the notebook data frame; Last byte is a check value, and its value is minimum 8 of all bytes before the check value byte in notebook data frame addition gained successively and value.
Control board is respectively main frame and passenger plane, and each communication sends Frame to passenger plane earlier by main frame, sends the interior passenger plane of end back maximum 50ms (millisecond) and sends Frame to main frame.The Frame that main frame sends to passenger plane comprises the state output frame and the instruction output frame of instruction passenger plane to main frame transmission data that is used for to passenger plane transmission data; The form of state output frame is: command word 0 * 11, the load data of 3 bytes are the state parameter of main frame; The form of instruction output frame is: command word 0 * 22, the load data of 3 bytes are invalid data, and passenger plane needn't be understood.
Passenger plane feeds back to main frame according to the Frame that receives from main frame, when receiving the state output frame of main frame to main frame feedback states acknowledgement frame, its form is: command word 0 * 11, the load data of the 1st byte is that the host data frame representing to be received in 0 * 88 o'clock is by verification, the load data of the 1st byte is to represent receiving data frames not by verification at 0 * 66 o'clock, and the load data of the 2nd and the 3rd byte is an invalid data; When passenger plane received the instruction output frame of main frame, to main frame feedback command acknowledgement frame, its form was: command word 0X22, the load data of 3 bytes are the state parameter of passenger plane.
When main frame is sending the answer of not receiving passenger plane behind the Frame in the 50ms, or receive that the Frame of passenger plane fails by verification, think that then this communication breaks down.Main frame resends Frame, if continuous three times all can not be finished this communication, thinks that then communication breaks down.
Figure 3 shows that a kind of interface circuit of realizing serial communication method of the present invention, comprise transmission interface circuit and receiving interface circuit.The receiving interface circuit is input with recipient's signal terminal RS and recipient's ground wire terminal RG, is connected to the transmit leg signal terminal TS and the transmit leg ground wire terminal TG of transmission interface circuit respectively; As output, be connected to recipient's processor with the RXD terminal.The transmission interface circuit as input, is connected to the transmit leg processor with the TXD terminal; With transmit leg signal terminal TS and transmit leg ground wire terminal TG is output.
The 4th resistance R 4 of transmission interface circuit is connected across between transmit leg signal terminal TS and the transmit leg ground wire terminal TG, transmit leg ground wire terminal TG ground connection; The 3rd resistance R 3 connects the collector electrode of transmit leg signal terminal TS and NPN triode Q1; The emitter-base bandgap grading of NPN triode Q1 meets power supply Vs; First resistance R 1 connects the emitter-base bandgap grading and input TXD terminal of NPN triode Q1; Second resistance R 2 connects the base stage and input TXD terminal of NPN triode Q1.First resistance R 1 in the foregoing circuit can be omitted.
The 7th resistance R 7 of receiving interface circuit is connected across between recipient's signal terminal RS and the recipient's ground wire terminal RG; The light-emitting diode of optocoupler N1 is anodal to be connected with recipient's signal terminal RS, and the light-emitting diode negative pole is connected with recipient's ground wire terminal RG; The 5th resistance R 5 connects the illuminated triode collector electrode of power supply Vs and optocoupler N1; The 6th resistance R 6 connects the illuminated triode collector electrode and output RXD terminal of optocoupler N1; The illuminated triode emitter grounding of optocoupler N1.Can also be in the receiving interface circuit be connected capacitor C 1 between collector electrode and the emitter-base bandgap grading of optocoupler N1 illuminated triode, play the effect of filtering; The 7th resistance R 7 can be omitted; The 6th resistance R 6 also can be omitted, and order output RXD terminal directly links to each other with the illuminated triode collector electrode of optocoupler N1.
Recipient's signal terminal RS among Fig. 3 is connected with transmit leg signal terminal TS, simultaneously recipient's ground wire terminal RG is connected with transmit leg ground wire terminal TG, then when transmit leg processor during by input terminal TXD input high level, not conducting of NPN triode Q1, transmit leg signal terminal TS output low level; When recipient's signal terminal RS is low level, the not conducting of light-emitting diode of optocoupler N1, its also not conducting of illuminated triode equally, this moment, recipient's processor received high level by lead-out terminal RXD.And when transmit leg processor during by input terminal TXD input low level, NPN triode Q1 conducting, transmit leg signal terminal TS exports high level; When recipient's signal terminal RS is high level, the light-emitting diode conducting of optocoupler N1, also conducting of its illuminated triode equally, this moment, recipient's processor received high level by lead-out terminal RXD.
As seen, when the transmit leg processor sent high level, recipient's processor received high level; When the transmit leg processor sent the low level of certain predetermined amount of time, recipient's processor received the low level of this time period.Adopt above-mentioned interface circuit, the transmit leg processor can carry out communication by the method for the invention with recipient's processor.Simultaneously adopt optocoupler can further increase antijamming capability of the present invention the recipient.
The present invention does not need transmit leg and recipient to have same reference clock so that identical clock frequency to be provided, and has good antijamming capability simultaneously.
The above embodiments of the present invention does not constitute the qualification to protection range of the present invention.Any any modification of being done within the spirit and principles in the present invention, be equal to and replace and improvement etc., all should be included within the claim protection range of the present invention.
Claims (10)
1. a serial communication method carries out transfer of data based on holding wire between transmit leg and the recipient and ground wire, it is characterized in that, may further comprise the steps:
When a) not carrying out communication between transmit leg and the recipient, the holding wire of keeping therebetween is first level;
B) transmit leg becomes second level with holding wire, keeps reverting to first level behind the duration of predetermined start position, notifies recipient's communication to begin;
C) transmit leg keeps reverting to first level behind tentation data 1 duration or maintenance tentation data 0 duration respectively holding wire is become second level, transmits data 1 or data 0 to the recipient; Has certain difference between described predetermined start position duration, described tentation data 1 duration and described tentation data 0 duration.
2. according to the described serial communication method of claim 1, it is characterized in that: transmit leg keeps holding wire first level of predetermined interval between per two data bit.
3. according to claim 1 or 2 described serial communication methods, it is characterized in that also comprise before the described step a): the data with each transmission/reception are 1 frame, and the order of data bit and implication comprise check value in the setting data frame;
Also comprise after the described step c): the recipient carries out verification to the Frame that is received according to check value, sends affirmative acknowledgement or negative response to transmit leg in predetermined acknowledging time.
4. according to the described serial communication method of claim 3, it is characterized in that the order and the implication of data bit are specially in the described setting data frame: per 8 data bit are a byte, press the sequential delivery of little-endian; Frame adopts fixing byte number; First byte is a command word, shows the purposes of load data in the notebook data frame; Last byte is a check value, and its value is minimum 8 of all bytes before the check value byte in notebook data frame addition gained successively and value; It between command word byte and the check value byte load data in the notebook data frame.
5. according to the described serial communication method of claim 3, it is characterized in that: transmit leg resends the previous frame data after the negative response of receiving the recipient;
If transmit leg is not received recipient's affirmative acknowledgement or negative response in predetermined acknowledging time, then resend the previous frame data;
If transmit leg sends continuously the affirmative acknowledgement that still can not receive the recipient behind the predetermined number of retransmissions to a certain Frame, then communication is broken down.
6. an interface circuit of realizing the described serial communication method of claim 1 is characterized in that, comprise with the transmit leg processor being the transmission interface circuit of input and being the receiving interface circuit of output with recipient's processor, wherein:
The transmission interface circuit comprises NPN triode Q1, second to the 4th resistance R 2 to R4, transmit leg signal terminal TS and transmit leg ground wire terminal TG, the emitter-base bandgap grading of NPN triode Q1 connects power supply Vs, its base stage is connected to input by second resistance R 2, and its collector electrode is connected to transmit leg signal terminal TS by the 3rd resistance R 3; The 4th resistance R 4 is connected across between transmit leg signal terminal TS and the transmit leg ground wire terminal TG; Transmit leg ground wire terminal ground connection;
The receiving interface circuit comprises the 5th R5, optocoupler N1, recipient's signal terminal RS and recipient's ground wire terminal RG, and the light-emitting diode of optocoupler N1 is anodal to be connected with recipient's signal terminal RS, and the light-emitting diode negative pole is connected with recipient's ground wire terminal RG; Power supply Vs is connected to illuminated triode collector electrode and the output of optocoupler N1, the illuminated triode emitter grounding of optocoupler N1 by the 5th resistance R 5.
7. according to the described interface circuit of claim 6, it is characterized in that: described receiving interface circuit also comprises capacitor C 1, is connected the illuminated triode two ends of optocoupler N1.
8. according to the described interface circuit of claim 6, it is characterized in that: described receiving interface circuit comprises that also the 6th resistance R 6, one ends connect illuminated triode collector electrode and the 5th resistance R 5 of optocoupler N1, and the other end connects the output of receiving interface circuit.
9. according to the described interface circuit of claim 6, it is characterized in that: described receiving interface circuit also comprises the 7th resistance R 7, is connected across between recipient's signal terminal RS and the recipient's ground wire terminal RG.
10. according to the described interface circuit of claim 6, it is characterized in that: described transmission interface circuit also comprises first resistance R 1, is connected across between the input and power supply Vs of transmission interface circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510080320 CN1893404B (en) | 2005-07-01 | 2005-07-01 | Serial communication method and interface circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200510080320 CN1893404B (en) | 2005-07-01 | 2005-07-01 | Serial communication method and interface circuit |
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| CN1893404A true CN1893404A (en) | 2007-01-10 |
| CN1893404B CN1893404B (en) | 2010-09-08 |
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| CN 200510080320 Active CN1893404B (en) | 2005-07-01 | 2005-07-01 | Serial communication method and interface circuit |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108574665A (en) * | 2017-03-09 | 2018-09-25 | 李明 | A kind of safe transmission method and system |
| CN112003878A (en) * | 2020-09-22 | 2020-11-27 | 北京舍得叔叔科技有限公司 | Serial communication device and system |
| CN112074052A (en) * | 2020-09-29 | 2020-12-11 | 海芯科技(厦门)有限公司 | Structure for reducing pins of LED driving chip |
| CN113030544A (en) * | 2021-03-31 | 2021-06-25 | 浙江大元泵业股份有限公司 | Electric signal isolation detection method |
| CN113466745A (en) * | 2020-03-31 | 2021-10-01 | 华为技术有限公司 | Transmission apparatus and data transmission method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1440161A (en) * | 2002-02-21 | 2003-09-03 | 黄庆文 | Open single-wire asynchronous serial communication bus |
| CN100438518C (en) * | 2002-05-13 | 2008-11-26 | 义隆电子股份有限公司 | Radio communication coding and decoding method using variable length signal to express digital data |
| CN1449168A (en) * | 2003-05-08 | 2003-10-15 | 尹启凤 | Single line serial interface protocol |
-
2005
- 2005-07-01 CN CN 200510080320 patent/CN1893404B/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108574665A (en) * | 2017-03-09 | 2018-09-25 | 李明 | A kind of safe transmission method and system |
| CN108574665B (en) * | 2017-03-09 | 2021-08-17 | 李明 | Safe transmission method and system |
| CN113466745A (en) * | 2020-03-31 | 2021-10-01 | 华为技术有限公司 | Transmission apparatus and data transmission method |
| CN112003878A (en) * | 2020-09-22 | 2020-11-27 | 北京舍得叔叔科技有限公司 | Serial communication device and system |
| CN112003878B (en) * | 2020-09-22 | 2023-12-29 | 北京舍得叔叔科技有限公司 | Serial communication device and system |
| CN112074052A (en) * | 2020-09-29 | 2020-12-11 | 海芯科技(厦门)有限公司 | Structure for reducing pins of LED driving chip |
| CN113030544A (en) * | 2021-03-31 | 2021-06-25 | 浙江大元泵业股份有限公司 | Electric signal isolation detection method |
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| Publication number | Publication date |
|---|---|
| CN1893404B (en) | 2010-09-08 |
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