CN112071898A - Rapid ionization device and preparation method thereof - Google Patents
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Abstract
The invention belongs to the field of pulse power semiconductor devices, and particularly relates to a rapid ionization device and a preparation method thereof. The rapid ionization device comprises a metalized cathode, a highly-doped n + region, a cathode side highly-doped p + short-circuit point, a p base region, an n-type ionization promoting layer, an anode side highly-doped n + short-circuit point, a highly-doped p + region and a metalized anode which are sequentially and adjacently arranged. According to the invention, the n-type ionization promoting layer with higher doping concentration than the n-base region is introduced into the FID device structure, and the expansion of the n-base region space charge region is limited, so that the region width which needs to be penetrated by the impact ionization front is limited, the penetrating range of the impact ionization front is reduced, the propagation time of the impact ionization front is reduced, and the opening speed of the device is improved.
Description
Technical Field
The invention belongs to the field of pulse power semiconductor devices, and particularly relates to a Fast Ionization Dynistor (FID) and a preparation method thereof.
Background
Delayed avalanche breakdown phenomenon is a new physical phenomenon in semiconductor devices discovered by the Russian Ioffe institute, which discloses the application of 10 a across a silicon device12When the reverse voltage is increased by V/s, an ultrafast impact ionization front is generated in the device, and when the impact occursAfter the ionization front passes through the space charge region of the device, the device turns on quickly. The conduction time of the device designed based on the delayed avalanche breakdown phenomenon can exceed the limit of the saturation drift velocity of free carriers, so that the conduction time of the device is shortened to be in a subnanosecond range.
The fast ionization device FID is a novel device based on delayed avalanche breakdown phenomenon, can be rapidly conducted within hundreds of picoseconds, can be used for generating pulses with high voltage level and short rise time, and is very suitable for being applied to a pulse power system. The structure of the conventional FID device is shown in fig. 1, and the device mainly includes four layers, namely an n + layer, a p layer, an n layer and a p + layer from top to bottom, and the n + layer and the p + layer both include short-circuit point structures.
An FID device is a two-terminal device, i.e., a device having only a cathode and an anode. As shown in FIG. 2, when the FID device works, firstly, the DC power supply DC charges the capacitor C, the FID device is in a forward blocking state, a forward voltage is borne between an anode (node 2) and a cathode (node 1), then, when the FID device needs to be triggered and conducted, the trigger source pulse generates a trigger pulse, the trigger pulse with a voltage rise rate larger than 1kV/ns is applied to the anode of the FID device, and when the voltage at two ends of the device rises to be 2-3 times larger than the blocking voltage, J & lt/3 & gt2The field strength at the junction exceeds the critical breakdown field strength, J2The junction is subjected to violent impact ionization, and then the ionization region is spread to two electrodes of the device, so that the device is rapidly conducted within hundreds of picoseconds, and the capacitor C is discharged through the FID device, so that the capacitor C is loaded on the load RLAnd (4) upper high voltage pulse.
Generally, to achieve higher blocking voltages for FID devices, higher resistivity single crystal materials are used in device design and fabrication, while allowing the devices to have wider n-base regions (i.e., n-layers). However, almost the entire n-base region becomes depleted before turn-on. Therefore, in the process of opening, the collision ionization front in the device needs to penetrate through the whole n-base region, plasma with certain concentration is generated in the n-base region, and then the device enters a conducting state. Because the electron-hole plasma concentration generated in the region through which the impact ionization front passes is limited, the n-base region after triggering conduction still has higher resistivity, so that higher residual voltage is generated at two ends of the device. The design of the device with high resistivity and long base region width leads to high residual voltage at two ends of the device and large on-state loss of the device after the FID device is switched on, and is not beneficial to long-term stable operation of the device.
Disclosure of Invention
Aiming at the defects or improvement requirements of the prior art, the invention provides a rapid ionization device and a preparation method thereof, wherein an n-type ionization promoting layer is additionally arranged between an n-base region and an anode side highly-doped p + region in an FID device structure, so that the propagation range of the collision ionization front is shortened, and the opening speed of the device is accelerated; meanwhile, the residual voltage of the device after being conducted is reduced, and the on-state loss of the device is reduced, so that the switching speed of the device is increased, and the working characteristics of the device are improved.
In order to achieve the purpose, the invention provides a rapid ionization device, which comprises a metalized cathode, a highly-doped n + region, a cathode side highly-doped p + short circuit point, a p base region, an n-type ionization promoting layer, an anode side highly-doped n + short circuit point, a highly-doped p + region and a metalized anode which are sequentially and adjacently arranged;
the highly doped n + region and the cathode side highly doped p + short circuit point are both positioned between the p base region and the metallized cathode, and the highly doped n + region and the cathode side highly doped p + short circuit point have the same thickness and are alternately arranged;
the highly doped p + region and the anode side highly doped n + short circuit point are both positioned between the n-type ionization promoting layer and the metallized anode, and the anode side highly doped n + short circuit point and the highly doped p + region have the same thickness and are alternately arranged.
Preferably, the thickness of the n-base region is 400-800 μm.
Preferably, the doping concentration in the n-type ionization promoting layer is 1016～1018cm-3(ii) a The thickness of the n-type ionization promoting layer is 10-60 μm.
Preferably, the doping concentration in the n-type ionization promoting layer is (1-5) × 1017cm-3(ii) a Thickness of the n-type ionization promoting layerIs 25 to 35 μm.
According to another aspect of the present invention, there is provided a method for preparing the rapid ionization device, comprising the steps of:
(1) carrying out impurity diffusion on the cleaned n-type Si wafer to form a PNP structure; then removing the p-shaped region on one side of the substrate by a thinning machine; obtaining a PN structure comprising a p base region and an n-base region;
(2) oxidizing the PN structure obtained in the step (1) to form SiO2A mask layer formed by removing SiO on the N side by photolithography2A layer mask layer, wherein an n-type separation promoting layer is formed on the n-base region side through a diffusion process;
(3) oxidizing the upper surface and the lower surface of the silicon wafer simultaneously to form SiO2A layer mask layer; transferring the pattern of the photoetching plate to two electrodes of the Si wafer by double-sided photoetching; etching to remove SiO at the position without photoresist protection2A layer; then removing the photoresist on the two poles of the Si wafer; then impurity diffusion is carried out to form a highly doped n + type short-circuit point on the anode side and a highly doped n + region on the cathode side;
(4) carrying out impurity diffusion on the two poles of the silicon wafer to form a highly doped p + region on the anode side and a highly doped p + short-circuit point on the cathode side;
(5) rounding the silicon wafer obtained in the step (4), punching an Al sheet into the same size as the rounded Si sheet, and removing an oxide film, organic dirt and contamination impurities on the surfaces of the Si sheet and the Al sheet;
(6) loading the multilayer materials into a mold, arranging each layer of material according to the sequence of graphite-Mo sheets-Al sheets-Si sheets, enabling Si sheet anodes to be opposite to the Al sheets, and then carrying out vacuum sintering on the loaded mold;
(7) evaporating an Al film on the cathode surface of the Si sheet to be used as an electrode; and then annealing to form Si-Al alloy between the cathode surface of the Si sheet and the Al film, thereby obtaining the rapid ionization device.
Preferably, the step (2) forms an n-type isolation promoting layer on the n-base region side by a low concentration phosphorus diffusion process.
Preferably, step (4) is specifically: coating an alcohol source prepared from boron oxide and aluminum nitrate on the two poles of the silicon wafer, and performing concentrated boron diffusion to form a highly doped p + region on the anode side and a highly doped p + short-circuit point on the cathode side.
Preferably, the step (6) places the assembled mold in a vacuum sintering furnace with a vacuum degree of 10-4And Pa above, controlling the sintering temperature to be 690-700 ℃, keeping the temperature for 5-30min, cooling the sintering furnace at the speed of 10-20 ℃/min, and naturally cooling in the air after the temperature is reduced to below 400 ℃.
Through the technical scheme, compared with the prior art, the invention can obtain the following beneficial effects:
(1) the invention provides a rapid ionization FID device which comprises a metalized cathode, a highly doped n + region, a cathode side highly doped p + short-circuit point, a p base region, an n-type ionization promoting layer, an anode side highly doped n + short-circuit point, a highly doped p + region and a metalized anode which are sequentially and adjacently arranged, wherein the n-type ionization promoting layer with higher doping concentration than the n-base region is introduced into the FID device, the width of a region which needs to be penetrated by a collision ionization front is limited by limiting the expansion of a space charge region of the n-base region, the penetrating range of the collision ionization front is reduced, the propagation time of the collision ionization front is reduced, and the opening speed of the device is improved.
(2) The rapid ionization FID device provided by the invention can greatly reduce the thickness of the n-base region under the condition of ensuring that the blocking voltage of the FID device is not changed, and can reduce the thickness of the n-base region by 10% on the premise of obviously improving the opening speed.
(3) After the FID device provided with the n-type ionization promoting layer is conducted, the length of a collision ionization front propagation region is reduced, so that the conduction resistance of the device is reduced, the residual voltage at two ends of the device is reduced, the on-state loss of the device is further reduced, and the device can work in a repetition frequency state.
(4) The invention introduces the n-type ionization promoting layer into the traditional FID device, and the conduction speed of the device is obviously improved and the residual voltage of the device is greatly reduced by optimally setting the doping concentration of the n-type ionization promoting layer and the thickness of the layer and matching with the integral FID device structure.
(5) The core of the technical scheme of the invention is to provide the FID device structure comprising the ionization promoting layer, and compared with the traditional FID device, the FID device adopting the structure has the advantages of improving the opening speed, reducing the on-state voltage drop, reducing the on-state loss and the like. In addition, according to the preparation method of the FID device with the ionization promoting layer structure, the n-type ionization promoting layer is formed through diffusion in the preparation process, so that the process cost is reduced, and then the cathode and anode patterns are transferred through double-sided photoetching, so that the process steps are saved.
Drawings
FIG. 1 is a schematic structural diagram of a conventional rapid ionization device;
FIG. 2 is a schematic diagram of an operating circuit of the FID device;
FIG. 3 is a schematic structural diagram of a rapid ionization device including an ionization promoting layer according to the present invention;
FIG. 4 is a graph illustrating the effect of different ionization-promoting layer concentrations on the turn-on process of a device;
FIG. 5 is a graph illustrating the effect of different ionization-promoting layer thicknesses on the device turn-on process;
FIG. 6 shows simulation results of a rapid ionization device with and without an ionization promoting layer;
in all figures, the same reference numerals are used to denote the same elements or structures, where 1 is a metallized cathode, 2 is a highly doped n + region, 3 is a cathode-side highly doped p + shorting point, 4 is a p-base region, 5 is an n-base region, 6 is an n-type ionization promoting layer, 7 is an anode-side highly doped n + shorting point, 8 is a highly doped p + region, and 9 is a metallized anode.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The invention provides a rapid ionization device, which comprises a metalized cathode 1, a highly-doped n + region 2, a cathode side highly-doped p + short-circuit point 3, a p base region 4, an n-base region 5, an n type ionization promoting layer 6, an anode side highly-doped n + short-circuit point 7, a highly-doped p + region 8 and a metalized anode 9 which are sequentially and adjacently arranged as shown in figure 3;
the highly doped n + region 2 and the cathode side highly doped p + short circuit point 3 are both positioned between the p base region 4 and the metallized cathode 1, and the highly doped n + region 2 and the cathode side highly doped p + short circuit point 3 have the same thickness and are alternately arranged;
the highly doped p + region 8 and the anode side highly doped n + short point 7 are both located between the n-type ionization promoting layer 6 and the metallization anode 9, and the anode side highly doped n + short point 7 and the highly doped p + region 8 have the same thickness and are alternately arranged.
The metallized cathode 1 and metallized anode 9 of the present invention may be made of aluminum metal.
The invention selects and sets the thickness and the doping concentration of each layer according to the voltage-resistant grade of the device. For example, in some embodiments, the heavily doped n + region 2 has a doping concentration of 1018～1020cm-3The thickness is 20-30 μm; the thickness of the p base region 4 is 60-80 μm; the n-base region 5 has a doping concentration of 1013～1014cm-3The thickness is 500 mu m; the doping concentration of the highly doped p + region 8 is 1017～1019cm-3The thickness is 20-30 μm.
The doping concentration of the n-type ionization promoting layer has a large influence on the opening speed of the device and the reduction amplitude of the residual voltage, but the higher the doping concentration is or the thicker the thickness of the ionization promoting layer is, the better the device is. Considering the opening speed, the residual voltage and the difficulty degree of process realization of the device, the feasible doping concentration of the n-type ionization promoting layer is 1016～1018cm-3The thickness is 10-60 μm. In addition, according to the effect of the concentration of the ionization promoting layer on the turn-on process of the device shown in fig. 4, it can be seen that when the concentration of the ionization promoting layer reaches 1 × 1017cm-3Then, the turn-on speed and the residual voltage of the device are not reduced any more, so in order to ensure higher injection efficiency of the emitter, the doping concentration of the preferred n-type ionization promoting layer is (1-5) × 1017cm-3From the influence of the thickness of the ionization-promoting layer shown in fig. 5 on the device turn-on process, it can be seen that when the thickness of the ionization-promoting layer is increased to 30 μm, the residual voltage drop of the device is very small, and in order to ensure the process implementationThe thickness of the n-type ionization promoting layer is preferably set to be 25-35 mu m, under the setting of the doping concentration and the thickness, the forward blocking capability of the device cannot be reduced, the emitter can be ensured to have higher injection efficiency, the conduction speed of the device is accelerated, and the residual voltage at two ends of the device after conduction is reduced.
The invention also provides a preparation method of the rapid ionization device, which comprises the following steps:
(1) carrying out impurity diffusion on the cleaned n-type Si wafer to form a PNP structure; then removing the p region on one side by using a thinning machine to obtain a PN structure containing the p base region 4 and the n-base region 5;
(2) oxidizing the PN structure obtained in the step (1) to form SiO2A mask layer formed by removing SiO on the N side by photolithography2A layer mask layer, wherein an n-type separation promoting layer 6 is formed on the n-base region side through a diffusion process;
(3) oxidizing the upper surface and the lower surface of the silicon wafer simultaneously to form SiO2A layer mask layer; transferring the pattern of the photoetching plate to two electrodes of the Si wafer by double-sided photoetching; etching to remove SiO at the position without photoresist protection2A layer; then removing the photoresist on the two poles of the Si wafer; then impurity diffusion is carried out to form a highly doped n + type short-circuit point 7 on the anode side and a highly doped n + region 2 on the cathode side;
(4) performing impurity diffusion on the two poles of the silicon wafer to form a highly doped p + region 8 on the anode side and a highly doped p + short-circuit point 3 on the cathode side;
(5) rounding, punching the Al sheet into the same size as the Si sheet after rounding, and removing oxide films, organic dirt and contamination impurities on the surfaces of the Si sheet and the Al sheet;
(6) loading a plurality of layers of materials into a mould, arranging each layer of material according to the sequence of graphite-Mo sheet-Al sheet-Si sheet, enabling the Si sheet anode to be opposite to the Al sheet, and then carrying out vacuum sintering on the loaded mould;
(7) evaporating an Al film on the cathode surface of the Si sheet to be used as an electrode; and then annealing to form Si-Al alloy between the cathode surface of the Si sheet and the Al film, thereby obtaining the rapid ionization device.
In some embodiments, in the step (1), Ga and Al diffusion is performed on the cleaned n-type Si wafer to form a PNP structure.
In some embodiments, step (2) forms an n-type isolation promoting layer 6 on the n-base region side of the silicon wafer of step (1) by a low concentration phosphorus diffusion process.
In some embodiments, step (3) performs phosphorus diffusion to form highly doped n + type shorting dots 7 on the anode side and highly doped n + regions 2 on the cathode side.
In some embodiments, step (4) is specifically: coating boron oxide (B) on both anode side and cathode side of silicon wafer2O3) And aluminum nitrate (Al (NO)3)3) The prepared alcohol source is subjected to concentrated boron diffusion to form a highly doped p + region 8 on the anode side and a highly doped p + short-circuit point 3 on the cathode side.
In some embodiments, step (6) places the assembled mold in a vacuum sintering furnace having a vacuum of 10 degrees f-4Pa above, controlling the sintering temperature at 690-700 ℃, and keeping the temperature for 5-30 minutes; and then cooling the sintering furnace at the speed of 10-20 ℃/min to below 400 ℃ so as to naturally cool the sintering furnace in the air.
In some embodiments, further comprising the step of:
(8) chamfering to form positive and negative dual bevel terminals; then mesa corrosion and mesa protection are carried out, and finally, the packaging of the tube core is carried out.
The following are examples:
example 1
As shown in fig. 3, a fast ionization device structure includes: the solar cell comprises a metallized cathode 1, a highly doped n + region 2, a cathode side highly doped p + short circuit point 3, a p base region 4, an n-base region 5, an n type ionization promoting layer 6, an anode side highly doped n + short circuit point 7, a highly doped p + region 8 and a metallized anode 9. The highly doped p + region 8 is positioned on the side of the metallized anode 9, and the highly doped n + short-circuit point 7 on the side of the anode is positioned between the highly doped p + regions 8 on the side of the metallized anode 9; the n-type ionization promoting layer 6 is positioned between the highly doped p + layer 8, the anode side highly doped n + short-circuit point 7 and the n-base region 5, the p-base region 4 is positioned above the n-base region 5, the highly doped n + region 2 is positioned between the p-base region 4 and the metallized cathode 1, the cathode side highly doped p + short-circuit point 3 is positioned between the highly doped n + regions 2 on the metallized cathode 1 side, and J is formed in the structure1、J2And J3Three PN junctions.
The preparation process of the rapid ionization device is as follows:
(1) selecting n-type Si single crystal;
(2) and cleaning the Si wafer. With ammonium hydroxide (NH)4OH), hydrogen peroxide (H)2O2) And water (H)2O) according to a weight ratio of 1: 2: 5 and hydrochloric acid (HCl) and hydrogen peroxide (H)2O2) And water (H)2O) according to a weight ratio of 1: 2: 8, cleaning the silicon wafer for 10 minutes respectively at the temperature of 65 ℃ by using the prepared cleaning solution;
(3) forming PNP structure by Ga and Al diffusion, the surface concentration is 1 x 1016cm-3The diffusion junction depth was set to 100 μm;
(4) removing the p-type region on one side by using a wafer thinning machine, and setting the thinning thickness to be 100 mu m;
(5) forming n-type ionization promoting layer with surface concentration of 1 × 10 by low concentration phosphorus diffusion process17cm-3The thickness is 30 mu m; namely, the distance between the n-type separation promoting layer and the metal anode is 60 mu m;
(6) oxidizing to form SiO2And (5) forming a mask layer. Oxidizing the silicon wafer at 1180 deg.C, and introducing dry oxygen (O)2)1 hour → Wet oxygen (steam) 4 hours → Dry oxygen (O)2)1 hour;
(7) carrying out double-sided photoetching, and transferring the pattern of a photoetching plate to two electrodes of a Si sheet;
(8) etching to remove SiO at the position without photoresist protection2And (3) a layer. With hydrofluoric acid (HF), ammonium fluoride (NH)4F) Water (H)2O) as 3: 6: 10, corroding the photoetched silicon wafer by using the prepared reagent, wherein the water bath temperature is 65 ℃, and the time is 3 minutes;
(9) and (6) removing the photoresist. With concentrated sulfuric acid (H)2SO4) And removing the residual photoresist on the Si wafer.
(10) Phosphorus diffuses to form a highly doped n + region on the cathode side and a highly doped n + short on the anode side. Nitrogen (N)2) By phosphorus oxychloride (POCl)3) Carrying a phosphorus source, and pre-depositing on a silicon wafer for 50 minutes at the temperature of 1000 ℃ to 1250 ℃ for 1.5 hours;
(11) and (6) cutting a circle. Rounding the Si sheet to a required size;
(12) punching the Al sheet into a wafer with the same diameter as the Si sheet, wherein the thickness of the Al sheet is 30 mu m;
(13) with hydrofluoric acid (HF): nitric acid (HNO)3) According to the following steps: 9 rinsing the Al sheet and the Si sheet respectively for 4 seconds by using the prepared corrosive liquid to remove a surface oxidation film, residual organic dirt and contamination impurities and improve the wetting between the Al sheet and the Si sheet so as to form a flat, uniform and large-area alloy pn junction;
(14) coating boron oxide (B) on the anode side and the cathode side of the silicon wafer respectively2O3) And aluminum nitrate (Al (NO)3)3) Preparing alcohol source, making concentrated boron diffusion, diffusion at 1200 deg.C for 30 min;
(15) stacking the graphite-Mo sheets-Al sheets-Si sheets- … in sequence, then loading the stacked graphite-Mo sheets-Al sheets-Si sheets- … into a mold, and placing the mold with the sheets in the vacuum sintering furnace, wherein the Si sheet anode is opposite to the Al sheet;
(16) vacuumizing the sintering furnace to ensure that the vacuum degree is 10-4Pa above, controlling the sintering temperature at 690 ℃, and keeping the temperature for 5-30 minutes;
(17) cooling the sintering furnace at the speed of 15 ℃/min to below 400 ℃ so that the sintering furnace can be naturally cooled in the air;
(18) and (6) coating. Evaporating an Al film on the cathode surface of the Si sheet in a vacuum coating machine;
(19) and (6) annealing. Carrying out vacuum annealing on the Si sheet at 500 ℃;
(20) and (6) grinding corners. Positive and negative double-bevel-angle terminals are formed to reduce the surface electric field and improve the withstand voltage;
(21) and (6) corrosion. With nitric acid (HNO)3) Hydrofluoric acid (HF), phosphoric acid (H)3PO4) Acetic acid (CH)3COOH) as 3: 2: 2: 2, preparing a corrosive liquid, and corroding for 1 minute at room temperature;
(22) and (5) protecting the table top. Coating silicon rubber on the table surface for protection, and curing at room temperature for 3 days;
(23) and packaging the tube core.
Comparative example 1
The ionization device structure of this comparative example is shown in fig. 1, and compared with the rapid ionization device of example 1, only lacksAn n-type ionization promoting layer, and the n-base region length of the ionization device of the comparative example is 560 μm, while the n-base region length of the ionization device of example 1 is 500 μm, and the surface concentration of the n-type ionization promoting layer is 1 x 1017cm-3The thickness was 30 μm. The other structural layers are the same.
As shown in fig. 6, when the FID device is triggered to conduct in the simulation, the waveforms of the voltages at the two ends of the FID device with the ionization promoting layer structure in example 1 and the FID device without the ionization promoting layer structure in comparative example 1 are shown, and it can be seen from the simulation result that the voltage at the two ends of the FID device with the ionization promoting layer structure after being triggered has a faster drop speed and a lower residual voltage, and meets the design target of the ionization promoting layer.
After the FID device in the embodiment of the invention is added with the n-type ionization promoting layer, the thickness of the n-base region can be greatly reduced under the condition of ensuring that the blocking voltage of the FID device is not changed. In addition, when the FID device works, the metallized anode is connected with a forward voltage, the voltage difference between the metallized anode and the metallized cathode is smaller than the blocking voltage designed by the device, the device is in a forward blocking state, and at the moment, a space charge region is formed in partial regions of the n-base region and the p-base region; when in triggering, the metallized anode applies a trigger pulse with a voltage rising rate larger than 1kV/ns, the anode voltage is rapidly raised, the space charge region of the n-base region is rapidly expanded, but the concentration of the n-type ionization promoting layer is obviously larger than that of the n-base region, so the space charge region of the n-base region cannot be further expanded after being expanded to the n-type ionization promoting layer, and the width of the n-base region with the ionization promoting layer is smaller than that of the n-base region without the ionization promoting layer under the same blocking voltage, so the length of the space charge region before the device is conducted is greatly reduced, the electric field intensity distribution in the n-base region is flatter, and the spread of the collision ionization front edge is more favorable for the device to be conducted; when the voltage across the device reaches two to three times the maximum blocking voltage of the device, J2The electric field intensity at the junction exceeds the critical breakdown field intensity, and the propagation of the collision ionization front begins to occur inside the device; the n-type ionization promoting layer prevents the space charge region from further expanding after the space charge region expands to the whole n-base region, so that the width of the region through which the impact ionization front needs to pass is limited, and the range through which the impact ionization front passes is reduced.
In this embodiment, the n-type ionization promoting layer can further reduce the propagation time of the impact ionization front by limiting the width of the region traversed by the impact ionization front, thereby increasing the turn-on speed. After the device is conducted, the length of a collision ionization front propagation region is reduced, so that the on resistance of the device is reduced, the residual voltage at two ends of the device is reduced, the on-state loss of the device is further reduced, and the device can work in a repetition frequency state more favorably.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (8)
1. A rapid ionization device is characterized by comprising a metalized cathode (1), a highly-doped n + region (2), a cathode side highly-doped p + short-circuit point (3), a p base region (4), an n-base region (5), an n-type ionization promoting layer (6), an anode side highly-doped n + short-circuit point (7), a highly-doped p + region (8) and a metalized anode (9) which are arranged adjacently in sequence;
wherein the highly doped n + region (2) and the cathode side highly doped p + short point (3) are both located between the p base region (4) and the metallization cathode (1), and the highly doped n + region (2) and the cathode side highly doped p + short point (3) have the same thickness and are alternately arranged;
the highly doped p + region (8) and the anode side highly doped n + short point (7) are both located between the n-type ionization promoting layer (6) and the metallization anode (9), and the anode side highly doped n + short point (7) and the highly doped p + region (8) have the same thickness and are alternately arranged.
2. The device according to claim 1, wherein the n-base region (5) has a thickness of 400-800 μm.
3. The device according to claim 1, characterized in that the doping concentration in the n-type ionization promoting layer (6) is 1016～1018cm-3(ii) a Thickness of the n-type ionization promoting layerThe degree is 10 to 60 μm.
4. The device according to claim 1, wherein the n-type ionization promoting layer (6) has a doping concentration of (1-5) × 1017cm-3(ii) a The n-type dissociation-promoting layer (6) has a thickness of 25 to 35 μm.
5. The method for preparing a rapid ionization device according to any one of claims 1 to 4, comprising the steps of:
(1) carrying out impurity diffusion on the cleaned n-type Si wafer to form a PNP structure; then removing the p-shaped region on one side of the substrate by a thinning machine; obtaining a PN structure comprising a p base region (4) and an n-base region (5);
(2) oxidizing the PN structure obtained in the step (1) to form SiO2A mask layer formed by removing SiO on the N side by photolithography2A layer mask layer, wherein an n-type separation promoting layer (6) is formed on the n-base region side through a diffusion process;
(3) oxidizing the upper surface and the lower surface of the silicon wafer simultaneously to form SiO2A layer mask layer; transferring the pattern of the photoetching plate to two electrodes of the Si wafer by double-sided photoetching; etching to remove SiO at the position without photoresist protection2A layer; then removing the photoresist on the two poles of the Si wafer; then impurity diffusion is carried out to form a highly doped n + type short-circuit point (7) on the anode side and a highly doped n + region (2) on the cathode side;
(4) impurity diffusion is carried out on the two poles of the silicon wafer to form a highly doped p + region (8) on the anode side and a highly doped p + short-circuit point (3) on the cathode side;
(5) rounding the silicon wafer obtained in the step (4), punching an Al sheet into the same size as the rounded Si sheet, and removing an oxide film, organic dirt and contamination impurities on the surfaces of the Si sheet and the Al sheet;
(6) loading the multilayer materials into a mold, arranging each layer of material according to the sequence of graphite-Mo sheets-Al sheets-Si sheets, enabling Si sheet anodes to be opposite to the Al sheets, and then carrying out vacuum sintering on the loaded mold;
(7) evaporating an Al film on the cathode surface of the Si sheet to be used as an electrode; and then annealing to form Si-Al alloy between the cathode surface of the Si sheet and the Al film, thereby obtaining the rapid ionization device.
6. The production method according to claim 5, wherein the step (2) forms the n-type ionization promoting layer (6) on the n-base region side by a low concentration phosphorus diffusion process.
7. The preparation method according to claim 5, wherein the step (4) is specifically: two poles of the silicon wafer are coated with an alcohol source prepared from boron oxide and aluminum nitrate, and concentrated boron diffusion is carried out to form a highly doped p + region (8) at the anode side and a highly doped p + short-circuit point (3) at the cathode side.
8. The production method according to claim 5, wherein the step (6) places the assembled mold in a vacuum sintering furnace having a degree of vacuum of 10-4And Pa above, controlling the sintering temperature to be 690-700 ℃, keeping the temperature for 5-30min, cooling the sintering furnace at the speed of 10-20 ℃/min, and naturally cooling in the air after the temperature is reduced to below 400 ℃.
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