CN107275443A - A kind of IBC battery preparation methods - Google Patents
A kind of IBC battery preparation methods Download PDFInfo
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- CN107275443A CN107275443A CN201710652343.XA CN201710652343A CN107275443A CN 107275443 A CN107275443 A CN 107275443A CN 201710652343 A CN201710652343 A CN 201710652343A CN 107275443 A CN107275443 A CN 107275443A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 114
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 114
- 239000010703 silicon Substances 0.000 claims abstract description 114
- ILAHWRKJUDSMFH-UHFFFAOYSA-N boron tribromide Chemical compound BrB(Br)Br ILAHWRKJUDSMFH-UHFFFAOYSA-N 0.000 claims abstract description 46
- 238000009792 diffusion process Methods 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims abstract description 31
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 20
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 14
- 239000011574 phosphorus Substances 0.000 claims abstract description 14
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 13
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 9
- 230000008569 process Effects 0.000 claims abstract description 9
- 238000005468 ion implantation Methods 0.000 claims abstract description 7
- 230000003213 activating effect Effects 0.000 claims abstract description 6
- 150000002500 ions Chemical class 0.000 claims description 29
- 239000002184 metal Substances 0.000 claims description 17
- 238000002513 implantation Methods 0.000 claims description 12
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 claims description 10
- 239000005297 pyrex Substances 0.000 claims description 10
- 229910004205 SiNX Inorganic materials 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 238000006388 chemical passivation reaction Methods 0.000 claims description 7
- 238000005137 deposition process Methods 0.000 claims description 6
- 229910052681 coesite Inorganic materials 0.000 claims description 4
- 229910052906 cristobalite Inorganic materials 0.000 claims description 4
- 239000000243 solution Substances 0.000 claims description 4
- 229910052682 stishovite Inorganic materials 0.000 claims description 4
- 229910052905 tridymite Inorganic materials 0.000 claims description 4
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000002347 injection Methods 0.000 claims description 3
- 239000007924 injection Substances 0.000 claims description 3
- 229910017604 nitric acid Inorganic materials 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 238000005245 sintering Methods 0.000 claims description 3
- 239000002002 slurry Substances 0.000 claims description 3
- 230000004913 activation Effects 0.000 abstract description 4
- 239000012535 impurity Substances 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 230000004044 response Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- -1 phosphorus Ion Chemical class 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
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Abstract
The present invention is applied to solar cell preparing technical field, and the present invention provides a kind of IBC battery preparation methods, and by using ion implantation technique, phosphorus doping processing is carried out to the back surface and preceding surface of the silicon chip of formation matte；Using plasma strengthens chemical vapour deposition technique, and back surface and preceding surface to silicon chip are diffused mask process；Remove the diffusion mask layer and ion doped layer in the P+ regions of the back surface of silicon chip；Boron tribromide diffusion is carried out to silicon chip under preset temperature, in the back surface formation p type island region domain of silicon chip, the sheet resistance in p type island region domain is controlled in the first preset range；Enter line activating formation back surface field and front court to ion doped layer, the sheet resistance of back surface field is controlled in the second preset range, and the sheet resistance of front court is controlled in the 3rd preset range.The embodiment of the present invention can realize that ion implanting carries out phosphorus doping processing, and the high temperature spread using Boron tribromide realizes the activation to ion implanted impurity, can simplify the flow of IBC batteries making, reduces production cost.
Description
Technical field
The invention belongs to solar cell preparing technical field, more particularly to a kind of IBC battery preparation methods.
Background technology
IBC (Interdigitated Back Contact refer to intersection back contacts) battery, refers to that battery front side is electrodeless,
The positive and negative electrode metal grid lines of battery are in finger-like cross arrangement in cell backside.The characteristics of IBC batteries are maximum is PN junction and metal
The back side all in battery is contacted, the positive influence blocked without metal electrode is carried on the back simultaneously therefore with higher short circuit current flow
Face can allow wider metal grid lines to reduce series resistance, so as to improve fill factor, curve factor；It is well blunt plus the preceding surface of battery
The open loop voltage gain that change effect is brought so that the unobstructed battery not only high conversion efficiency, and looking more in this front
It is attractive in appearance, meanwhile, the component of all back-contact electrodes is easier to assembling.IBC batteries are the crystal silicon sun of future generation due to its potential high efficiency
The direction of the extensive industrialization of battery.
IBC batteries are needed during preparation in the P areas and N areas of IBC cell backside chi structures and the progress of preceding surface
Doping treatment.
Current traditional P areas and N areas for preparing IBC cell backside chi structures and preceding surface doping, are usually in mask
Different doped regions (P areas and N areas) are formed under conditions of protection by High temperature diffusion, due to needing multiple mask and high temperature
DIFFUSION TREATMENT process, the damage to silicon chip is larger, influences the yield rate of IBC batteries.
The content of the invention
In view of this, the embodiments of the invention provide a kind of IBC battery preparation methods, it can realize that ion implanting carries out phosphorus
Doping treatment, and the high temperature spread using Boron tribromide realizes the activation to ion implanted impurity, can simplify the making of IBC batteries
Flow, reduces production cost.
The embodiment of the present invention provides a kind of IBC battery preparation methods, including：
N-type silicon chip is chosen, surface damage removal is carried out to silicon chip and surface structuration is handled, in silicon chip surface formation suede
Face；
Using ion implantation technique, phosphorus doping processing is carried out to the back surface and preceding surface of the silicon chip of formation matte, in silicon
The back surface of piece and preceding surface form ion doped layer；
Using plasma strengthens chemical vapour deposition technique, and back surface and preceding surface to silicon chip are diffused at mask
Reason, diffusion mask layer is formed in the back surface of silicon chip and preceding surface；
Remove the diffusion mask layer and ion doped layer in the P+ regions of the back surface of silicon chip；
Boron tribromide diffusion is carried out to silicon chip under preset temperature, in the back surface formation p type island region domain of silicon chip, the p-type
The sheet resistance in region is controlled in the first preset range；Enter line activating formation back surface field and front court to ion doped layer, wherein back surface field
Sheet resistance is controlled in the second preset range, and the sheet resistance of front court is controlled in the 3rd preset range；
Remove the Pyrex layer that the diffusion mask layer and Boron tribromide of silicon chip are diffuseed to form；
Chemical passivation processing is carried out to silicon chip；
Antireflection layer deposition processes are carried out to silicon chip；
Make the metal electrode of silicon chip.
Further, the use ion implantation technique, mixes the back surface and preceding surface of the silicon chip of formation matte
Reason is lived together, including：With 10~15keV of Implantation Energy, implantation dosage 1 × 1015~1 × 1016/cm2, phosphorus is carried out to silicon chip back surface
Ion doping injects；With 5~10keV of Implantation Energy, implantation dosage 5 × 1014~1 × 1015/cm2, surface preceding to silicon chip carries out phosphorus
Ion doping injects.
Further, the component of the diffusion mask layer is SiO2And SiNx, thickness is 50~150nm.
Further, the diffusion mask and ion doped layer in the P+ regions of the back surface for removing silicon chip, including：Using
Laser or printing corrosive slurry, remove the diffusion mask and ion doped layer in the P+ regions of the back surface of silicon chip.
Further, first preset range is 50-100 Ω/, and second preset range is 30-80 Ω/,
3rd preset range is 150-200 Ω/.
Further, the Pyrex layer that the diffusion mask layer and Boron tribromide for removing silicon chip is diffuseed to form, including：
Using 9% HF solution to Wafer Cleaning 5-8min, the borosilicate that the diffusion mask layer and Boron tribromide of silicon chip are diffuseed to form is removed
Glassy layer.
Further, it is described to silicon chip progress chemical passivation processing, including：Generated using nitric acid oxidation in silicon chip surface
The silicon oxide layer of 1.5nm thickness.
Further, state and antireflection layer deposition processes are carried out to silicon chip, including：Using plasma strengthens chemical vapor deposition
Area method deposits SiNx antireflection layers, and the thickness of the SiNx antireflection layers is 75-85nm.
Further, the metal electrode for making silicon chip, including：Using silk screen print method, carried on the back in the N+ of silicon chip back side
Field and P+ carry on the back tie region printing metal gate line, and metal grid lines are formed into Ohmic contact using sintering process.
The beneficial effect of the embodiment of the present invention compared with prior art is：It is prepared by IBC batteries provided in an embodiment of the present invention
Method, by choosing N-type silicon chip, carries out surface damage removal to silicon chip using chemical attack and surface structuration is handled, in silicon
Piece surface forms matte；Using ion implantation technique, the back surface and preceding surface of the silicon chip of formation matte are carried out at phosphorus doping
Reason, ion doped layer is formed in the back surface of silicon chip and preceding surface；Using plasma strengthens chemical vapour deposition technique, to silicon chip
Back surface and preceding surface be diffused mask process, form diffusion mask layer on the back surface of silicon chip and preceding surface；Remove silicon
The diffusion mask layer and ion doped layer in the P+ regions of the back surface of piece；Boron tribromide expansion is carried out to silicon chip under preset temperature
Dissipate, in the back surface formation p type island region domain of silicon chip, the sheet resistance in the p type island region domain is controlled in the first preset range；To ion doping
Layer enters line activating formation back surface field and front court, and the wherein sheet resistance of back surface field is controlled in the second preset range, and the sheet resistance control of front court exists
In 3rd preset range；Remove the Pyrex layer that the diffusion mask layer and Boron tribromide of silicon chip are diffuseed to form；Silicon chip is carried out
Chemical passivation is handled；Antireflection layer deposition processes are carried out to silicon chip；Make the metal electrode of silicon chip.The embodiment of the present invention can be real
Existing ion implanting carries out phosphorus doping processing, and the high temperature spread using Boron tribromide realizes the activation to ion implanted impurity, can
Simplify the flow that IBC batteries make, reduce production cost.
Brief description of the drawings
Technical scheme in order to illustrate the embodiments of the present invention more clearly, below will be to embodiment or description of the prior art
In required for the accompanying drawing that uses be briefly described, it should be apparent that, drawings in the following description are only some of the present invention
Embodiment, for those of ordinary skill in the art, without having to pay creative labor, can also be according to these
Accompanying drawing obtains other accompanying drawings.
Fig. 1 is a kind of schematic flow sheet of IBC battery preparation methods provided in an embodiment of the present invention；
A kind of schematic flow sheet for IBC battery preparation methods that Fig. 2 provides for another embodiment of the present invention.
Embodiment
In describing below, in order to illustrate rather than in order to limit, it is proposed that such as tool of particular system structure, technology etc
Body details, thoroughly to understand the embodiment of the present invention.However, it will be clear to one skilled in the art that there is no these specific
The present invention can also be realized in the other embodiments of details.In other situations, omit to well-known system, device, electricity
Road and the detailed description of method, in case unnecessary details hinders description of the invention.
It should be appreciated that ought be in this specification and in the appended claims in use, term " comprising " and "comprising" be indicated
Described feature, entirety, step, operation, the presence of element and/or component, but be not precluded from one or more of the other feature, it is whole
Body, step, operation, element, component and/or its presence or addition for gathering.
It is also understood that the term used in this description of the invention is merely for the sake of the mesh for describing specific embodiment
And be not intended to limit the present invention.As used in description of the invention and appended claims, unless on
Other situations are hereafter clearly indicated, otherwise " one " of singulative, " one " and "the" are intended to include plural form.
It will be further appreciated that, the term "and/or" used in description of the invention and appended claims is
Refer to any combinations of one or more of the associated item listed and be possible to combination, and including these combinations.
As used in this specification and in the appended claims, term " if " can be according to context quilt
Be construed to " when ... " or " once " or " in response to determining " or " in response to detecting ".Similarly, phrase " if it is determined that " or
" if detecting [described condition or event] " can be interpreted to mean according to context " once it is determined that " or " in response to true
It is fixed " or " once detecting [described condition or event] " or " in response to detecting [described condition or event] ".
In order to illustrate technical solutions according to the invention, illustrated below by specific embodiment.
With reference to Fig. 1, Fig. 1 is a kind of schematic flow sheet of IBC battery preparation methods provided in an embodiment of the present invention.This implementation
Details are as follows for example：
S101：N-type silicon chip is chosen, surface damage removal is carried out to silicon chip and surface structuration is handled, in silicon chip surface shape
Into matte.
In embodiments of the present invention, the resistivity value 3-12 Ω cm of N-type silicon chip.Can be using the method for chemical attack to silicon
Piece carries out surface damage and removed and surface structuration processing.Wherein matte is shaped as inverted pyramid.
S102：Using ion implantation technique, phosphorus doping processing is carried out to the back surface and preceding surface of the silicon chip of formation matte,
Ion doped layer is formed in the back surface of silicon chip and preceding surface.
S103：Using plasma strengthens chemical vapour deposition technique, and back surface and preceding surface to silicon chip are diffused and covered
Film process, diffusion mask layer is formed in the back surface of silicon chip and preceding surface.
In embodiments of the present invention, plasma enhanced chemical vapor deposition method (Plasma Enhanced Chemical
Vapor Deposition, PECVD) it is to make the gas ionization containing film composed atom by microwave or radio frequency etc., in part
Plasma is formed, and plasma chemistry activity is very strong, it is easy to react, diffusion mask layer is gone out in deposition on substrate.
S104：Remove the diffusion mask layer and ion doped layer in the P+ regions of the back surface of silicon chip.
In embodiments of the present invention, the P+ regions on silicon chip can need to be made according to design.P+ regions are silicon chip
The upper region for being used to form p-type knot.
S105：Boron tribromide diffusion is carried out to silicon chip under preset temperature, in the back surface formation p type island region domain of silicon chip, institute
The sheet resistance for stating p type island region domain is controlled in the first preset range；Enter line activating formation back surface field and front court to ion doped layer, wherein carrying on the back
The sheet resistance of field is controlled in the second preset range, and the sheet resistance of front court is controlled in the 3rd preset range.
In embodiments of the present invention, preset temperature is that Boron tribromide spreads the hot conditions needed, and preferably 900 is Celsius
~1000 degrees Celsius of degree.Wherein back surface field and front court refer respectively to the ion doped layer on silicon chip back surface and preceding surface.
S106：Remove the Pyrex layer that the diffusion mask layer and Boron tribromide of silicon chip are diffuseed to form.
In embodiments of the present invention, Pyrex layer can be formed on silicon chip in step S105 Boron tribromide diffusion.
S107：Chemical passivation processing is carried out to silicon chip.
In embodiments of the present invention, N-type silicon chip forms P+ emission layers, the transmitting after being spread by Boron tribromide on surface
The surface of layer meets more serious, it usually needs influence of the surface recombination to battery is reduced using Passivation Treatment.
S108：Antireflection layer deposition processes are carried out to silicon chip.
S109：Make the metal electrode of silicon chip.
It was found from above-described embodiment, the present embodiment is handled by carrying out ion discrepancy phosphorus doping to silicon chip first, then to silicon
Piece carries out the Boron tribromide DIFFUSION TREATMENT under hot conditions, can realize that ion implanting carries out phosphorus doping processing, and utilize tribromo
Change activation of the high temperature realization of boron diffusion to ion implanted impurity, the flow of IBC batteries making can be simplified, production cost is reduced.
With reference to Fig. 2, a kind of schematic flow sheet for IBC battery preparation methods that Fig. 2 provides for another embodiment of the present invention.
Details are as follows for the present embodiment：
S201：N-type silicon chip is chosen, surface damage removal is carried out to silicon chip and surface structuration is handled, in silicon chip surface shape
Into matte.
S202：With Implantation Energy 10keV~15keV, implantation dosage 1 × 1015/cm2~1 × 1016/cm2, table is carried on the back to silicon chip
Face carries out phosphonium ion doping injection.
S203：With Implantation Energy 5keV~10keV, implantation dosage 5 × 1014/cm2~1 × 1015/cm2, to table before silicon chip
Face carries out phosphonium ion doping injection.
S204：Using plasma strengthens chemical vapour deposition technique, and back surface and preceding surface to silicon chip are diffused and covered
Film process, diffusion mask layer is formed in the back surface of silicon chip and preceding surface.
S205：Remove the diffusion mask layer and ion doped layer in the P+ regions of the back surface of silicon chip.
S206：Boron tribromide diffusion is carried out to silicon chip under preset temperature, in the back surface formation p type island region domain of silicon chip, institute
The sheet resistance for stating p type island region domain is controlled in 50-100 Ω/；Enter line activating formation back surface field and front court, wherein back surface field to ion doped layer
Sheet resistance control in 30-80 Ω/, the sheet resistance of front court is controlled in 150-200 Ω/.
S207：Remove the Pyrex layer that the diffusion mask layer and Boron tribromide of silicon chip are diffuseed to form.
S208：Chemical passivation processing is carried out to silicon chip.
S209：Antireflection layer deposition processes are carried out to silicon chip.
S210：Make the metal electrode of silicon chip.
In one embodiment of the invention, the component of the diffusion mask layer in above-mentioned steps S103 is SiO2And SiNx,
Thickness is 50~150nm.
In embodiments of the present invention,
In one embodiment of the invention, above-mentioned steps S104 includes：Using laser or printing corrosive slurry, silicon is removed
The diffusion mask and ion doped layer in the P+ regions of the back surface of piece.
In one embodiment of the invention, above-mentioned steps S106 includes：Using 9% HF solution to Wafer Cleaning 5-
8min, removes the Pyrex layer that the diffusion mask layer and Boron tribromide of silicon chip are diffuseed to form.
In one embodiment of the invention, above-mentioned steps S107 includes：Generated using nitric acid oxidation in silicon chip surface
The silicon oxide layer of 1.5nm thickness.
In one embodiment of the invention, above-mentioned steps S108 includes：Using plasma strengthens chemical vapor deposition
Method deposits SiNx antireflection layers, and the thickness of the SiNx antireflection layers is 75-85nm.
In one embodiment of the invention, above-mentioned steps S109 includes：Using silk screen print method, in the N+ of silicon chip back side
Metal grid lines are formed Ohmic contact by back surface field and P+ back of the body tie region printing metal gate lines using sintering process.
The foregoing is only a specific embodiment of the invention, but protection scope of the present invention is not limited thereto, any
Those familiar with the art the invention discloses technical scope in, various equivalent modifications can be readily occurred in or replaced
Change, these modifications or substitutions should be all included within the scope of the present invention.Therefore, protection scope of the present invention should be with right
It is required that protection domain be defined.
Claims (9)
1. a kind of IBC battery preparation methods, it is characterised in that including：
N-type silicon chip is chosen, surface damage removal is carried out to silicon chip and surface structuration is handled, in silicon chip surface formation matte；
Using ion implantation technique, back surface and preceding surface to silicon chip carry out phosphorus doping processing, silicon chip back surface and before
Surface forms ion doped layer；
Using plasma strengthens chemical vapour deposition technique, and back surface and preceding surface to silicon chip are diffused mask process,
The back surface of silicon chip and preceding surface form diffusion mask layer；
Remove the diffusion mask layer and ion doped layer in the P+ regions of the back surface of silicon chip；
Boron tribromide diffusion is carried out to silicon chip under preset temperature, in the back surface formation p type island region domain of silicon chip, the p type island region domain
Sheet resistance control in the first preset range；Enter line activating formation back surface field and front court, the sheet resistance of the back surface field to ion doped layer
Control is in the second preset range, and the sheet resistance of the front court is controlled in the 3rd preset range；
Remove the Pyrex layer that the diffusion mask layer and Boron tribromide of silicon chip are diffuseed to form；
Chemical passivation processing is carried out to silicon chip；
Antireflection layer deposition processes are carried out to silicon chip；
Make the metal electrode of silicon chip.
2. IBC battery preparation methods according to claim 1, it is characterised in that the use ion implantation technique, to shape
Processing is doped into the back surface of the silicon chip of matte and preceding surface, including：
With Implantation Energy 10keV~15keV, implantation dosage 1 × 1015/cm2~1 × 1016/cm2, phosphorus is carried out to silicon chip back surface
Ion doping injects；
With Implantation Energy 5keV~10keV, implantation dosage 5 × 1014/cm2~1 × 1015/cm2, preceding to silicon chip surface carry out phosphorus from
Son doping injection.
3. IBC battery preparation methods according to claim 1, it is characterised in that the component of the diffusion mask layer is SiO2
And SiNx, thickness is 50nm~150nm.
4. IBC battery preparation methods according to claim 1, it is characterised in that the P+ of the back surface of the removal silicon chip
The diffusion mask and ion doped layer in region, including：
Using laser or printing corrosive slurry, the diffusion mask and ion doped layer in the P+ regions of the back surface of silicon chip are removed.
5. IBC battery preparation methods according to claim 1, it is characterised in that first preset range is 50 Ω/
~100 Ω/, second preset range is 30 Ω/~80 Ω/, and the 3rd preset range is 150 Ω/~200
Ω/□。
6. IBC battery preparation methods according to claim 1, it is characterised in that the diffusion mask layer of the removal silicon chip
The Pyrex layer diffuseed to form with Boron tribromide, including：
Using 9% HF solution to 5~8min of Wafer Cleaning, remove what the diffusion mask layer and Boron tribromide of silicon chip were diffuseed to form
Pyrex layer.
7. IBC battery preparation methods according to claim 1, it is characterised in that described to be carried out to silicon chip at chemical passivation
Reason, including：
The silicon oxide layer of 1.5nm thickness is generated in silicon chip surface using nitric acid oxidation.
8. IBC battery preparation methods according to claim 1, it is characterised in that described to be sunk to silicon chip progress antireflection layer
Product processing, including：
Using plasma strengthens chemical vapor deposition SiNx antireflection layers, and the thickness of the SiNx antireflection layers is
75nm~85nm.
9. IBC battery preparation methods according to claim 1, it is characterised in that the metal electrode of the making silicon chip, bag
Include：
Using silk screen print method, tie region printing metal gate line is carried on the back in the N+ back surface fields and P+ of silicon chip back side, will using sintering process
Metal grid lines formation Ohmic contact.
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