CN112071765A - Method for determining wafer processing parameters and wafer processing method - Google Patents
Method for determining wafer processing parameters and wafer processing method Download PDFInfo
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- 239000010703 silicon Substances 0.000 claims abstract description 39
- 238000005520 cutting process Methods 0.000 claims description 72
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
Abstract
The invention provides a method for determining wafer processing parameters and a method for processing a wafer, wherein the method for determining the wafer processing parameters comprises the following steps: acquiring flatness data of preset lines on a plurality of wafers in a wafer processing procedure; determining radial data of the preset line according to the flatness data of the preset line; and determining silicon wafer processing parameters according to the radial data of the preset lines of the wafers. According to the method, the parameters of the silicon rods of the next batch or the subsequent processing procedure of the wafer can be determined according to the processing data of the silicon rods of the previous batch, so that the flatness accuracy of the obtained wafer is higher, the processing yield is higher, and the cost can be reduced.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for determining wafer processing parameters and a wafer processing method.
Background
The nanometer morphology is used as a flatness parameter for representing convex-concave components with the thickness of 0.2-dozens of mm of a wafer, and has extremely important influence on subsequent chips. The nanotopography is mainly generated in the slicing and thinning stages of the silicon wafer, but because the numerical value related to the nanotopography is small, in the cutting and thinning stages, because the surface of the silicon wafer is rough, a capacitance type or double-sided laser measurement mode is generally adopted, only a plurality of linear scanning data are measured, and the measurement position is mainly a notch as a reference, as shown in fig. 2, a notch line passing through a notch point and a circle center is measured in fig. 2, and then the other 3 lines are measured after rotating for 45 degrees in sequence. Because the position of the wafer in the stick is random, after the notch is finished, the position of the notch line can not represent the cutting condition at all, and the condition of the wafer process can not be known. In addition, the existing measurement only records the measurement data of each line in the background database, and does not perform corresponding processing. The measurement mode can detect large-area flatness change, but the result of local nano-topography cannot be known, and the traditional measurement mode and data processing cannot lead process personnel to correspondingly trace back and control, so that the precision of the nano-topography is low.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, an object of the present invention is to provide a method for determining silicon wafer processing parameters, which can effectively improve the nanotopography of the wafer surface by tracing back the processing procedure and flatness data of the last batch of silicon rods, and adjusting the wafer processing parameters in real time or adjusting the parameters of the subsequent processing procedure of the wafer in time.
In one aspect of the invention, a method of determining wafer processing parameters is provided. According to an embodiment of the invention, the method comprises: acquiring flatness data of predetermined lines on a plurality of wafers in a wafer processing procedure, wherein the flatness data comprises at least one of thickness data and shape data; determining radial data of the preset line according to the flatness data of the preset line; and determining silicon wafer processing parameters according to the radial data of the preset lines of the wafers. According to the method, the parameters of the silicon rods of the next batch or the subsequent processing procedure of the wafer can be determined according to the processing data of the silicon rods of the previous batch, so that the flatness accuracy of the obtained wafer is higher, the processing yield is higher, and the cost can be reduced.
According to an embodiment of the invention, the plurality of wafers in the process step originate from the same silicon rod.
According to an embodiment of the present invention, the predetermined line satisfies at least one of the following conditions: the preset line comprises a datum line which passes through the cutting inlet and the cutting outlet and is parallel to the cutting direction; the preset line is a straight line which is obtained by rotating the datum line at a certain angle clockwise or anticlockwise by taking the circle center of the wafer as a midpoint; the number of the preset lines is at least 1; and the included angles between any two adjacent preset lines are equal.
According to an embodiment of the invention, the reference line is obtained by: positioning to obtain a bonding corner of the source silicon rod of the wafer; the bonding corner is an included angle between the datum line and a notch line before cutting; the notch line is a straight line passing through a notch point and a circle center on the wafer; when the flatness data of the wafer is measured, the position of the notch line is firstly positioned, and the bonding corner is input into a measuring machine, so that the wafer rotates according to the degree of the bonding corner to obtain the datum line.
According to an embodiment of the present invention, determining wafer processing parameters according to the radial data of predetermined lines of a plurality of the wafers comprises: collecting the radial data of the preset lines of the wafers in the same drawing to obtain a collected drawing; and determining parameters of the silicon processing procedure according to the summarized drawing.
According to an embodiment of the present invention, the summarized drawing is obtained by the following steps: drawing a radial flatness data curve of each preset line by taking the radial position coordinate of the preset line as an abscissa and the flatness data as an ordinate; and the radial flatness data curves of the preset lines of the wafers are juxtaposed and are integrated in the same drawing at intervals, and the vertical coordinate or the horizontal coordinate of the integrated drawing is the radial position coordinate of the preset lines.
According to an embodiment of the present invention, the processing process includes at least one of a cutting process, a thinning process, and a polishing process.
According to an embodiment of the present invention, the flatness data includes at least one of thickness, warp, and total thickness variation.
According to an embodiment of the invention, the cutting process parameter comprises at least one of a cutting speed and a cutting temperature.
According to an embodiment of the invention, the thinning process parameter comprises that the thinning process parameter comprises at least one of a horizontal and a vertical corresponding position of the grinding wheel.
According to an embodiment of the present invention, the polishing process parameter includes at least one of a polishing rate and a polishing time.
According to an embodiment of the present invention, the plurality of wafers are obtained by continuous dicing, the flatness parameter is warp, the dicing process parameter is dicing speed, and determining the parameter of the silicon processing process according to the summarized drawing includes: and if the warping degree shows that the edge position deflects towards the left direction corresponding to the middle position, determining that the cutting speed is slow firstly and then fast.
In another aspect of the invention, a method of processing a wafer is provided. According to an embodiment of the invention, the method comprises: obtaining the flatness parameter or a flatness collection graph of the cutting procedure of the previous batch by the method, and judging whether the flatness parameter exceeds a defined range or has deviation continuously towards the same direction; and adjusting parameters of the cutting process in real time or adjusting parameters of the thinning process in time.
According to an embodiment of the present invention, the method for processing the wafer includes: obtaining the flatness parameters or a flatness collection graph of the thinning process of the previous batch by the method, and judging whether the line with the largest value in the flatness parameters exceeds a defined range; and adjusting the thinning parameters in real time or adjusting the parameters of the polishing process in time.
Drawings
FIG. 1 is a flowchart illustrating a method for determining wafer processing parameters based on wafer flatness data according to one embodiment of the present invention.
FIG. 2 is a schematic view of a prior art metrology line.
FIG. 3 is a schematic view of a bonding corner of one embodiment of the present invention.
FIG. 4 is a schematic diagram of determining a predetermined line according to one embodiment of the invention.
FIG. 5 is a schematic representation of radial position coordinates of a predetermined line of an embodiment of the present invention.
FIG. 6 is a radial thickness data plot of a plurality of test lines on a wafer, in accordance with one embodiment of the present invention.
FIG. 7 is a graphical representation of a summary of radial data of thickness of predetermined lines for a plurality of wafers in accordance with one embodiment of the present invention.
Fig. 8 is a graph of radial warp data for a plurality of test lines on a wafer, in accordance with one embodiment of the present invention.
Fig. 9 is a summary plot of warp radial data for a predetermined line for a plurality of wafers, in accordance with one embodiment of the present invention.
Detailed Description
The following describes embodiments of the present invention in detail. The following examples are illustrative only and are not to be construed as limiting the invention. The examples, where specific techniques or conditions are not indicated, are to be construed according to the techniques or conditions described in the literature in the art or according to the product specifications. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products commercially available.
In one aspect of the invention, a method of determining wafer processing parameters is provided.
According to an embodiment of the present invention, referring to fig. 1, the method for determining wafer processing parameters includes the following steps:
s100: flatness data of predetermined lines on a plurality of wafers in a wafer processing procedure is acquired, and the flatness data comprises at least one of thickness data and shape data.
It can be understood that in the process of linear cutting of silicon rods, a plurality of wafers can be obtained after cutting of one silicon rod, the plurality of silicon rods can be cut in sequence in the cutting process, and the wafers obtained in the cutting process can be processed in sequence in the subsequent thinning process, polishing process and the like. In some embodiments, multiple wafers in the processing step originate from the same silicon rod, i.e., the multiple wafers are multiple wafers cut from one silicon rod. Therefore, the detection precision is improved, and the flatness precision of the obtained wafer is improved.
According to the embodiment of the invention, based on the cutting principle, the silicon rod linear cutting processes are all performed in the same cutting direction, so that the influence of the cutting parameters on the thickness or the shape of the wafer needs to be confirmed by referring to the change of the cutting direction. Therefore, in the embodiment of the present invention, the measurement data of the cutting line direction is intercepted and analyzed.
Specifically, the wafer surface during the processing process is still very rough, and generally a capacitive or double-sided laser measurement method is adopted, only linear scanning data are measured, as shown in fig. 4, the measurement method is an 8-line measurement method, and the predetermined line satisfies at least one of the following conditions: the predetermined line comprises a reference line (shown by a line with an arrow in the figure) which passes through the cutting inlet and the cutting outlet and is parallel to the cutting direction; the preset line is a straight line which is obtained by rotating the datum line at a certain angle clockwise or anticlockwise by taking the circle center of the wafer as a midpoint; the number of the predetermined lines is at least 1 (specifically, 1, 2, 3, 4, 5, 6, 7, or 8, etc.); and the included angles between any two adjacent preset lines are equal.
It should be noted that the "predetermined line satisfies one of the following conditions" means that the predetermined line may satisfy any one, any two, any three, or all four of the 4 conditions, and details are not repeated. Other similar descriptions in this document have the same meaning, and are not described in detail below.
Specifically, referring to fig. 3, the reference line is obtained by the following steps: positioning to obtain a bonding corner A of a source silicon rod of the wafer; the bonding corner is an included angle between the datum line 10 and the notch line 20 before cutting; the notch line is a straight line passing through a notch point 21 on the wafer and a circle center O; when the flatness data of the wafer are measured, the position of the notch line is firstly positioned, the bonding corner is input into a measuring machine, and the measuring machine enables the wafer to rotate according to the degree of the bonding corner, so that the datum line is obtained. Through the measurement to bonding corner, can be very fast find the cutting position to learn the influence of cutting process to the roughness more easily.
Specifically, as shown in fig. 3, the measurement is performed by using a line penetrating through the cutting edge and the cutting edge as a reference line, so that the subsequent processes can be better monitored. Through a great deal of experiments, the inventor finds that as shown in fig. 6 and 8, the line 1 is a reference line of the inlet edge and the outlet edge, compared with other 7 lines, the TTV and the warpage values of the line 1 are the largest, and the flatness data of the reference line are collected and analyzed, so that the process can be more effectively guided and improved.
It should be noted that the description of "source silicon rod of wafer" herein refers to that the wafer can be obtained after the source silicon rod is subjected to wire saw, i.e. the wafer is obtained after the source silicon rod is subjected to wire saw.
According to the embodiment of the invention, the stick sticking result of the stick sticking machine is intercepted and data analysis is carried out to obtain the sticking corner, then the sticking corner is automatically input through the communication function of the measuring machine station and is measured, and the datum line is automatically converted according to the sticking corner. The technical scheme of the invention can quickly obtain the measurement result, reduce the judgment of personnel and data processing, and avoid the problem of artificial judgment to cause adjustment errors.
According to the embodiment of the present invention, the specific kind of the flatness data may be selected according to actual inspection requirements, and in some specific embodiments, the flatness data includes at least one of Thickness (THK), Warp (Warp), and Total Thickness Variation (TTV).
S200: and determining the radial data of the preset line according to the flatness data of the preset line.
In this step, the original flatness data of the predetermined line output by the measurement machine is converted into radial data of the predetermined line. Specifically, the radial data of the predetermined line takes the distance between each point on the predetermined line and an intersection point of the predetermined line and the edge of the wafer as the position coordinate of the point. In some embodiments, the predetermined line is a straight line passing through a center of the wafer, the predetermined line intersects with an edge of the wafer, intersections exist between two ends of the predetermined line in the length direction and the edge of the wafer, the intersection of any one end of the predetermined line may be used as a point 0, and a distance between the point on the predetermined line and the intersection of the point 0 is used as a position coordinate of the point, which may specifically take a positive value or a negative value.
Specifically, referring to fig. 5, an intersection point of one end of the predetermined line and the edge of the wafer is taken as a point 0, and a distance between a point on the predetermined line and the point 0 is taken as a position coordinate of the point, specifically, if a distance between a point a on the predetermined line and the point 0 is 50mm, when the distance is represented in the form of radial data, the position coordinate of the point a is 50mm when the distance is a positive value, and the position coordinate of the point a is-50 mm when the distance is a negative value.
S300: and determining silicon wafer processing parameters according to the radial data of the preset lines of the wafers.
It can be understood that the change trend of the flatness of the wafers can be seen according to the radial data of the predetermined lines, and the change trend of the flatness of the wafers can effectively reflect the influence of the wafer processing parameters on the flatness of the wafers, so that the subsequent wafer processing parameters can be adjusted accordingly, and the flatness accuracy of the obtained wafers is higher.
In some embodiments, determining a wafer processing parameter according to the radial data of the predetermined lines of the plurality of wafers may include: collecting the radial data of the preset lines of the wafers in the same drawing to obtain a collected drawing; and determining parameters of the silicon processing procedure according to the summarized drawing. Therefore, the change trend of the flatness of the wafers can be visually seen through the collection of the drawing, so that the influence of the processing parameters on the flatness of the wafers can be more conveniently and quickly determined, the processing parameters of subsequent wafers can be effectively determined, and the wafers with higher flatness precision can be obtained.
It should be noted that "drawing" described herein refers to the main drawing and all auxiliary elements on the drawing, including the names, illustrations, scales, drawings, attached tables, text descriptions and other contents.
According to an embodiment of the present invention, the summarized drawing is obtained by the following steps: drawing a radial flatness data curve of each preset line by taking the radial position coordinate of the preset line as a vertical coordinate and the flatness data as a horizontal coordinate; and the radial flatness data curves of the preset lines of the wafers are juxtaposed and are integrated in the same drawing at intervals, and the abscissa or the ordinate of the integrated drawing is the radial position coordinate of the preset lines. Therefore, the flatness variation trend of the wafers can be visually seen through the collection drawing, so that the wafer processing parameters can be more accurately adjusted, and the quality and the yield of the obtained wafers are improved.
According to an embodiment of the present invention, a specific kind of the processing process is not particularly limited, and may specifically include at least one of a cutting process, a thinning process, and a polishing process. Further, the parameters of the processing procedure are not particularly limited, and may be any processing parameters that affect the flatness of the wafer, and in some embodiments, the parameters of the cutting procedure include at least one of a cutting speed and a cutting temperature; the thinning process parameter comprises at least one of the horizontal and vertical corresponding positions of the grinding wheel; the polishing process parameter includes at least one of a polishing rate and a polishing time. Therefore, the wafer with higher flatness precision is favorably obtained.
It can be understood that, according to the previous production experience, a person skilled in the art clearly knows the correlation between the flatness variation of the wafer and the processing parameters, and therefore, after knowing the flatness variation trend of a plurality of wafers, the processing parameters of the subsequent wafers can be effectively adjusted according to the actual production experience, so as to obtain the adjusted processing parameters capable of effectively improving the flatness accuracy of the wafer. It is understood that the known abnormal related data is excluded from this part, and the remaining data is combined and then debugged by the defined line cutting debugging method.
It should be noted that, in the method of the present invention, the flatness data of the wafer obtained in the previous processing step may be used to adjust parameters of the current processing step and the subsequent processing step, specifically, the processing sequence of the wafer is generally performed according to the sequence of cutting, thinning and polishing, the flatness data of the wafer obtained after cutting may be used to adjust parameters of the cutting step and parameters of the thinning step, and the flatness data of the wafer obtained after thinning may be used to adjust parameters of the thinning step and parameters of the polishing step. In some embodiments, the flatness data of the wafer obtained in each process is used to adjust the parameters of the current process, i.e., the flatness data of the cut wafer is used to adjust the parameters of the cutting process, the flatness data of the thinned wafer is used to adjust the parameters of the thinning process, and the flatness data of the polished wafer is used to adjust the parameters of the thinning process. Therefore, the yield of each process is effectively improved through real-time or timely adjustment, and the yield of the final product is improved.
According to an embodiment of the present invention, the plurality of wafers are obtained after continuous dicing, the flatness parameter is a total thickness deviation, the dicing process parameter is a dicing speed, and determining the parameters of the silicon processing process according to the summary drawing includes: and if the total thickness deviation shows that the edge is low and the middle is thick, determining that the cutting speed is slow firstly and then fast. Through real-time adjustment, the cutting quality stability is effectively improved, the flatness precision stability of subsequent wafers is higher, the stability and yield of the final quality of the product are improved, and the processing cost is relatively reduced.
The method of the present invention will be specifically described below by taking flatness data as Thickness (THK) and warp (warp), respectively, as examples.
In one specific example, the silicon rod is cut through a wire cutting process to obtain wafers, thickness data of a plurality of lines is measured on each wafer, the thickness data is converted into radial data, and a radial thickness data curve is drawn by taking a radial position coordinate as an abscissa and the thickness data as an ordinate. Specifically, taking the wafer shown in fig. 4 (fig. 4 shows radial thickness data curves corresponding to a plurality of test lines on one wafer) as an example, a bonding rotation angle of a silicon rod from the wafer may be obtained in a rod bonding process, the wafer is rotated by a measuring machine according to the degree of the bonding rotation angle to obtain a reference line, thickness data of the plurality of test lines including the reference line is measured and converted into radial data, and a radial thickness data curve corresponding to each test line is drawn by using a radial position coordinate as a horizontal coordinate and the thickness data as a vertical coordinate (as shown in fig. 6), where the radial thickness data curve corresponding to the reference line is a radial thickness data curve of a predetermined line of the wafer. According to the method, radial thickness data curves of the predetermined lines of the wafers are determined, then the radial thickness data curves of the predetermined lines of the wafers are integrated in the same drawing, the radial thickness data curves are distributed in parallel and at intervals in the abscissa direction or the ordinate direction, the ordinate or the abscissa is the radial position coordinate of the predetermined line, an integrated drawing (as shown in fig. 7, fig. 7 is an integrated drawing of the TTV of the line 1) is obtained, and the variation trend of the thicknesses of the wafers in the cutting direction can be visually seen from fig. 7, namely the thickness of the line 1 in the cutting direction shows that the value of the TTV of the tool entrance position is small, and then the variation trend gradually increases. Further, the subsequent wafer processing parameters can be adjusted by those skilled in the art according to the thickness variation trend and the correlation between the processing parameters.
In the same embodiment, the silicon rod is cut through a wire cutting process to obtain wafers, then the warpage data of a plurality of lines are measured on each wafer, then the warpage data are converted into radial data, and a radial data curve is drawn by taking a radial position coordinate as a horizontal coordinate and the warpage data as a vertical coordinate. Specifically, taking the wafer shown in fig. 4 (fig. 4 shows radial warpage data curves corresponding to a plurality of test lines on one wafer) as an example, a bonding corner of a silicon rod from the wafer can be obtained in a rod bonding process, the wafer is rotated by a measuring machine according to the degree of the bonding corner to obtain a reference line, warpage data of the plurality of test lines including the reference line is measured and converted into radial data, and a radial data curve (as shown in fig. 8) corresponding to each test line is drawn by using a radial position coordinate as a horizontal coordinate and the warpage data as a vertical coordinate, where the radial warpage data curve corresponding to the reference line is a radial warpage data curve of a predetermined line of the wafer. According to the method, the radial warping degree data curves of the preset lines of the wafers are determined, then the radial warping degree data curves of the preset lines of the wafers are integrated in the same drawing surface, the radial warping degree data curves are distributed in parallel and at intervals in the abscissa direction or the ordinate direction, the ordinate or the abscissa is the radial position coordinate of the preset lines, an integrated drawing surface (as shown in fig. 9, fig. 9 is an integrated drawing surface of the warping degree of a line 1) is obtained, the variation trend of the warping degree of the wafers can be visually seen from fig. 9, namely the variation condition of the warping degree of the line 1, namely the warping in the cutting direction is that the edge position deviates towards the left direction corresponding to the middle position.
The TTV and warp data and the summarized graphs shown in fig. 6 to 9 are combined, the cutting speed in the cutting process can be adjusted in real time, and is changed to be slow first and then fast, so that the warp data is more accurate (it should be noted that, in this document, the cutting speed in the cutting process is adjusted according to the summarized graph surface only as an example for explanation, but those skilled in the art can understand that the summarized graph surface can also be used for adjusting other process parameters, such as the cutting temperature in the cutting process, the horizontal and vertical corresponding position of the grinding wheel in the thinning process, or the polishing rate and polishing time in the polishing process, and the like, and thus, redundant description is not repeated here).
Table 1 summarizes the nanotopography data for wafers after the process adjustment and before the process adjustment, from the data and summary plots of fig. 6-9.
As can be seen from the table, the method for determining the processing parameters of the silicon wafer effectively improves the nanotopography of each procedure, particularly the nanotopography value of a final product, and improves the final yield of the product. It is worth mentioning that the measurement method before and after the improvement is inconsistent, the improved method can measure the worst position of the silicon wafer, the value of the nano-morphology of the same wafer is higher, but after the cutting procedure is improved by the method, the value of the improved nano-morphology is lower even if different testing methods are used, and the nano-morphology of each procedure is further improved effectively.
According to the method provided by the embodiment of the invention, the processing parameters of the subsequent wafers can be determined by reversely tracing the processing data of the previous silicon rod/wafer, so that the flatness accuracy of the obtained wafers is higher, the processing yield is higher, and the cost can be reduced.
In another aspect of the invention, a method of processing a wafer is provided. According to some embodiments of the invention, the method comprises: obtaining the flatness parameter or a flatness collection graph of the cutting procedure of the previous batch by the method, and judging whether the flatness parameter exceeds a defined range or has deviation continuously towards the same direction; and adjusting parameters of the cutting process in real time or adjusting parameters of the thinning process in time.
According to other embodiments of the present invention, the method for processing the wafer may include: obtaining the flatness parameters or a flatness collection graph of the thinning process of the previous batch by the method, and judging whether the line with the largest value in the flatness parameters exceeds a defined range; and adjusting the thinning parameters in real time or adjusting the parameters of the polishing process in time.
Therefore, the processing parameters are adjusted in real time in the processing process, the processing yield can be greatly improved, the cost is reduced, and meanwhile, the quality of the obtained wafer is good.
It should be noted that, although the required time for wire-cutting is long, although the flatness data based on the adjusted cutting parameters is the latest flatness data obtained by detection, the wafer corresponding to the flatness data and the wafer obtained by cutting with the adjusted cutting parameters may be two adjacent lots, or may be separated by several lots, that is, the cutting parameters of the wafers in the subsequent lot are adjusted according to the flatness test results of the wafers in the previous lot or the previous lots. The time required for thinning and polishing is short, and the polishing device can be adjusted in time according to the current state.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A method of determining wafer processing parameters, comprising:
acquiring flatness data of predetermined lines on a plurality of wafers in a wafer processing procedure, wherein the flatness data comprises at least one of thickness data and shape data;
determining radial data of the preset line according to the flatness data of the preset line;
and determining silicon wafer processing parameters according to the radial data of the preset lines of the wafers.
2. The method of claim 1, wherein the plurality of wafers in the process are derived from the same silicon rod.
3. The method of claim 1, wherein the predetermined line satisfies at least one of the following conditions:
the preset line comprises a datum line which passes through the cutting inlet and the cutting outlet and is parallel to the cutting direction;
the preset line is a straight line which is obtained by rotating the datum line at a certain angle clockwise or anticlockwise by taking the circle center of the wafer as a midpoint;
the number of the preset lines is at least 1;
and the included angles between any two adjacent preset lines are equal.
4. The method of claim 3, wherein the reference line is obtained by:
positioning to obtain a bonding corner of the source silicon rod of the wafer; the bonding corner is an included angle between the datum line and a notch line before cutting; the notch line is a straight line passing through a notch point and a circle center on the wafer;
when the flatness data of the wafer are measured, the position of the notch line is firstly positioned, the bonding corner is input into a measuring machine, and the measuring machine enables the wafer to rotate according to the degree of the bonding corner, so that the datum line is obtained.
5. The method of claim 1, wherein determining wafer processing parameters from the radial data for a plurality of predetermined lines of the wafer comprises:
collecting the radial data of the preset lines of the wafers in the same drawing to obtain a collected drawing;
and determining parameters of the silicon processing procedure according to the summarized drawing.
6. The method of claim 5, wherein the aggregated view is obtained by:
drawing a radial flatness data curve of each preset line by taking the radial position coordinate of the preset line as an abscissa and the flatness data as an ordinate;
and the radial flatness data curves of the preset lines of the wafers are juxtaposed and are integrated in the same drawing at intervals, and the abscissa or the ordinate of the integrated drawing is the radial position coordinate of the preset lines.
7. The method according to claims 1 to 6, wherein the processing step includes at least one of a cutting step, a thinning step, and a polishing step.
8. The method of claim 7, wherein the flatness data includes at least one of thickness, warp, and total thickness variation;
the cutting process parameters include at least one of cutting speed and cutting temperature;
the thinning process parameter comprises at least one of the horizontal and vertical corresponding positions of the grinding wheel;
the polishing process parameter includes at least one of a polishing rate and a polishing time.
9. The method of claim 7, wherein the plurality of wafers are obtained after successive dicing, the flatness parameter is warp, the dicing process parameter is dicing speed, and determining the parameters of the silicon process from the merged drawing surface comprises:
and if the warping degree value shows that the edge position deflects towards the left direction corresponding to the middle position, determining that the cutting speed is slow firstly and then fast.
10. A method for processing a wafer is characterized by comprising the following steps:
obtaining the flatness parameter or a flatness map of the cutting process of the previous batch by the method of any one of claims 1 to 9,
judging whether the flatness parameters exceed a defined range or continuously deviate towards the same direction;
adjusting parameters of the cutting process in real time or adjusting parameters of the thinning process in time;
alternatively, the first and second electrodes may be,
obtaining the flatness parameter or a flatness summary map of the thinning process of the previous batch by the method of any one of claims 1 to 9,
judging whether the line with the largest value in the flatness parameters exceeds a defined range or not;
and adjusting the parameters of the thinning procedure in real time or adjusting the parameters of the polishing procedure in time.
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