CN112068687A - System for server accords with restricted power supply to external power supply - Google Patents
System for server accords with restricted power supply to external power supply Download PDFInfo
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- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention provides a system for a server to supply power to the outside and conform to a limited power supply, which comprises a detection current module and a steady flow output module; the detection current module is used for comparing a first output current detected by the first current detection resistor with a preset current threshold value through a comparator, and when the first output current is larger than the preset current threshold value, the level output of a first overcurrent protection pin of the CPLD is used for starting the overcurrent protection chip; thus, the external output line is switched to the overcurrent protection chip and the corresponding power output part at the rear end. The current stabilization output module is used for providing constant current output by adopting the overcurrent protection chip, adopting a second current detection resistor to detect second output current in real time when the current is stably output, and controlling the disconnection of the overcurrent protection chip through a CPLD enabling signal when the second output current is smaller than a preset current threshold value. The invention can ensure that the limited power supply supplying power to the outside can supply power continuously by detecting the current and stabilizing the current output.
Description
Technical Field
The invention belongs to the technical field of server power supplies, and particularly relates to a system for conforming external power supply of a server to a limited power supply.
Background
The fire performance of the device is to some extent dependent on the power supply. The fire performance of the device is to some extent guaranteed if the output power and the output current of the power supply are limited, whether under normal operating conditions or under single fault conditions. GB4943.1-2011 part 1 of information technology device security: general requirements regulation of the general requirements under section 4.7.2.1: the fire protection enclosure is required for the components of the secondary circuit of the device that are powered by power supplies exceeding the 2.5 (limited power supplies) regulatory limits. The limited power source is an important reference factor in determining the fire rating of the equipment enclosure that is powered by it. When the information technology equipment is subjected to safety design, the requirement of the safety standard GB4943 needs to be met. In view of fire, ignition hazards and flame spread should be reduced by using appropriate materials and components and appropriate structures both inside and outside the device. For example, circuits that can limit component temperatures or limit power output are designed to reduce the risk of ignition. Flame retardant materials or sufficient space are used to reduce flame spread, and fire-proof protective enclosures are used if necessary. Components in a restricted power supply, components on a secondary circuit which is supplied by the restricted power supply but is not installed on a V-1 grade material, components on a secondary circuit which is supplied by an unrestricted power supply and the like in the GB4943 standard have fire risks and need a fireproof protective shell; and the connector in the secondary circuit powered by the limited power supply, the component mounted on the V-1 grade material and the like do not need a fireproof protective shell. However, for devices to which additional devices or accessories (such as scanners, mice, keyboards, etc.) can be connected, the data interface connecting these peripherals should be powered by a limited power supply according to standard GB4943, without being able to confirm in advance whether the housings of these peripherals comply with the fire protection requirements. The judgment indexes of the limited power supply mainly comprise idle output voltage Uoc, maximum output current Isc, maximum output volt-ampere S, output time and the like. The maximum output voltammetry theoretical value Smax can be converted by a formula Smax ═ Uoc × Isc. UOC: all load circuits are disconnected and the measured output voltage. Isc: with the maximum output current measured for any non-capacitive load (including short circuits). S (VA) the maximum output current measured by any non-capacitive load. If protection is by means of an electronic circuit or a positive temperature coefficient device, the quantities Isc and S are tested 5S after the load is applied. For the other cases, measurement was performed after 60 s.
In the prior art, GB4943.1-2011 "information technology equipment security part 1: the general requirements stipulate that the maximum output current measured by any non-capacitive load (including short circuits) on the interface should not exceed 8A when the limited power interface is disconnecting all load circuits and the measured output voltage is less than 30V. The current mainstream design of the limited power supply is to adopt a PTC fuse, and when the current flowing through the PTC fuse exceeds a limit value of 8A, the PTC fuse is fused.
The prior art only depends on the PTC fuse and can only play a role in limiting current. The requirements of the legislation stem from a generalized generalization of the actual application scenarios. When the external power supply interface of the server needs to meet the requirement of the LPS, the PTC fuse needs to act immediately to cut off the power supply output externally when the specified current exceeds the specified value 8A. Meanwhile, if an externally connected device is reading important data, it may cause an unrecoverable loss of data, which may have fatal consequences. For a server with reliability as an important assessment index, the server is not allowed. Meanwhile, the external interface cannot guarantee the warning of voltage fluctuation or the protection effect of voltage abnormity.
Disclosure of Invention
In order to solve the technical problem, the invention provides a system for conforming the external power supply of the server to the limited power supply, and the limited power supply for external power supply can be ensured to supply power continuously by detecting current and stabilizing current output. The serious consequence of data loss caused by power cut-off caused by large current is avoided.
In order to achieve the purpose, the invention adopts the following technical scheme: a system for a server to supply power to the outside and conform to a limited power supply comprises a detection current module and a current stabilization output module;
the detection current module is used for comparing a first output current detected by the first current detection resistor with a preset current threshold value through a comparator, and when the first output current is larger than the preset current threshold value, the level output of a first overcurrent protection pin of the CPLD is used for starting the overcurrent protection chip;
the current stabilization output module is used for providing constant current output by adopting the overcurrent protection chip, detecting second output current in real time by adopting a second current detection resistor when the current is stably output, and controlling the disconnection of the overcurrent protection chip by a CPLD enabling signal when the second output current is smaller than a preset current threshold value.
Further, the preset resistance threshold is 8A.
Furthermore, the power supply module supplies power to the detection current module and the current stabilization output module respectively.
Further, the circuit diagram of the current detection module is as follows: one path of an input end of a power supply module VCC _ IN is connected to a negative input end of a first comparator, the other path of the input end of the power supply module VCC _ IN is connected to a positive input end of the first comparator through a detection resistor R2, the detection resistor R2 is also connected to a drain electrode of a first N-type MOS tube, a source electrode of the first N-type MOS tube is a limited power supply output VCC _ OUT, and a grid electrode of the first N-type MOS tube is connected with a CPLD _ EN _ VCC pin; the output end of the first comparator is connected to the grid electrode of the first N-type MOS tube; the source electrode of the first N-type MOS tube is grounded; the drain electrode of the first N-type MOS tube is connected to a first overcurrent protection pin CPLD _ OCP 1; one path of a power supply input end of the first comparator is connected to VCC _5V through a resistor R1, and the other path of the power supply input end of the first comparator is connected to a drain electrode of the first N-type MOS tube through a resistor R3; the first comparator is also connected to ground.
Further, the circuit diagram of the current stabilization output module is as follows: the input end of a power supply module VCC _ IN is connected to an IN pin of the overcurrent protection chip; the enabling pin of the overcurrent protection chip is connected to the CPLD _ EN, and the GND pin is grounded; one path of an output pin of the overcurrent protection chip is connected to a negative electrode input end of the second comparator, and the other path of the output pin is connected to a positive electrode input end of the second comparator through a detection resistor R10; the detection resistor R10 is also connected to the limited power supply output VCC _ OUT; the output end of the second comparator is connected to the grid electrode of the second N-type MOS tube; the source electrode of the second N-type MOS tube is grounded; the drain of the second N-type MOS tube is connected to a second overcurrent protection pin CPLD _ OCP 2; one path of a power supply input end of the second comparator is connected to VCC _5V through a resistor R11, and the other path of the power supply input end of the second comparator is connected to a drain electrode of the second N-type MOS tube through a resistor R12; the second comparator is also connected to ground.
Further, the working process of the current detection module is as follows:
a CPLD _ EN _ VCC pin of the CPLD outputs a high level signal, and the first N-type MOS tube is conducted. When the detection resistor R2 detects that the current of the output circuit is smaller than 8A, the first comparator outputs a low level, and meanwhile, the first overcurrent protection pin CPLD _ OCP1 is at a high level;
when the detection resistor R2 detects that the current of the output circuit is larger than 8A, the first comparator outputs a high level, and meanwhile, the first overcurrent protection pin CPLD _ OCP1 is a low level, delay judgment is carried out, after the preset time is delayed, the CPLD detects the first overcurrent protection pin CPLD _ OCP1 is a low level again, the CPLD _ EN signal is output to a high level, and the overcurrent protection chip is started; the output of the CPLD _ EN _ VCC is low level, and the first N-type MOS tube is disconnected.
Further, the working process of the steady flow output module is as follows:
when the output current reaches 8A, the overcurrent protection chip provides constant current output, the detection resistor R10 detects the circuit current in real time, when the detection resistor R10 detects that the circuit current is less than 8A, the second N-type MOS tube is disconnected, and the second overcurrent protection pin CPLD _ OCP2 outputs high level;
when the CPLD detects that the second overcurrent protection pin CPLD _ OCP2 is at a high level, the time delay judgment is carried out, after the time delay is carried out for the preset time, the CPLD detects that the second overcurrent protection pin CPLD _ OCP2 is at a high level again, the CPLD _ EN signal is output at a low level, the overcurrent protection chip stops working, meanwhile, the CPLD _ EN _ VCC output is at a high level, and the first N-type MOS tube is conducted.
Further, the delay preset time is 5 ms.
The effect provided in the summary of the invention is only the effect of the embodiment, not all the effects of the invention, and one of the above technical solutions has the following advantages or beneficial effects:
the invention provides a system for a server to supply power to the outside and conform to a limited power supply, which comprises a detection current module and a steady flow output module; the detection current module is used for comparing a first output current detected by the first current detection resistor with a preset current threshold value through a comparator, and when the first output current is larger than the preset current threshold value, the level output of a first overcurrent protection pin of the CPLD is used for starting the overcurrent protection chip; thus, the external output line is switched to the overcurrent protection chip and the corresponding power output part at the rear end. The current stabilization output module is used for providing constant current output by adopting the overcurrent protection chip, adopting a second current detection resistor to detect second output current in real time when the current is stably output, and controlling the disconnection of the overcurrent protection chip through a CPLD enabling signal when the second output current is smaller than a preset current threshold value. Meanwhile, the CPLD _ EN _ VCC output is high level, the first N-type MOS tube is conducted, and the circuit is switched to a normal output part. The invention can ensure that the limited power supply supplying power to the outside can supply power continuously by detecting the current and stabilizing the current output. The serious consequence of data loss caused by power cut-off caused by large current is avoided. The maximum 8A current limiting requirement of a limited power supply which meets the requirement of the regulation GB4943 can be continuously provided. And two groups of parts for outputting current are switched to realize function realization under different current requirements.
Drawings
Fig. 1 is a circuit diagram of a system in which a server conforms to a limited power supply for external power supply according to embodiment 1 of the present invention;
fig. 2 is a flowchart of a system operation in which a server conforms to a limited power supply for external power supply according to embodiment 1 of the present invention.
Detailed Description
In order to clearly explain the technical features of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and procedures are omitted so as to not unnecessarily limit the invention.
Example 1
The embodiment 1 of the invention provides a system for conforming external power supply of a server to a limited power supply, which comprises a current detection module and a current stabilization output module, wherein the current detection module is used for detecting the current of the server; the detection current module is used for comparing a first output current detected by the first current detection resistor with a preset current threshold value through a comparator, and when the first output current is larger than the preset current threshold value, the level output of a first overcurrent protection pin of the CPLD is used for starting the overcurrent protection chip; thus, the external output line is switched to the overcurrent protection chip and the corresponding power output part at the rear end. The current stabilization output module is used for providing constant current output by adopting the overcurrent protection chip, adopting a second current detection resistor to detect second output current in real time when the current is stably output, and controlling the disconnection of the overcurrent protection chip through a CPLD enabling signal when the second output current is smaller than a preset current threshold value. Meanwhile, the CPLD _ EN _ VCC output is high level, the first N-type MOS tube is conducted, and the circuit is switched to a normal output part.
The function of the current detection module is realized by detecting the magnitude of the current in real time. When the current exceeds or reaches 8A, an over-current signal is fed back to the CPLD. The CPLD judges the over-current signal and continues to read the CPLD _ OCP signal after 5 ms. If the signal still shows overcurrent, the overcurrent protection chip is started.
The current stabilizing output module provides a current stabilizing part of continuous constant 8A current for the outside. This part can act as a constant current after the CPLD is enabled.
Fig. 1 is a circuit diagram of a system in which a server conforms to a limited power supply for external power supply according to embodiment 1 of the present invention; VCC _ IN is a power supply providing part for supplying power to the outside, and VCC _ OUT is an output part of an external power supply, i.e., an output part of a limited power supply. Under the condition that the circuit from the power supply part to the output part is normal, the power supply module respectively supplies power to the detection current module and the current stabilization output module.
The circuit diagram of the current detection module is as follows: one path of the input end of the power module VCC _ IN is connected to the negative input end of the first comparator, the other path is connected to the positive input end of the first comparator through a detection resistor R2, the detection resistor R2 is also connected to the drain electrode of the first N-type MOS tube, the source electrode of the first N-type MOS tube is a limited power output VCC _ OUT, and the grid electrode of the first N-type MOS tube is connected with a CPLD _ EN _ VCC pin; the output end of the first comparator is connected to the grid electrode of the first N-type MOS tube; the source electrode of the first N-type MOS tube is grounded; the drain electrode of the first N-type MOS tube is connected to a first overcurrent protection pin CPLD _ OCP 1; one path of a power supply input end of the first comparator is connected to VCC _5V through a resistor R1, and the other path of the power supply input end of the first comparator is connected to a drain electrode of the first N-type MOS tube through a resistor R3; the first comparator is also connected to ground.
The circuit diagram of the current stabilization output module is as follows: the input end of a power supply module VCC _ IN is connected to an IN pin of the overcurrent protection chip; an enabling pin of the overcurrent protection chip is connected to the CPLD _ EN and the GND pin is grounded; one path of an output pin of the overcurrent protection chip is connected to a negative input end of the second comparator, and the other path of the output pin is connected to a positive input end of the second comparator through a detection resistor R10; the detection resistor R10 is also connected to the limited power supply output VCC _ OUT; the output end of the second comparator is connected to the grid electrode of the second N-type MOS tube; the source electrode of the second N-type MOS tube is grounded; the drain of the second N-type MOS tube is connected to a second overcurrent protection pin CPLD _ OCP 2; one path of a power supply input end of the second comparator is connected to VCC _5V through a resistor R11, and the other path of the power supply input end of the second comparator is connected to a drain electrode of the second N-type MOS tube through a resistor R12; the second comparator is also connected to ground.
The working process of the current detection module is as follows: a CPLD _ EN _ VCC pin of the CPLD outputs a high level signal, and the first N-type MOS tube is conducted. When the detection resistor R2 detects that the current of the output circuit is smaller than 8A, the first comparator outputs a low level, and meanwhile, the first overcurrent protection pin CPLD _ OCP1 is at a high level; when the detection resistor R2 detects that the current of the output circuit is larger than 8A, the first comparator outputs a high level, and meanwhile, the first overcurrent protection pin CPLD _ OCP1 is a low level, delay judgment is carried out, after the preset time is delayed, the CPLD detects the first overcurrent protection pin CPLD _ OCP1 is a low level again, the CPLD _ EN signal is output to a high level, and the overcurrent protection chip is started; the output of the CPLD _ EN _ VCC is low level, and the first N-type MOS tube is disconnected. Thus, the external output circuit is switched to the overcurrent protection chip and the corresponding power output part at the rear end.
The working process of the steady flow output module is as follows: when the output current reaches 8A, the overcurrent protection chip provides constant current output, the detection resistor R10 detects the circuit current in real time, when the detection resistor R10 detects that the circuit current is less than 8A, the second N-type MOS tube is disconnected, and the second overcurrent protection pin CPLD _ OCP2 outputs high level; when the CPLD detects that the second overcurrent protection pin CPLD _ OCP2 is in a high level, time delay judgment is carried out, after the time delay is preset, the CPLD detects that the second overcurrent protection pin CPLD _ OCP2 is in a high level again, the CPLD _ EN signal is output to a low level, the overcurrent protection chip stops working, meanwhile, the CPLD _ EN _ VCC output is in a high level, the first N-type MOS tube is conducted, and the circuit is switched to a normal output part.
The delay time preset in the present invention is 5 ms. The time period for the protection of the present invention is not limited to the time period listed in example 1.
Fig. 2 is a flowchart of a system operation in which a server conforms to a limited power supply for external power supply according to embodiment 1 of the present invention.
In step S201, during the current detection, the CPLD determines whether the first overcurrent protection pin CPLD _ OCP1 is at a low level, if so, step S203 is executed, otherwise, step S202 is executed.
In step S202, the CPLD _ EN _ VCC continuously outputs a high level, and the first N-type MOS transistor is turned on.
In step S203, after a delay of 5ms, it is determined whether CPLD _ OCP1 is at low level, if so, step S204 is executed, otherwise, step S201 is returned to.
In step S204, the CPLD _ EN enable signal outputs a high level, the overcurrent protection chip starts to operate, the current output by the rear end is stabilized at 8A, the CPLD _ EN _ VCC outputs a low level, and the first N-type MOS transistor is turned off.
In step S205, it is determined whether the second overcurrent protection pin CPLD _ OCP2 is at a low level, and if so, the process returns to step S204, otherwise, step S206 is executed.
In step S206, after a delay of 5ms, it is determined whether CPLD _ OCP2 is at low level, and if so, the process returns to step S204, otherwise, step S207 is executed.
In step S207, the CPLD _ EN _ VCC outputs a high level, the first N-type MOS transistor is turned on, the CPLD _ EN outputs a low level, and the overcurrent protection chip temporarily operates.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, the scope of the present invention is not limited thereto. Various modifications and alterations will occur to those skilled in the art based on the foregoing description. And are neither required nor exhaustive of all embodiments. On the basis of the technical scheme of the invention, various modifications or changes which can be made by a person skilled in the art without creative efforts are still within the protection scope of the invention.
Claims (8)
1. A system for a server to supply power to the outside and conform to a limited power supply is characterized by comprising a current detection module and a current stabilization output module;
the detection current module is used for comparing a first output current detected by the first current detection resistor with a preset current threshold value through a comparator, and when the first output current is larger than the preset current threshold value, the level output of a first overcurrent protection pin of the CPLD is used for starting the overcurrent protection chip;
the current stabilization output module is used for providing constant current output by adopting the overcurrent protection chip, detecting second output current in real time by adopting a second current detection resistor when the current is stably output, and controlling the disconnection of the overcurrent protection chip by a CPLD enabling signal when the second output current is smaller than a preset current threshold value.
2. The system according to claim 1, wherein the preset threshold value of the resistance is 8A.
3. The system according to claim 1, wherein the power module supplies power to the detection current module and the regulated current output module respectively.
4. The system according to claim 3, wherein the circuit diagram of the current detection module is: one path of an input end of a power supply module VCC _ IN is connected to a negative input end of a first comparator, the other path of the input end of the power supply module VCC _ IN is connected to a positive input end of the first comparator through a detection resistor R2, the detection resistor R2 is also connected to a drain electrode of a first N-type MOS tube, a source electrode of the first N-type MOS tube is a limited power supply output VCC _ OUT, and a grid electrode of the first N-type MOS tube is connected with a CPLD _ EN _ VCC pin; the output end of the first comparator is connected to the grid electrode of the first N-type MOS tube; the source electrode of the first N-type MOS tube is grounded; the drain electrode of the first N-type MOS tube is connected to a first overcurrent protection pin CPLD _ OCP 1; one path of a power supply input end of the first comparator is connected to VCC _5V through a resistor R1, and the other path of the power supply input end of the first comparator is connected to a drain electrode of the first N-type MOS tube through a resistor R3; the first comparator is also connected to ground.
5. The system according to claim 3, wherein the current-stabilizing output module has a circuit diagram of: the input end of a power supply module VCC _ IN is connected to an IN pin of the overcurrent protection chip; the enabling pin of the overcurrent protection chip is connected to the CPLD _ EN, and the GND pin is grounded; one path of an output pin of the overcurrent protection chip is connected to a negative electrode input end of the second comparator, and the other path of the output pin is connected to a positive electrode input end of the second comparator through a detection resistor R10; the detection resistor R10 is also connected to the limited power supply output VCC _ OUT; the output end of the second comparator is connected to the grid electrode of the second N-type MOS tube; the source electrode of the second N-type MOS tube is grounded; the drain of the second N-type MOS tube is connected to a second overcurrent protection pin CPLD _ OCP 2; one path of a power supply input end of the second comparator is connected to VCC _5V through a resistor R11, and the other path of the power supply input end of the second comparator is connected to a drain electrode of the second N-type MOS tube through a resistor R12; the second comparator is also connected to ground.
6. The system according to claim 4, wherein the detecting current module operates in the following steps:
a CPLD _ EN _ VCC pin of the CPLD outputs a high level signal, and the first N-type MOS tube is conducted. When the detection resistor R2 detects that the current of the output circuit is smaller than 8A, the first comparator outputs a low level, and meanwhile, the first overcurrent protection pin CPLD _ OCP1 is at a high level;
when the detection resistor R2 detects that the current of the output circuit is larger than 8A, the first comparator outputs a high level, and meanwhile, the first overcurrent protection pin CPLD _ OCP1 is a low level, delay judgment is carried out, after the preset time is delayed, the CPLD detects the first overcurrent protection pin CPLD _ OCP1 is a low level again, the CPLD _ EN signal is output to a high level, and the overcurrent protection chip is started; the output of the CPLD _ EN _ VCC is low level, and the first N-type MOS tube is disconnected.
7. The system according to claim 5, wherein the steady current output module operates in the following process:
when the output current reaches 8A, the overcurrent protection chip provides constant current output, the detection resistor R10 detects the circuit current in real time, when the detection resistor R10 detects that the circuit current is less than 8A, the second N-type MOS tube is disconnected, and the second overcurrent protection pin CPLD _ OCP2 outputs high level;
when the CPLD detects that the second overcurrent protection pin CPLD _ OCP2 is at a high level, the time delay judgment is carried out, after the time delay is carried out for the preset time, the CPLD detects that the second overcurrent protection pin CPLD _ OCP2 is at a high level again, the CPLD _ EN signal is output at a low level, the overcurrent protection chip stops working, meanwhile, the CPLD _ EN _ VCC output is at a high level, and the first N-type MOS tube is conducted.
8. The system according to claim 6 or 7, wherein the preset delay time is 5 ms.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112631410A (en) * | 2020-12-18 | 2021-04-09 | 苏州浪潮智能科技有限公司 | Bridge connection power supply circuit and server of multichannel Efuse chip |
| WO2023045201A1 (en) * | 2021-09-23 | 2023-03-30 | 苏州浪潮智能科技有限公司 | Over current protection method and apparatus, and power supply circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112631410A (en) * | 2020-12-18 | 2021-04-09 | 苏州浪潮智能科技有限公司 | Bridge connection power supply circuit and server of multichannel Efuse chip |
| WO2023045201A1 (en) * | 2021-09-23 | 2023-03-30 | 苏州浪潮智能科技有限公司 | Over current protection method and apparatus, and power supply circuit |
| US11979018B2 (en) | 2021-09-23 | 2024-05-07 | Inspur Suzhou Intelligent Technology Co., Ltd. | Method for over current protection device, and power supply circuit |
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| Publication number | Publication date |
|---|---|
| CN112068687B (en) | 2022-07-08 |
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