CN112014707A - A method for measuring and controlling junction temperature of SiC power VDMOS devices in power cycling experiments - Google Patents

Abstract

The invention discloses a method for measuring and controlling the junction temperature of a SiC power VDMOS device in a power cycle experiment. The method mainly accelerates the aging process of the device by applying intermittent power on a power cycle experiment platform, so as to simulate the SiC power VDMOS device. actual operating conditions. The chip temperature fluctuation during power application is calculated and extracted by collecting the conduction voltage drop corresponding to the drain-source current of the device operating in the unsaturated region, and the feedback circuit controls the device junction temperature within a limited range; The parasitic body diode conduction voltage drop corresponding to the constant small source-drain current is used to calculate and extract the chip temperature fluctuation during power off, and the feedback circuit controls the device junction temperature within a limited range. The method is simple and easy to implement, has low experimental cost, and will not damage the packaging of the SiC power VDMOS device. It can realize full program control through a computer, and can accurately measure and control the junction temperature of the SiC power VDMOS device.

Description

A method for measuring and controlling the junction temperature of SiC power VDMOS devices in a power cycling experiment method

technical field

The invention relates to the measurement and control of the junction temperature of a semiconductor device in a power cycle experiment of a SiC power VDMOS device, and belongs to the field of power semiconductor device testing.

Background technique

SiC (Silicon Carbide, silicon carbide) materials have large forbidden band width, high breakdown electric field, high saturation drift speed and thermal conductivity. The superior properties of these materials make them ideal for making high-power, high-frequency, high-temperature and radiation-resistant devices. Material. Compared with traditional Si devices, SiC power electronic devices have great advantages in blocking performance, switching speed, high temperature characteristics, etc., especially SiC power VDMOS (Vertical Double-Diffused Metal Oxide Semiconductor Field Effect Transistor, vertical double-diffused metal-oxide). Semiconductor field effect transistor) devices have received extensive attention in recent years due to their high switching speed and high blocking voltage, and have been gradually put into various fields such as spacecraft and electric vehicles.

With its wide use gradually, its reliability has also become the focus of attention. In order to ensure the reliability of the device in use, the device needs to be sampled and tested for reliability before it is put into use to evaluate its life and reliability. . Power cycle test/intermittent life use is one of the three reliability assessment tests specified in the international standard "IEC-60747-9-2007-Semiconductor Devices-Discrete Devices-Part 8-Field-Effect Transistors", and it is also one of the three reliability assessment tests specified in the device factory. One of the tests that must be done before. According to the Arrhennis model, the device life is roughly reduced by half for every 10°C increase in device temperature, so temperature control is particularly important in this test.

At present, the existing methods for testing the junction temperature usually calculate the junction temperature by calculating the thermal resistance or measuring the junction voltage corresponding to a small current in an off state. This junction temperature measurement method is to measure the junction temperature of the device under static conditions, and the transient junction temperature of the device needs to be measured during the power cycle, so this method is not suitable for power cycle experiments; and the thermal resistance of the device is a variable, with the work Temperature, applied power, etc. change; therefore, the temperature results obtained by thermal resistance calculation often have errors with the actual junction temperature. The method of measuring the junction temperature by using a small current corresponding to the junction voltage in the off state cannot measure the junction temperature of the on-state device, and cannot avoid the device burning due to excessive on-state temperature.

Since the SiC material is different from the Si material, the gate oxide layer of the SiC power VDMOS device is defective, and the temperature measurement method of the Si power VDMOS cannot be directly used. Therefore, it is urgent to find an effective SiC power VDMOS device in the power cycle experiment. The method can measure and control the junction temperature online in real time when it is off, and the invention has practical significance for studying the reliability of SiC power VDMOS devices.

SUMMARY OF THE INVENTION

In view of the deficiencies of the prior art, the present invention proposes a method for measuring and controlling the junction temperature of a SiC power VDMOS device in a power cycle experiment.

The technical method of the present invention is as follows:

In order to simulate the two different working conditions of turn-on and turn-off of the SiC power _VDMOS device in actual work, a power cycle experiment platform is designed in the present invention. The relationship between the internal body diode conduction voltage V _F and the junction temperature when it is turned off is used to measure and control the junction temperature of the device. Among them, when measuring the internal body diode conduction voltage V _F of the device in the off state, the gate oxide layer of the device is defective due to the SiC material of the SiC power VDMOS device. Influence In order to achieve the above object, the present invention provides a method for measuring and controlling the junction temperature of a SiC power VDMOS device in a power cycle experiment, comprising the following steps:

Obtain the unsaturated drain-source voltage drop _VDS during turn-on and the turn-on voltage _VF of the internal body diode during turn-off corresponding to the drain-source current in the power cycle process of the SiC power VDMOS device to be tested; the drain-source current is the maximum heating value. current or constant small current;

Based on the fitting surface of the on-state voltage drop V _DS corresponding to the junction temperature and the drain-source unsaturated region drain-source current, obtain the current junction temperature corresponding to the saturated on-state voltage drop when the device is on-state and power is heated up;

Based on the fitting curve of the junction temperature and the on-voltage V _F of the internal body diode, obtain the current junction temperature corresponding to the on-voltage of the body diode when the device is turned off without power cooling;

When the current junction temperature is lower than the set minimum junction temperature, the power cycle platform applies power to the device under test to heat up; when the current junction temperature is greater than the set maximum temperature, the power cycle platform removes power to cool down; Power cycling experiments.

On the other hand, the present invention also provides a SiC power VDMOS device power cycle experiment platform, including:

Power module: used to provide constant drain-source high current that the device works in the non-saturated region;

Gate voltage module: used to provide gate voltage to the device to control the turn-on and turn-off of the device;

Small current module: used to provide a small test current for the internal diode during shutdown;

Acquisition module: used to collect the drain-source voltage V _DS when the device is turned on and the diode junction voltage V _F when it is turned off, and upload to the computer;

Calculation control module: used for data processing, junction temperature measurement and control, and to issue commands for device turn-on and turn-off.

The experimental device for realizing the method includes: SiC power VDMOS device and supporting fixtures; the power cycle experimental platform includes a data acquisition card, an FPGA control board, a number of relays, capacitors and _resistors ; a computer; a power device that provides pulse current IP Analyzer; digital source meter that provides constant small current _IF ; power supply that provides drain-source current I _DS ; linear power supply that provides stable gate voltage V _GS ; 0℃～150℃ adjustable thermostat.

The specific test method includes the following steps:

Step 1: Place the SiC power VDMOS device in the thermostat, adjust the initial temperature of the thermostat to a steady state, wait for the thermostat to rise to the set temperature and hold it for 10 minutes. At this time, the junction temperature of the SiC power VDMOS device is considered to be the same as the temperature inside the thermostat. the same temperature;

Step 2: Connect the SiC power VDMOS device to the linear power supply and the power device analyzer through the fixture, apply the gate-source voltage V _GS through the linear power supply to make the SiC power VDMOS device in a conducting state, and apply a short pulse drain-source current through the power device analyzer IP measures the short-pulse drain-source voltage _VP when the SiC power _VDMOS device is turned on;

Step 3: Apply a negative gate-source voltage V _GS greater than or equal to 6V to keep the SiC power VDMOS device in an off state and shield the influence of gate oxide defects. The internal body diode of the SiC power VDMOS device applies the on-current _IF and measures the on-voltage V _F of the body diode;

Step 4: Keep V _GS , IP , _IF unchanged, change the temperature of the thermostat and stabilize, repeat steps 2 and 3 to measure the _VP and V _F of the SiC power _VDMOS device at different temperatures, according to _VP and temperature, V The relationship between _F and temperature, the relationship between the drain-source voltage V _DS in the non-saturation region and the junction temperature, the body diode turn-on voltage V _F and the junction temperature is fitted by the algorithm, and they are used as the turn-on and turn-off of the SiC power VDMOS device respectively. temperature calibration curve library;

Step 5: Connect the SiC power VDMOS device to the power cycle experimental platform through a fixture. The initial state of the SiC power VDMOS device is turned off, and the junction temperature range for the normal operation of the SiC power VDMOS device is set by the computer; The VDMOS device provides a gate-source voltage V _GS , which makes the SiC power VDMOS device in a conducting state;

Step 6: Connect the SiC power VDMOS device to the power supply, apply a constant drain-source current I _DS to the device through the power supply, collect the drain-source current V _DS of the device through the power cycle experimental platform, and upload it to the computer. The junction temperature is calculated from the temperature calibration curve library when the SiC power VDMOS device is turned on. When the junction temperature is higher than the set maximum value, the computer issues a shutdown command and applies the negative gate voltage V _GS to make the SiC power VDMOS device in the off state. ;

Step 7: Connect the SiC power VDMOS device to the digital source meter, apply a constant on-current _IF (the on-current _IF is small) to the internal body diode of the SiC power VDMOS device through the digital source meter, and collect the data through the power cycle experimental platform The turn-on voltage V _F of the device is uploaded to the computer, and the junction temperature is calculated according to the temperature calibration curve library obtained in step 4 when the SiC power VDMOS device is turned off. When the junction temperature is lower than the set minimum value, the computer issues a turn-on command, Turn on the gate voltage V _GS to make the SiC power VDMOS device in a conducting state;

Step 8: From steps 6 and 7, the relationship between the power applied to the device and the junction temperature of the SiC power VDMOS device can be obtained; the number of cycles is set by the computer, that is, repeating steps 6 and 7 can be performed on the SiC power VDMOS device multiple times. Power cycling experiments to realize real-time measurement and control of junction temperature of SiC power VDMOS devices.

Description of drawings

Figure 1: The basic schematic diagram of the power cycle experiment;

Figure 2: The control relationship between the modules of the power cycle experiment;

Figure 3: Schematic diagram of stepped pulse current;

Figure 4: Schematic diagram of the temperature calibration curve library when the device DUT is turned on;

Figure 5: Schematic diagram of the temperature calibration curve library when the device DUT is turned off;

Figure 6: The relationship between applied power and temperature in a single power cycle experiment;

Figure 7: The relationship between applied power and temperature in multiple power cycling experiments;

Figure 8 is a flow chart of the implementation of the present invention.

Detailed ways

The present invention will be described in more detail below with reference to the accompanying drawings and specific embodiments. The power cycle experiment is mainly divided into two parts: 1. Use the thermostat and power analyzer to make the temperature calibration curve of the device; 2. Carry out the power cycle experiment, the basic principle of the power cycle experiment platform is shown in Figure 1, including the power cycle experiment The experimental power module is composed of power supply and fixture, the small current module of the experiment is composed of digital source meter and fixture, the grid voltage module of the experiment is composed of linear power supply and fixture, and the acquisition module is composed of FPGA and data acquisition card. Others outside the digital source meter are embedded on the power cycle experimental platform, and the control relationship between each module is shown in Figure 2.

The concrete testing method of the present invention comprises the following steps:

Step 1: Connect the SiC power VDMOS device DUT with model C2M0080120D to the power analyzer and the SourceMeter and place it in the thermostat, adjust the initial temperature to 20°C, wait for the thermostat to rise to the set temperature and keep it for 10 minutes. It can be considered that the device junction temperature is the same as the temperature inside the thermostat.

Step 2: Apply a gate-source voltage V _GS =15V through a linear power supply to make the device in a conducting state, and apply a short pulse drain-source current I _P = 15A with 100 steps through a power device analyzer (pulse width 100us, duty cycle 1 %, its staircase waveform is roughly as shown in Figure 3), and measure the short-pulse drain-source voltage _VP when the device is turned on.

Step 3: Apply the turn-off gate-source voltage V _GS =-6V, make the device DUT in the off state, connect the device to the digital source meter through the fixture, and apply the on-current _IF =1mA to the internal body diode of the device through the digital source meter, Measure the body diode conduction voltage V _F .

Step 4: Keep on gate-source voltage V _GS =15V, turn off gate-source voltage V _GS =-6V, step short pulse drain-source current I _P =15A (pulse width 100us, duty cycle 1%), _IF =1mA Keep the same, make a measurement every time the temperature box is raised by 5°C. According to Steps 2 and 3, measure the VP and _VF of the SiC power VDMOS device at 20°C to 150° _{C. According to the VP and temperature and V F and temperature} The relationship between the unsaturated region drain-source voltage V _DS and junction temperature, body diode turn-on voltage V _F and junction temperature is fitted by algorithm, and used as the temperature calibration curve when the device DUT is turned on and off respectively. library, as shown in Figure 4 and Figure 5, respectively.

Step 5: Insert the device DUT at room temperature into the test bench of the power cycle experimental platform, the initial state of the device is off, and the junction temperature range for normal operation of the device is set by the computer to be 50 ℃ ~ 150 ℃

Step 6: At this time, the temperature of the device is lower than 50 °C, so S1 and S3 are closed, S2 and S4 are disconnected, and the gate-source voltage V _GS = 15V is provided to the device through the gate voltage module, so that the device is in an on state, and the power module applies The constant drain-source current I _DS =15A, and the on-drain-source voltage V _DS is monitored in real time by the acquisition module and uploaded to the calculation control module.

Step 7: According to the V _DS uploaded to the computer, calculate the junction temperature through the temperature calibration curve library obtained in step 4 when the device is turned on. If the calculated junction temperature is lower than 150°C, maintain the state in step 6. When the junction temperature is high At 150°C, the computer issues an instruction to open S1 and S3, and close S2 and S4. At this time, the gate-source voltage V _GS =-6V is applied to make the device in the off state, and the internal body diode of the device is provided by the small current module at the same time. A constant on-current _IF =1 mA is applied, and the diode on-voltage V _F is monitored in real time by the acquisition module and uploaded to the calculation control module.

Step 8: According to the V _F uploaded to the computer, calculate the junction temperature through the temperature calibration curve library obtained in step 4 when the device is turned off. If the calculated junction temperature is higher than 50°C, maintain the state in step 7. When the junction temperature is low When the temperature is 50°C, the computer gives an instruction and repeats step 6

Step 8: The power cycle can be achieved by repeating Step 6, Step 7 and Step 8 continuously. From Step 6, Step 7 and Step 8, the relationship between the power applied to the device DUT power cycle in one cycle and the junction temperature of the device can be obtained, As shown in Figure 6. The number of cycles is set to 3 by the computer, that is, repeating steps 6, 7 and 8 to perform 3 power cycle experiments on the device, and the relationship between the power applied to the device DUT and the junction temperature change of the device after 3 power cycles can be obtained, As shown in Figure 7, in order to realize the real-time measurement and control of the junction temperature of the SiC power VDMOS device.

The beneficial effects of the invention are: the method is simple and easy to implement, the experiment cost is low, and the packaging of the SiC power VDMOS device will not be damaged, the computer can realize complete program control, and the junction temperature of the device during the power cycle experiment can be set by itself It can accurately measure and control the junction temperature of SiC power VDMOS devices by conducting long-term, multi-cycle power cycling experiments.

Claims (4)

1. a method for measuring and controlling SiC power VDMOS device junction temperature in a power cycle experiment, is characterized in that, comprises the following steps: Obtain the unsaturated drain-source voltage drop _VDS during turn-on and the turn-on voltage _VF of the internal body diode during turn-off corresponding to the drain-source current in the power cycle process of the SiC power VDMOS device to be tested; the drain-source current is the maximum heating value. current or constant small current; Based on the fitting surface of the on-state voltage drop V _DS corresponding to the junction temperature and the drain-source unsaturated region drain-source current, obtain the current junction temperature corresponding to the saturated on-state voltage drop when the device is on-state and power is heated up; Based on the fitting curve of the junction temperature and the on-voltage V _F of the internal body diode, obtain the current junction temperature corresponding to the on-voltage of the body diode when the device is turned off without power cooling; When the current junction temperature is lower than the set minimum junction temperature, the power cycle platform applies power to the device under test to heat up; when the current junction temperature is greater than the set maximum temperature, the power cycle platform removes power to cool down; Power cycling experiments. 2. the method for measuring and controlling the junction temperature of SiC power VDMOS device in a kind of power cycle experiment according to claim 1, the experimental device that realizes the method comprises: SiC power VDMOS device, supporting fixture; The power cycle experiment platform comprises data acquisition 1 card, 1 FPGA control board, several relays, capacitors and resistors; computer; power device analyzer providing pulse current _IP ; digital source meter providing constant small current _IF ; power supply providing drain-source current I _DS ; Provide linear power supply with stable gate voltage V _GS ; 0 ℃ ~ 150 ℃ adjustable temperature box. 3. the method for measuring and controlling SiC power VDMOS device junction temperature in a kind of power cycle experiment according to claim 1, is characterized in that, based on non-saturated drain-source conduction voltage drop V _DS and the conduction voltage of internal body diode The steps to obtain the current junction temperature for V _F include steps before: Place the device in a thermostat, adjust the temperature to a steady state, and keep it for a period of time. At this time, the junction temperature of the device is considered to be the same as the temperature inside the thermostat, and then the gate-source voltage V _GS is applied to the device to make it in a conducting state, which is To avoid the self-heating caused by the device working for a long time, the short-pulse drain-source current IP is applied through the power device analyzer, and the short-pulse drain-source voltage _VP when the device is turned on is _measured ; then the internal body of the device in the off state is measured. The diode turn-on voltage V _F , because the SiC material of the SiC power VDMOS device leads to defects in the gate oxide layer of the device, in order to avoid the influence of defects on the test, a negative gate voltage needs to be applied to shield the influence of the trap, so a negative gate voltage greater than or equal to 6V needs to be applied , keep the device in the off state and shield the influence of gate oxide defects, apply a small constant on-current _IF , measure the internal body diode conduction voltage V _F of the device; then adjust the temperature box to change the temperature to stability, keep the gate-source The voltage V _GS , the pulse current IP , and the on-current _IF remain unchanged. The pulse voltage _VP when the device is turned on and the on-voltage V _F of the internal body diode are measured at different _temperatures ; The relationship between the drain-source voltage _VDS in the non-saturation region and the junction temperature, and the relationship between the body diode turn-on voltage _VF and the junction temperature are used as the temperature calibration curve library when the SiC power VDMOS device is turned on and off, respectively. 4. the method for measuring and controlling SiC power VDMOS device junction temperature in a kind of power cycle experiment according to claim 1, is characterized in that, concrete testing method comprises the following steps: Step 1: Place the SiC power VDMOS device in the thermostat, adjust the initial temperature of the thermostat to a steady state, wait for the thermostat to rise to the set temperature and hold it for 10 minutes. At this time, the junction temperature of the SiC power VDMOS device is considered to be the same as the temperature inside the thermostat. the same temperature; Step 2: Connect the SiC power VDMOS device to the linear power supply and the power device analyzer through the fixture, apply the gate-source voltage V _GS through the linear power supply to make the SiC power VDMOS device in a conducting state, and apply a short pulse drain-source current through the power device analyzer IP measures the short-pulse drain-source voltage _VP when the SiC power _VDMOS device is turned on; Step 3: Apply a negative gate-source voltage V _GS greater than or equal to 6V to keep the SiC power VDMOS device in an off state and shield the influence of gate oxide defects. The internal body diode of the SiC power VDMOS device applies the on-current _IF and measures the on-voltage V _F of the body diode; Step 4: Keep V _GS , IP , _IF unchanged, change the temperature of the thermostat and stabilize, repeat steps 2 and 3 to measure the _VP and V _F of the SiC power _VDMOS device at different temperatures, according to _VP and temperature, V The relationship between _F and temperature, the relationship between the drain-source voltage V _DS in the non-saturation region and the junction temperature, the body diode turn-on voltage V _F and the junction temperature is fitted by the algorithm, and they are used as the turn-on and turn-off of the SiC power VDMOS device respectively. temperature calibration curve library; Step 5: Connect the SiC power VDMOS device to the power cycle experimental platform through a fixture. The initial state of the SiC power VDMOS device is turned off, and the junction temperature range for the normal operation of the SiC power VDMOS device is set by the computer; The VDMOS device provides a gate-source voltage V _GS , which makes the SiC power VDMOS device in a conducting state; Step 6: Connect the SiC power VDMOS device to the power supply, apply a constant drain-source current I _DS to the device through the power supply, collect the drain-source current V _DS of the device through the power cycle experimental platform, and upload it to the computer. The junction temperature is calculated from the temperature calibration curve library when the SiC power VDMOS device is turned on. When the junction temperature is higher than the set maximum value, the computer issues a shutdown command and applies the negative gate voltage V _GS to make the SiC power VDMOS device in the off state. ; Step 7: Connect the SiC power VDMOS device to the digital source meter, apply a constant on-current _IF (the on-current _IF is small) to the internal body diode of the SiC power VDMOS device through the digital source meter, and collect the data through the power cycle experimental platform The turn-on voltage V _F of the device is uploaded to the computer, and the junction temperature is calculated according to the temperature calibration curve library obtained in step 4 when the SiC power VDMOS device is turned off. When the junction temperature is lower than the set minimum value, the computer issues a turn-on command, Turn on the gate voltage V _GS to make the SiC power VDMOS device in a conducting state; Step 8: From Steps 6 and 7, the relationship between the power applied to the device and the junction temperature of the SiC power VDMOS device can be obtained; the number of cycles is set by the computer, that is, repeating Steps 6 and 7 to the SiC power VDMOS device for multiple power cycles Cyclic experiments to achieve real-time measurement and control of the junction temperature of SiC power VDMOS devices.

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