CN112003363A - Embedded power system management circuit - Google Patents
Embedded power system management circuit Download PDFInfo
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- CN112003363A CN112003363A CN202010766966.1A CN202010766966A CN112003363A CN 112003363 A CN112003363 A CN 112003363A CN 202010766966 A CN202010766966 A CN 202010766966A CN 112003363 A CN112003363 A CN 112003363A
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- 238000001514 detection method Methods 0.000 claims abstract description 25
- 238000007493 shaping process Methods 0.000 claims abstract description 10
- 230000005669 field effect Effects 0.000 claims description 60
- 239000003990 capacitor Substances 0.000 claims description 19
- 238000007599 discharging Methods 0.000 claims description 3
- 230000000087 stabilizing effect Effects 0.000 claims description 2
- 230000001131 transforming effect Effects 0.000 claims description 2
- 230000003111 delayed effect Effects 0.000 abstract description 4
- 230000009977 dual effect Effects 0.000 abstract description 3
- 238000005516 engineering process Methods 0.000 abstract description 3
- 238000007726 management method Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J9/00—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
- H02J9/04—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source
- H02J9/06—Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which the distribution system is disconnected from the normal source and connected to a standby source with automatic change-over, e.g. UPS systems
- H02J9/068—Electronic means for switching from one power supply to another power supply, e.g. to avoid parallel connection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/30—Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S20/00—Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
- Y04S20/20—End-user application control systems
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- Business, Economics & Management (AREA)
- Emergency Management (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Direct Current Feeding And Distribution (AREA)
Abstract
An embedded power system management circuit belongs to the system power management circuit technology. The power failure detection unit circuit is used for detecting whether a main power supply is in power failure or not, and the dual-power switching unit circuit is used for switching between the main power supply and a standby power supply; the delay turn-off control unit circuit is used for starting delay when the main power supply is powered off, and giving a turn-off signal to the dual power supply switching unit circuit after a period of time delay to turn off the power supply of the whole system; the voltage detection unit circuit is used for providing variable signals for the whole circuit to realize functions; the discharge unit circuit is used for quickly releasing residual charges in the circuit after the circuit is powered off; the upper wave shaping unit circuit is used for enabling the voltage of the load to start supplying power to start from nearly 3V, and the unstable part of the middle voltage is removed. The invention has the advantages that: seamless switching of the main power supply to the backup power supply; the standby power supply is turned off in a delayed manner; when the main power supply is in power-off detection, the control system is informed to store data; and the system is quickly adjusted in power failure and is adjusted in power-on state, so that the stability of the system is improved.
Description
Technical Field
The invention belongs to the technology of a system power supply management circuit.
Background
With the rapid development of electronic technology, more and more chips can run a system on chip. With the attendant increasing demands on the power supply. In the practical test of a product, after the power supply is powered off, the electric energy remained in the capacitor cannot be released quickly, so that the power supply voltage is reduced slowly, and if the power supply is powered on at the moment, the start-up fault of an embedded system and the like is likely to be caused. Most systems discharge by connecting resistors in parallel at the power supply output. The advantage of this mode is simple structure, and the shortcoming is that the discharge rate is slow, and the power consumption is very high when normally working. It may also lead to a certain chance of system failure.
In addition, a system needing backup and data storage is powered by dual power sources commonly, and when the main power source is powered off, the backup power source supplies power to the system, so that the aims of data backup and storage are achieved. The existing products mainly adopt a relay control circuit or a simple triode switching circuit to realize the alternation of a main power supply and a standby power supply. The relay control mode has larger time delay, and the problems of large power supply fluctuation, poor reliability and the like exist in the power supply switching process; the power supply voltage loss of the triode switching circuit is large, and the turn-off process needs to pass through the amplification area of the triode, so that the turn-off is slow, the voltage gradually becomes low, and the stability of the system is very unfavorable.
Disclosure of Invention
It is an object of the present invention to overcome the above problems or to at least partially solve or mitigate the above problems.
The embedded power system management circuit comprises a power failure detection unit circuit, a dual-power switching unit circuit, a time delay turn-off control unit circuit, a voltage detection unit circuit, a discharge unit circuit and an upper wave shaping unit circuit;
the power failure detection unit circuit comprises a resistor R10, a resistor R11 and a capacitor C2; the resistor R11 and the capacitor C2 are connected in parallel to form a parallel circuit, one end of the parallel circuit is connected with one end of the resistor R10, the connection point is used as a power-down detection point, the other end of the resistor R10 is connected with a main power supply, and the other end of the parallel circuit is connected with a power ground;
the voltage detection unit circuit is realized by adopting a 3V voltage judgment circuit;
the dual-power switching unit circuit comprises a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, a resistor R3, a resistor R4 and a resistor R5; the source electrode of the field effect transistor Q1 is connected with one end of the resistor R3, and the connection point is simultaneously connected with a standby power supply; the gate of the field effect transistor Q1 is connected with one end of the resistor R4; the drain electrode of the field effect transistor Q3 is simultaneously connected with the other end of the resistor R3 and the other end of the resistor R4, the source electrode of the field effect transistor Q3 is connected with the power ground, and the grid electrode of the field effect transistor Q3 and the output end of the 3V voltage judging circuit are connected with the resistor R5 in series; the drain electrode of the field effect transistor Q2 is connected with the drain electrode of the field effect transistor Q1, the source electrode of the field effect transistor Q2 is connected with a load, and the grid electrode of the field effect transistor Q2 is connected with a main power supply;
the time delay turn-off control unit circuit comprises a diode D1, a capacitor C1 and a resistor R6; the anode of the diode D1 is connected with a main power supply, the cathode of the diode D1 is simultaneously connected with one end of the resistor R6, the anode of the capacitor C1 and the detection signal input end of the 3V voltage judgment circuit, and the other end of the resistor R6 and the cathode of the capacitor C1 are connected with the power ground;
the discharging unit circuit comprises a resistor R1, a resistor R2 and a triode Q4, wherein the base electrode of the triode Q4 is simultaneously connected with the output end of the 3V voltage judging circuit, one end of the resistor R1 and the emitter electrode of the triode Q4 are connected with one end of the resistor R2 and the collector electrode of the resistor R2, the other end of the resistor R1 is connected with the other end of the resistor R2, and the connecting point is connected with the load.
The upper wave shaping unit circuit comprises a resistor R7, a resistor R8, a resistor R9, a field-effect tube Q5, a field-effect tube Q6 and a diode D2; the source electrode of the field effect transistor Q5 is simultaneously connected with one end of the resistor R7 and the cathode and drain electrodes of the diode D2 are connected with a load, the grid electrode is connected with one end of the resistor R8, the anode of the diode D2 is connected with a main power supply, the source electrode of the field effect transistor Q6 is connected with the power ground, the drain electrode is connected with the other end of the resistor R7 and the other end and grid electrode of the resistor R8, and the resistor R9 is connected in series between the output end of the 3V voltage judging circuit.
Optionally, the main power supply comprises a 220V ac power supply and a transformer connected to the 220V ac power supply; the output end of the transformer is used as a connection point of the main power supply and the dual-power-supply quick switching delay turn-off circuit.
Optionally, the transformer is used for transforming, rectifying and stabilizing the 220V alternating current, and the output voltage of the transformer is 5V.
Optionally, the backup power supply is a 4.2V dc power supply.
Optionally, the fet Q1 is a P-channel fet.
Optionally, the fet Q2 is a P-channel fet.
Optionally, the fet Q3 is an N-channel fet.
Optionally, the transistor Q4 is a PNP transistor.
The embedded power system management circuit of the invention has the following advantages:
the main power supply is seamlessly switched to the standby power supply;
the standby power supply is turned off in a delayed manner;
the power failure detection of the main power supply can inform the control system to store data;
the power is cut off, the wave is rectified quickly, residual charges in the circuit are released, and the stability of the system is improved;
and the power-on wave shaping is carried out, and the load is not powered on when the power supply voltage is not 3V, so that the system stability is improved.
Drawings
Fig. 1 is a schematic structural diagram of an embedded power system management circuit according to a first embodiment of the present invention.
Detailed Description
The first embodiment is as follows: as shown in fig. 1, an embedded power system management circuit according to this embodiment includes a power-down detection unit circuit, a dual power switching unit circuit, a time-delay shutdown control unit circuit, a voltage detection unit circuit, a discharge unit circuit, and an upper wave shaping unit circuit. The function and principle of the modules are described separately below.
The power-down detection unit circuit comprises a resistor R10, a resistor R11 and a capacitor C2, and the function of the power-down detection unit circuit is to detect whether the '5V main power supply' is powered down. When the '5V main power supply' supplies power, the 'power failure detection point' level is a high level; when the '5V main power supply' is powered off, the level of the 'power-down detection point' is low level. Therefore, the processor can know the power supply condition of the 5V main power supply by monitoring the level of the power failure monitoring point, and well process data and backup.
The dual-power switching unit circuit comprises a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, a resistor R3, a resistor R4 and a resistor R5, and has the functions of realizing the on-off of a 4.2V standby power supply, when the grid of the field effect transistor Q3 is at a low level, the field effect transistor Q3 is cut off, the 4.2V standby power supply voltage reaches the drain of the field effect transistor Q3 through the resistor R3 and the resistor R4, the field effect transistor Q1 is cut off, no voltage exists at a point B, and the 4.2V standby power supply does not work; when the grid of the field effect transistor Q3 is at high level, the field effect transistor Q3 is turned on, the grid of the field effect transistor Q1 is at low level, the field effect transistor Q1 is turned on, the point B is approximately the standby power supply voltage, and the standby power supply is turned on. The field effect transistor Q2 is a backflow prevention protection unit. When the main power supply supplies power, the source voltage of the field effect transistor Q2 is lower than the grid voltage, and the field effect transistor Q2 is cut off. The 5V main power supply at point C does not reach point B. Prevent the current from flowing backwards to the standby power supply to cause the standby power supply to burn. When the standby power supply works, the standby power supply is conducted to a point C through a parasitic diode of the field effect transistor Q2, so that the standby power supply acts on a load.
The time delay turn-off control unit circuit comprises a diode D1, a capacitor C1 and a resistor R6; the delay turn-off control unit circuit provides a delay signal for turning off the 4.2V standby power supply, namely when the power failure of the main power supply begins to delay, a turn-off signal is given to the dual-power supply switching unit circuit after a period of time delay, and the power supply of the whole system is turned off. The delay principle is as follows: when the main power supply is powered on, the diode D1 charges the capacitor C1, the voltage at the point D reaches the voltage V1(V1 is the main power voltage — the voltage drop of the diode D1), after the main power supply is powered off, the capacitor C1 slowly discharges through the resistor R6, the voltage at the point D gradually decreases, and the delay effect is achieved. The calculation formula of the delay time t is as follows: t is RCln [ Vu/(Vu-Vt) ], wherein Vu is the value of the full termination voltage of the capacitor C1; vt is the voltage across the capacitor C1 at time t, R is the resistance of the resistor R6, and C is the capacitance of the capacitor C1.
The voltage detection unit circuit comprises a 3V voltage detection circuit which is provided with an input end and an output end. The principle is that the level of the output terminal is determined by the voltage value of the input terminal. When the voltage value of the input end is higher than 3V, the output end becomes high level, and when the voltage value of the input end is lower than 3V, the output end becomes low level. The function is to provide variable signals for the whole circuit to realize functions.
The discharge unit circuit comprises a resistor R1, a resistor R2 and a transistor Q4. The realization function is to quickly release residual charges in the circuit after the circuit is powered off. The working principle is that when the level of the point A is high level, the main power supply or the 4.2V standby power supply supplies power to the load, the triode Q4 is cut off, and the discharging circuit does not work; when point a goes low, the power is turned off, transistor Q4 is turned on, and the residual charge in the circuit is discharged through resistor R2.
The upper wave shaping unit circuit comprises a diode D2, a field effect transistor Q5, a field effect transistor Q6, a resistor R7, a resistor R8 and a resistor R9. The load power-on circuit has the effects of wave shaping in the power-on process, shortening the time from the level to the high level of the load and improving the stability of the load. The working principle is that when the power supply is just started to be powered on, the voltage at the point D is gradually increased, the output level at the point A is low, the field effect transistor Q6 is cut off, the Q5 is also cut off, and the power supply does not supply power to the load; when the voltage at the point D rises to 3V, the point A outputs high level, the field effect transistor Q6 is conducted, the Q5 is also conducted, and the 5V main power supply supplies power to the load through the diode D2 and the field effect transistor Q5. The voltage for starting the power supply of the load can be started from near 3V instead of 0V through the above process, and the unstable part of the intermediate voltage is removed.
The working state of the embedded power system management circuit is divided into four states of main power supply power-on, main power supply switching to standby power supply, standby power supply delayed turn-off and power-off charge release. The detailed procedures of these several operating states are described below.
Powering on a main power supply: after the 5V main power supply starts to be powered on, the voltage of a point D is gradually increased, a point A outputs low level, the field effect transistor Q1 and the field effect transistor Q5 are both in a cut-off state, and no power is supplied to a point C of a load; when the voltage of the point D rises to 3V, the field effect transistor Q1 and the field effect transistor Q5 are conducted, the main power supply and the standby power supply are both conducted, and the load is powered by the main power supply under the action of the field effect transistor Q2 because the voltage of the main power supply is higher than that of the standby power supply. In the process, the filtering of the power-on unstable voltage is realized through the power-on wave shaping circuit, so that the load starts to supply power when the power supply voltage is close to 3V, and the stability of the system is improved.
Switching the main power supply to the standby power supply: after the main power supply is powered off, the voltage at the point C is lower than that at the point B, and the 4.2V standby power supply supplies power to the load through the Q2. At the same time, the capacitor C1 discharges through the resistor R6, and the voltage at the point D gradually becomes lower. The power down detection point goes low and the processor starts processing and backing up data.
And (3) turning off the standby power supply in a delayed manner: when the point D drops below 3V, the output of the point A changes to low level, the field effect transistor Q3 and the field effect transistor Q1 are cut off, and the 4.2V standby power supply stops supplying power to the load.
And (3) power-off charge release: after the point A is changed into low level, the standby power supply stops supplying power, the triode Q4 is conducted, and charges remained in the circuit are released through the resistor R2 and the field effect transistor Q4, so that the power supply voltage can be quickly lowered to be very low voltage, and the stability of the system is improved.
Claims (8)
1. An embedded power system management circuit is characterized by comprising a power failure detection unit circuit, a dual-power switching unit circuit, a time delay turn-off control unit circuit, a voltage detection unit circuit, a discharge unit circuit and an upper wave shaping unit circuit;
the power failure detection unit circuit comprises a resistor R10, a resistor R11 and a capacitor C2; the resistor R11 and the capacitor C2 are connected in parallel to form a parallel circuit, one end of the parallel circuit is connected with one end of the resistor R10, the connection point is used as a power-down detection point, the other end of the resistor R10 is connected with a main power supply, and the other end of the parallel circuit is connected with a power ground;
the voltage detection unit circuit is realized by adopting a 3V voltage judgment circuit;
the dual-power switching unit circuit comprises a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, a resistor R3, a resistor R4 and a resistor R5; the source electrode of the field effect transistor Q1 is connected with one end of the resistor R3, and the connection point is simultaneously connected with a standby power supply; the gate of the field effect transistor Q1 is connected with one end of the resistor R4; the drain electrode of the field effect transistor Q3 is simultaneously connected with the other end of the resistor R3 and the other end of the resistor R4, the source electrode of the field effect transistor Q3 is connected with the power ground, and the grid electrode of the field effect transistor Q3 and the output end of the 3V voltage judging circuit are connected with the resistor R5 in series; the drain electrode of the field effect transistor Q2 is connected with the drain electrode of the field effect transistor Q1, the source electrode of the field effect transistor Q2 is connected with a load, and the grid electrode of the field effect transistor Q2 is connected with a main power supply;
the time delay turn-off control unit circuit comprises a diode D1, a capacitor C1 and a resistor R6; the anode of the diode D1 is connected with a main power supply, the cathode of the diode D1 is simultaneously connected with one end of the resistor R6, the anode of the capacitor C1 and the detection signal input end of the 3V voltage judgment circuit, and the other end of the resistor R6 and the cathode of the capacitor C1 are connected with the power ground;
the discharging unit circuit comprises a resistor R1, a resistor R2 and a triode Q4, wherein the base electrode of the triode Q4 is simultaneously connected with the output end of the 3V voltage judging circuit, one end of the resistor R1 and the emitter electrode of the triode Q4 are connected with one end of the resistor R2 and the collector electrode of the resistor R2, the other end of the resistor R1 is connected with the other end of the resistor R2, and the connecting point is connected with the load.
The upper wave shaping unit circuit comprises a resistor R7, a resistor R8, a resistor R9, a field-effect tube Q5, a field-effect tube Q6 and a diode D2; the source electrode of the field effect transistor Q5 is simultaneously connected with one end of the resistor R7 and the cathode and drain electrodes of the diode D2 are connected with a load, the grid electrode is connected with one end of the resistor R8, the anode of the diode D2 is connected with a main power supply, the source electrode of the field effect transistor Q6 is connected with the power ground, the drain electrode is connected with the other end of the resistor R7 and the other end and grid electrode of the resistor R8, and the resistor R9 is connected in series between the output end of the 3V voltage judging circuit.
2. The embedded power system management circuit according to claim 1, wherein the main power source comprises a 220V AC power source and a transformer connected to the 220V AC power source; the output end of the transformer is used as a connection point of the main power supply and the dual-power-supply quick switching delay turn-off circuit.
3. The embedded power system management circuit according to claim 2, wherein the transformer is used for transforming, rectifying and stabilizing the 220V ac power, and the output voltage of the transformer is 5V.
4. The embedded power system management circuit of claim 3, wherein the backup power source is a 4.2V DC power source.
5. The embedded power system management circuit according to claim 1, 2 or 3, wherein the FET Q1 is a P-channel FET.
6. The embedded power system management circuit of claim 5, wherein the FET Q2 is a P-channel FET.
7. The embedded power system management circuit of claim 6, wherein the fet Q3 is an N-channel fet.
8. The embedded power system management circuit of claim 1, wherein the transistor Q4 is a PNP transistor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010766966.1A CN112003363B (en) | 2020-08-03 | 2020-08-03 | Embedded power supply system management circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010766966.1A CN112003363B (en) | 2020-08-03 | 2020-08-03 | Embedded power supply system management circuit |
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| CN112003363A true CN112003363A (en) | 2020-11-27 |
| CN112003363B CN112003363B (en) | 2024-05-24 |
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Cited By (1)
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| CN117081029A (en) * | 2023-10-13 | 2023-11-17 | 苏州琨山通用锁具有限公司 | Heavy-current reverse connection preventing and dual-power automatic switching circuit of intelligent lockset |
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| CN112003363B (en) | 2024-05-24 |
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