CN112002705B - Array substrate preparation method and array substrate - Google Patents
Array substrate preparation method and array substrate Download PDFInfo
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- CN112002705B CN112002705B CN202010794733.2A CN202010794733A CN112002705B CN 112002705 B CN112002705 B CN 112002705B CN 202010794733 A CN202010794733 A CN 202010794733A CN 112002705 B CN112002705 B CN 112002705B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The preparation method of the array substrate provided by the embodiment of the invention comprises the steps of preparing a semiconductor layer on a substrate by utilizing a physical vapor deposition process as an active layer, and placing the active layer in a magnetic control device, wherein the magnetic control device provides a rotating magnetic field for the active layer; the magnetic moment directions of the metal atoms in all directions in the active layer are changed through the rotating magnetic field, so that the magnetic moment directions of the metal atoms and the oxygen atoms in all directions are the same, the stability of the active layer is improved, and the technical problem that the active layer is unstable in the conventional array substrate is solved.
Description
Technical Field
The invention relates to the technical field of OLED display, in particular to a preparation method of an array substrate and the array substrate.
Background
The array substrate is developed towards the directions of large size, high resolution, high refresh frequency and flexibility, in the existing array substrate, the active layer generated by magnetron sputtering has a plurality of defect states, and after annealing treatment, the active layer has an unstable phenomenon, so that the existing array substrate has the technical problem of poor stability.
Disclosure of Invention
The embodiment of the invention provides a preparation method of an array substrate and the array substrate, which can solve the technical problem of poor stability of the existing array substrate.
The embodiment of the invention provides a preparation method of an array substrate, which is characterized by comprising the following steps:
providing a substrate base plate;
preparing a metal layer on the substrate by using a physical vapor deposition process, and forming a grid electrode by using an etching process;
preparing an insulating layer on the grid electrode by using chemical vapor deposition, and sequentially forming a grid insulating layer by using an etching process;
preparing a semiconductor layer on the gate insulating layer by using a physical vapor deposition process as an active layer;
placing the substrate formed in the previous step in a rotating magnetic field to enable metal atoms of the active layer to form a specific magnetic moment direction;
and preparing a subsequent functional film layer on the magnetized active layer to form the array substrate.
In the method for manufacturing an array substrate provided in the embodiment of the present invention, in the step of providing a rotating magnetic field for the active layer, the method further includes:
and placing the active layer and the substrate into a magnetic field in a direction parallel to the magnetic induction line.
In the method for manufacturing an array substrate provided in the embodiment of the present invention, in the step of providing a rotating magnetic field for the active layer, the method further includes:
the active layer is placed in a magnetic field having a rotational speed in the range of 500 to 2000 revolutions per minute.
In the method for manufacturing an array substrate provided by the embodiment of the present invention, in the step of forming the active layer, the method further includes:
and preparing a semiconductor layer by using a physical vapor deposition process to form the active layer, wherein the preparation material of the active layer is indium gallium zinc oxide.
The method for manufacturing an array substrate according to the embodiment of the invention is characterized in that in the step of forming the active layer, the method further includes:
a semiconductor layer is prepared as an active layer using a physical vapor deposition process, the active layer having a thickness ranging from 300 a to 700 a.
In the method for manufacturing an array substrate provided by the embodiment of the present invention, in the step of forming the gate insulating layer, the method further includes: an insulating layer is prepared by a plasma chemical vapor deposition process to serve as a gate insulating layer, and the thickness of the gate insulating layer ranges from 1500 angstroms to 4000 angstroms.
In the method for manufacturing an array substrate provided by the embodiment of the present invention, in the step of forming the gate insulating layer, the method further includes: an insulating layer is prepared by a plasma chemical vapor deposition process to serve as a gate insulating layer, and the preparation material of the gate insulating layer is silicon oxide or a silicon oxide and silicon nitride composite layer.
In the method for manufacturing an array substrate provided by the embodiment of the present invention, in the step of forming the gate, the method further includes:
an aluminum layer is prepared by a physical vapor deposition process, and a grid electrode is formed by an etching process.
The embodiment of the invention provides an array substrate, which comprises a substrate, an array layer, a pixel definition layer, a light-emitting function layer and a packaging layer, wherein the array layer comprises:
a gate electrode disposed on the substrate base plate; and
a gate insulating layer disposed on the gate electrode; and
an active layer disposed on the gate insulating layer;
wherein, the magnetic moment direction of the metal atoms in the active layer is the same as the magnetic moment direction of the oxygen atoms.
In the array substrate provided by the embodiment of the invention, the preparation material of the active layer is indium gallium zinc oxide.
The beneficial effects are that: the preparation method of the array substrate provided by the embodiment of the invention comprises the steps of preparing a semiconductor layer as an active layer by utilizing a physical vapor deposition process, and placing the active layer in a magnetic control device, wherein the magnetic control device provides a rotating magnetic field for the active layer; the magnetic moment directions of the metal atoms in all directions are changed through the rotating magnetic field, so that the magnetic moment directions of the metal atoms and the oxygen atoms in all directions are the same, the stability of the active layer is improved, and the technical problem that the active layer of the existing array substrate is unstable is solved.
Drawings
The technical solution and other advantageous effects of the present invention will be made apparent by the following detailed description of the specific embodiments of the present invention with reference to the accompanying drawings.
FIG. 1 is a schematic flow chart of a method for manufacturing an array substrate according to an embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view of an array substrate according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a magnetic control device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present invention, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
As shown in fig. 1, the method for preparing an array substrate provided by the embodiment of the invention includes:
s1, providing a substrate base plate 10;
s2, preparing a metal layer on the substrate base plate 10 by utilizing a physical vapor deposition process, and forming a grid electrode 205 by utilizing an etching process;
s3, preparing an insulating layer on the grid electrode 205 by utilizing chemical vapor deposition, and then forming a grid insulating layer 204 by utilizing an etching process in sequence;
s4, preparing a semiconductor layer serving as an active layer 203 on the gate insulating layer 204 by using a physical vapor deposition process;
s5, placing the substrate formed in the previous step in a rotating magnetic field to enable metal atoms of the active layer 203 to form a specific magnetic moment direction;
and S6, preparing a subsequent functional film layer on the magnetized active layer 203 to form the array substrate.
In this embodiment, the array substrate manufacturing method includes using a physical vapor deposition process to manufacture a semiconductor layer as an active layer 203, and placing the active layer 203 in a magnetic control device, where the magnetic control device provides a rotating magnetic field for the active layer 203; the magnetic moment directions of the metal atoms in all directions are changed through the rotating magnetic field, so that the magnetic moment directions of the metal atoms and the oxygen atoms in all directions are the same, the stability of the active layer 203 is improved, and the technical problem that the active layer 203 is unstable in the existing array substrate is solved.
The gate electrode 205 and the gate insulating layer 204 may be formed using a photolithography process including, but not limited to, an etching process, and further including an exposure process, a developing process, and a photoresist removing process.
In one embodiment, in the step of providing a rotating magnetic field to the active layer 203, the method further includes: the active layer 203 and the substrate 10 are placed in a magnetic field in a direction parallel to the magnetic induction lines.
In one embodiment, in the step of providing a rotating magnetic field to the active layer 203, the method further includes: the active layer 203 and the substrate 10 are placed in a magnetic field in a direction perpendicular to a magnetic induction line.
In one embodiment, in the step of providing a rotating magnetic field to the active layer 203, the method further includes: the active layer 203 is placed in a magnetic field with a rotational speed in the range of 500 to 2000 revolutions per minute.
In one embodiment, in the step of forming the active layer 203, further includes: and preparing a semiconductor layer by using a physical vapor deposition process to form the active layer 203, wherein the preparation material of the active layer 203 is indium gallium zinc oxide.
In one embodiment, in the step of forming the active layer 203, further includes: a semiconductor layer is prepared as the active layer 203 using a physical vapor deposition process, and the thickness of the active layer 203 ranges from 300 a to 700 a.
Wherein, the active layer 203 also needs to be annealed.
In one embodiment, in the step of forming the gate insulating layer 204, further includes: an insulating layer is prepared as the gate insulating layer 204 by a plasma chemical vapor deposition process, and the thickness of the gate insulating layer 204 ranges from 1500 a to 4000 a.
In one embodiment, in the step of forming the gate insulating layer 204, further includes: an insulating layer is prepared by a plasma chemical vapor deposition process to serve as a gate insulating layer 204, and the preparation material of the gate insulating layer 204 is silicon oxide or a silicon oxide and silicon nitride composite layer.
The gate insulating layer 204 may be processed by an etching process to obtain the patterned gate insulating layer 204.
In one embodiment, in the step of forming the gate electrode 205, further includes: an aluminum layer is prepared by a physical vapor deposition process and the gate electrode 205 is formed by an etching process.
In one embodiment, in the step of preparing the active layer 203, further comprising: the prepared semiconductor layer is placed in a magnetic field which can be generated by means of a magnet or by means of an energized conductor.
Wherein the magnetic field is a rotating magnetic field.
Wherein, when the magnetic field is an energizing wire, the energizing wire may be disposed on the outer surface of the bottom of the magnetic control device, and the substrate 10 with the active layer 203 may be disposed on the inner surface of the bottom of the magnetic control device.
In one embodiment, in the step of preparing the active layer 203, further comprising: a magnetic control device is provided, the magnetic control device comprises a rotating component and a platform 1, the rotating component is used for driving the platform 1 to rotate, the platform 1 is used for placing a substrate 10 with an active layer 203, and the magnetic moment direction of metal atoms in all directions of the active layer 203 is the same as the magnetic moment direction of oxygen atoms through the rotating component.
Wherein the rotating member may rotate in a clockwise direction or in a counterclockwise direction.
Wherein the rotational speed of the rotating member is constant.
Wherein the rotational speed of the rotating member ranges from 500 to 2000 revolutions per minute.
The surface shape of the platform 1 may be a shape matching with the panel, and may be rectangular or other quadrangles.
The rotary component further comprises at least one connecting piece, at least one end of the connecting piece is fixed to the rotary component, at least the other end of the connecting piece is fixed to the lower portion of the platform 1, and the rotary component drives the platform 1 to rotate at a certain rotation speed through the fixation of the connecting piece.
The array substrate provided by the embodiment of the invention comprises a substrate 10, an array layer, a pixel definition layer 30, a light emitting function layer 40 and a packaging layer 50, wherein the array layer comprises: a gate electrode 205 disposed on the substrate 10, a gate insulating layer 204 disposed on the gate electrode 205, and an active layer 203 disposed on the gate insulating layer 204, wherein a magnetic moment direction of a metal atom in the active layer 203 is the same as a magnetic moment direction of an oxygen atom.
In this embodiment, the method for preparing an array substrate includes a substrate 10, an array layer, a pixel defining layer 30, a light emitting function layer 40, and a packaging layer 50, where the array layer includes: a gate electrode 205 disposed on the substrate 10, a gate insulating layer 204 disposed on the gate electrode 205, and an active layer 203 disposed on the gate insulating layer 204, wherein a magnetic moment direction of a metal atom in the active layer 203 is the same as a magnetic moment direction of an oxygen atom; the magnetic moment directions of the metal atoms in all directions are changed through the rotating magnetic field, so that the magnetic moment directions of the metal atoms and the oxygen atoms in all directions are the same, the stability of the active layer 203 is improved, and the technical problem that the active layer 203 is unstable in the existing array substrate is solved.
In one embodiment, as shown in fig. 2, the array layer of the array substrate includes a substrate 10, a light shielding layer 201, a buffer layer 202, an active layer 203, a gate 205, a gate insulating layer 204, an interlayer insulating layer 206, a passivation layer 207, a source drain layer 208, and a planarization layer 209, where the magnetic moment direction of metal atoms in the active layer 203 is the same as the magnetic moment direction of oxygen atoms.
The source-drain layer 208 includes a source 2081 and a drain 2082.
Wherein the array substrate further includes a pixel defining layer 30 disposed on the planarization layer 209.
Wherein the array substrate further includes a light emitting functional layer 40 disposed above the planarization layer 209.
Wherein, the array substrate further comprises an encapsulation layer 50 disposed above the light emitting function layer 40.
The light-emitting functional layer 40 includes a first electrode layer 401, a light-emitting layer 402, and a second electrode layer 403.
In one embodiment, the active layer 203 is made of indium gallium zinc oxide.
In one embodiment, the active layer 203 is made of indium gallium tin oxide.
In one embodiment, the active layer 203 is made of indium gallium zinc tin oxide.
In one embodiment, the gate electrode 205 layer may be made of aluminum or other metal materials.
In one embodiment, the gate insulating layer 204 may be made of silicon oxide or a composite layer of silicon nitride and silicon oxide.
Wherein the thickness of the gate insulating layer 204 is 1500 to 4000 angstroms.
Wherein the gate insulating layer 204 is disposed around the gate electrode 205, the gate insulating layer 204 may be composed of one or more patterns.
In one embodiment, the thickness of the active layer 203 may be 300 to 700 angstroms.
The active layer 203 is formed of other metal semiconductor materials, and then annealed to obtain a pattern of the active layer 203.
As shown in fig. 3, an embodiment of the present invention provides a magnetic control device, which includes a platform 1, and a magnetic field component disposed below the platform 1, where an array substrate with an active layer 203 is disposed on the platform 1, and the array substrate includes a substrate 10, a gate 205, a gate insulating layer 204, and an active layer 203, where the active layer 203 is disposed in a magnetic flux line range of the magnetic control device.
The array substrate further includes a source/drain layer 208 disposed above the active layer 203, where the source/drain layer 208 includes a source 2081 and a drain 2082.
Wherein the array substrate further includes a pixel defining layer 30 disposed on the planarization layer 209.
Wherein the array substrate further includes a light emitting functional layer 40 disposed above the planarization layer 209.
Wherein, the array substrate further comprises an encapsulation layer 50 disposed above the light emitting function layer 40.
The light-emitting functional layer 40 includes a first electrode layer 401, a light-emitting layer 402, and a second electrode layer 403.
The preparation material of the active layer 203 is indium gallium zinc oxide.
In one embodiment, the magnetic field component is an energized conductor.
In one embodiment, as shown in FIG. 3, the magnetic field component is a magnet having a positive pole and a negative pole.
The magnetic field may be generated using a magnet, and the magnetic field may also be generated using an energized wire.
Wherein the magnetic field is a rotating magnetic field.
Wherein, when the magnetic field is an energizing wire, the energizing wire may be disposed on the outer surface of the bottom of the magnetic control device, and the substrate 10 with the active layer 203 may be disposed on the inner surface of the bottom of the magnetic control device.
In one embodiment, the magnetic control device further includes a rotating component, the rotating component is used for driving the platform 1 to rotate, the platform 1 is used for placing the substrate 10 with the active layer 203, and the magnetic moment direction of the metal atoms in each direction of the active layer 203 is the same as the magnetic moment direction of the oxygen atoms through the rotating component.
Wherein the rotating member may rotate in a clockwise direction or in a counterclockwise direction.
Wherein the rotational speed of the rotating member is constant.
Wherein the rotational speed of the rotating member ranges from 500 to 2000 revolutions per minute.
The surface shape of the platform 1 may be a shape matching with the panel, and may be rectangular or other quadrangles.
The rotary component further comprises at least one connecting piece, at least one end of the connecting piece is fixed to the rotary component, at least the other end of the connecting piece is fixed to the lower portion of the platform 1, and the rotary component drives the platform 1 to rotate at a certain rotation speed through the fixation of the connecting piece.
The preparation method of the array substrate provided by the embodiment of the invention comprises the steps of preparing a semiconductor layer as an active layer by utilizing a physical vapor deposition process, and placing the active layer in a magnetic control device, wherein the magnetic control device provides a rotating magnetic field for the active layer; the magnetic moment directions of the metal atoms in all directions are changed through the rotating magnetic field, so that the magnetic moment directions of the metal atoms and the oxygen atoms in all directions are the same, the stability of the active layer is improved, and the technical problem that the active layer of the existing array substrate is unstable is solved.
The foregoing has outlined some of the more detailed description of the embodiments of the present invention, wherein specific examples are provided herein to illustrate the principles and embodiments of the present invention, and the above description of the embodiments is provided to facilitate the understanding of the technical solution and core ideas of the present invention; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the invention.
Claims (8)
1. The preparation method of the array substrate is characterized by comprising the following steps:
providing a substrate base plate;
preparing a metal layer on the substrate by using a physical vapor deposition process, and forming a grid electrode by using an etching process;
preparing an insulating layer on the grid electrode by using chemical vapor deposition, and sequentially forming a grid insulating layer by using an etching process;
preparing a semiconductor layer on the gate insulating layer by using a physical vapor deposition process as an active layer;
providing a magnetic control device, wherein the magnetic control device comprises a rotating component and a platform, the rotating component is used for driving the platform to rotate, the platform is used for placing a substrate with an active layer, and the rotating speed of the rotating component is constant;
placing the substrate formed by the steps on the platform and in a rotating magnetic field, placing the active layer and the substrate in the rotating magnetic field in a direction parallel to a magnetic induction line, wherein the rotating speed of the rotating magnetic field ranges from 1200 revolutions per minute to 2000 revolutions per minute, so that metal atoms of the active layer form a specific magnetic moment direction, and the magnetic moment direction of the metal atoms in the active layer is the same as the magnetic moment direction of oxygen atoms;
and preparing a subsequent functional film layer on the magnetized active layer to form the array substrate.
2. The method of manufacturing an array substrate according to claim 1, further comprising, in the step of forming the active layer:
and preparing a semiconductor layer by using a physical vapor deposition process to form the active layer, wherein the preparation material of the active layer is indium gallium zinc oxide.
3. The method of manufacturing an array substrate according to claim 2, further comprising, in the step of forming the active layer:
a semiconductor layer is prepared as an active layer using a physical vapor deposition process, the active layer having a thickness ranging from 300 a to 700 a.
4. The method of manufacturing an array substrate according to claim 1, wherein in the step of forming the gate insulating layer, further comprising: an insulating layer is prepared by a plasma chemical vapor deposition process to serve as a gate insulating layer, and the thickness of the gate insulating layer ranges from 1500 angstroms to 4000 angstroms.
5. The method of manufacturing an array substrate according to claim 4, further comprising, in the step of forming the gate insulating layer: an insulating layer is prepared by a plasma chemical vapor deposition process to serve as a gate insulating layer, and the preparation material of the gate insulating layer is silicon oxide or a silicon oxide and silicon nitride composite layer.
6. The method of manufacturing an array substrate according to claim 1, further comprising, in the step of forming the gate electrode:
an aluminum layer is prepared by a physical vapor deposition process, and a grid electrode is formed by an etching process.
7. An array substrate prepared by the method for preparing an array substrate according to claim 1, comprising:
a gate electrode disposed on the substrate base plate; and
a gate insulating layer disposed on the gate electrode; and
an active layer disposed on the gate insulating layer;
wherein, the magnetic moment direction of the metal atoms in the active layer is the same as the magnetic moment direction of the oxygen atoms.
8. The array substrate of claim 7, wherein the active layer is made of indium gallium zinc oxide.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006171194A (en) * | 2004-12-14 | 2006-06-29 | Seiko Epson Corp | Electro-optical device, and method of manufacturing electro-optical device |
| US20150279863A1 (en) * | 2014-03-28 | 2015-10-01 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Method for Manufacturing Array Substrate |
| US20160247829A1 (en) * | 2014-09-05 | 2016-08-25 | Boe Technology Group Co., Ltd. | Array substrate and manufacturing method thereof, as well as display device |
| CN107505795A (en) * | 2017-09-11 | 2017-12-22 | 武汉天马微电子有限公司 | Array base palte, display panel and its driving method and display device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103000530B (en) * | 2012-11-13 | 2015-05-20 | 深圳丹邦投资集团有限公司 | Manufacturing method of top-gate oxide thin-film transistor |
| KR101829970B1 (en) * | 2016-02-01 | 2018-02-19 | 연세대학교 산학협력단 | OXIDE SEMICONDUCTOR THIN FILM TRANSISTOR and METHOD FOR MANUFACTURING OF THE SAME |
| CN107579077B (en) * | 2017-08-11 | 2020-01-07 | 上海天马有机发光显示技术有限公司 | Display panel, manufacturing method thereof and display device |
| CN109801875B (en) * | 2018-12-26 | 2021-06-04 | 惠科股份有限公司 | Manufacturing method of array substrate, array substrate and display panel |
-
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006171194A (en) * | 2004-12-14 | 2006-06-29 | Seiko Epson Corp | Electro-optical device, and method of manufacturing electro-optical device |
| US20150279863A1 (en) * | 2014-03-28 | 2015-10-01 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Method for Manufacturing Array Substrate |
| US20160247829A1 (en) * | 2014-09-05 | 2016-08-25 | Boe Technology Group Co., Ltd. | Array substrate and manufacturing method thereof, as well as display device |
| CN107505795A (en) * | 2017-09-11 | 2017-12-22 | 武汉天马微电子有限公司 | Array base palte, display panel and its driving method and display device |
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