CN102610524A - Method for manufacturing metal-oxide film transistor with embedded gate structure - Google Patents
Method for manufacturing metal-oxide film transistor with embedded gate structure Download PDFInfo
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- CN102610524A CN102610524A CN2012100668269A CN201210066826A CN102610524A CN 102610524 A CN102610524 A CN 102610524A CN 2012100668269 A CN2012100668269 A CN 2012100668269A CN 201210066826 A CN201210066826 A CN 201210066826A CN 102610524 A CN102610524 A CN 102610524A
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Abstract
The invention discloses a method for manufacturing a metal-oxide film transistor with an embedded gate structure. The method includes the manufacturing steps: depositing a buffer layer on a transparent substrate; depositing a metal elementary substance or a metal alloy film on the buffer layer; depositing a filled layer to completely cover a gate metal layer; performing self-masking by the aid of the gate metal layer; exposing the upper surface of the gate metal layer; preparing an insulating film on the gate metal layer to serve as a gate insulating layer by the aid of an anodic oxidation method; removing photoresist after anodic oxidation; and removing unnecessary metal leads in the film transistor by the aid of an etching method. A metal-oxide film is prepared on the gate insulating layer by means of physical vaporous deposition. The method does not need an additional photoetching mask plate, is simple in process, easy to implement and applicable to manufacture of driving panels with large sizes, high resolution ratio and high refresh frequency based on the metal-oxide film transistor, and has an important industrial application value.
Description
Technical field
The invention belongs to the manufacture method of metal oxide thin-film transistor, relate to a kind of manufacture method specifically with metal oxide thin-film transistor of flush type grid structure.
Background technology
Thin-film transistor TFT is mainly used in the sub-pixel of driving liquid crystal device LCD and Organic Light Emitting Diode OLED display at present.The driving backboard that adopts thin film transistor (TFT) array to process is the critical component that display screen can be realized higher picture element density, aperture opening ratio and lifting brightness.TFT-LCD generally adopts based on the TFT backboard of amorphous silicon as active layer at present.But, can not satisfy the requirement that OLED display screen, high definition TFT-LCD and 3D show because the mobility of amorphous silicon is low excessively.And metal-oxide semiconductor is as the active layer material of thin-film transistor, because it has high mobility, low deposition temperature and transparent optical characteristics are regarded as follow-on demonstration backplane technology, received a large amount of researchers' in the world wide concern at present.The characteristics of high mobility are can satisfy following Display Technique for high refreshing frequency, the big transistorized requirement of current film, and are lower than 100 ℃ technological temperature, make that utilizing burning to prepare flexible display device becomes possibility.
Large scaleization and high Qinghua are the development trends of following flat panel display, owing to show the lifting of refreshing frequency and the expansion of panel size, the delay that reduces the panel signal becomes particularly important.Because RC time of delay is the product of parasitic capacitance in signal line resistance and the circuit, therefore, the metal gates lead that obtains low resistance is the main means of reduction signal delay.Generally adopt low resistance metals such as Al or Cu can reduce the square resistance of holding wire greatly as grid material at present in the prior art; On the other hand; Adopt the grid embedded structure; Can use thicker metallic film as signal conductor, the same like this square resistance that can reduce the signal lead.And embedded structure can guarantee on thicker grid lead, to carry out subsequent thin film deposition and graphically all unaffected.However, during the manufacturing grid insulating barrier, at the intersection of grid and packed layer, insulating layer of thin-film ruptures easily on the flush type grid structure, and then causes thin-film transistor to damage.Therefore, in the thin-film transistor of flush type grid structure, the making of gate insulator is a critical process.So how can provide a kind of manufacture method to become the urgent demand of people with metal oxide thin-film transistor of flush type grid structure.
Summary of the invention
The present invention provides a kind of manufacture method with metal oxide thin-film transistor of flush type grid structure in order to overcome the deficiency that prior art exists.
The present invention realizes through following technical scheme: a kind of manufacture method with metal oxide thin-film transistor of flush type grid structure, and said manufacture method comprises following making step:
A, on transparent substrates deposition one deck SiO
2Or SiNx is as resilient coating;
Deposit thickness is metal simple-substance or the emtal alloy film of 1～5um on b, the resilient coating in said step a, and with its graphical gate metal layer that forms;
Said gate metal layer is Al simple substance membrane or Al alloy single thin film, and said Al alloy single thin film is Al-Si film or Al-M film, and wherein M is alkali metal, alkaline-earth metal, lanthanide rare metal or magnesium-yttrium-transition metal;
Said gate metal layer be by Al or Al alloy firm as the upper strata metal, the bilayer film that Cu, Mo, Au or Ag form as lower metal, its at the middle and upper levels the thickness of Al or Al alloy firm be 100～1000nm, the thickness of lower metal is 1～5um;
C, deposition packed layer cover said gate metal layer fully;
Said packed layer material can be inorganic material SiO
2Or SiNx, also can be organic material acrylic acid, negative photoresist or polyimides with negative photosensitive property;
D, utilize gate metal layer to carry out, negative photoresist is carried out graphical and packed layer is carried out graphically exposing the upper surface of said gate metal layer from mask process;
Gate metal layer be to use negative photoresist as the image definition layer or directly as packed layer from the mask process method; Use ultraviolet ray by substrate side irradiation negative photoresist then; Utilize gate metal layer not pass through the characteristic of ultraviolet light; The figure transfer of gate metal layer to negative photoresist, need not extra photo mask board;
E, use anodised method; The grid substrate for preparing is put into electrolytic solution connect positive source; Power cathode connects graphite or metallic plate is put into electrolytic solution; Energising is handled, and preparation one deck dielectric film does not wherein need the part of deposited oxide film to make with photoresist and protects as gate insulation layer in the gate metal layer on said gate metal layer; Said electrolytic solution is one or more and the solution that obtains after ethylene glycol mixes in ammonium pentaborate, tartaric acid ammonia and the salicylic acid ammonia;
After f, anodic oxidation finish photoresist is removed;
G, use lithographic method are removed unwanted metal lead wire in the thin-film transistor;
H, on gate insulation layer, adopt physical vaporous deposition to prepare metal-oxide film, and metal-oxide film is graphical, as the active layer of thin-film transistor;
The semi-conducting material of active layer is metal oxide (In
2O
3)
x(MO)
y(ZnO)
z, wherein 0≤x, y, z≤1, and x+y+z=1, M is Ga, Sn, Si, Al, Mg, Zr or Re element, Re is the lanthanide rare metal;
I, according to the structure of thin-film transistor, deposition and graphical source-drain electrode, pixel electrode, protective layer or etching barrier layer.
A kind of application with metal oxide thin-film transistor of flush type grid structure of the present invention, this metal oxide thin-film transistor can be used in the driving panel of LCD and the organic diode (OLED) display screen of giving out light of active.
The thin-film transistor that adopts the inventive method to make can adopt back of the body channel etching structure, two kinds of multi-form bottom grating structures of etching barrier layer structure.The thin-film transistor structure that the inventive method is produced comprises: packed layer, flush type gate metal layer, gate insulator, active layer, source-drain electrode and protective layer.
Metal oxide thin-film transistor manufacture method with flush type grid of the present invention is applicable to the driving backboard manufacture craft of liquid crystal display and active organic light-emitting diode (OLED) display screen.
The invention has the beneficial effects as follows: (1) is used for the flush type grid structure making of metal oxide thin-film transistor first, and this method makes the thin-film transistor that utilizes metal oxide thin-film transistor to make large scale, high-resolution, high refreshing frequency drive array becomes possibility; (2) use Alignment Method, utilize metal gates, need not to increase photo mask board, reduced cost of manufacture, the simple and realization easily of technology as the graphical packed layer of mask plate; (3) the anode oxidation method manufacturing grid insulating barrier that uses of the present invention can avoid gate insulation layer that the situation of fracture takes place during film forming between packed layer and gate metal, has improved rate of finished products greatly; (4) anode oxidation method that uses of the present invention is with low cost, realizes large tracts of land and production in enormous quantities easily, and conditions such as the preparation needing no vacuum of gate insulator, high temperature simultaneously greatly reduce the cost of equipment; (5) the present invention is suitable for based on metal oxide thin-film transistor, and the making of the driving panel of large scale, high-resolution, high refreshing frequency has important application in industry and is worth.
Description of drawings
Fig. 1 deposits resilient coating on the transparency carrier among the embodiment 1;
Fig. 2 deposits the gate electrode of also graphical ultra thick metal layers as thin-film transistor among the embodiment 1;
Fig. 3 deposits packed layer among the embodiment 1;
Fig. 4 uses negative photoresist and utilizes ultra thick metal gates as the graphical packed layer of mask plate among the embodiment 1;
Fig. 5 is a flush type grid structure sketch map among the embodiment 1;
Fig. 6 uses the anodic oxidation mode to make gate insulation layer in the gate surface of flush type among the embodiment 1;
Fig. 7 is the metal oxide thin-film transistor sketch map that has the flush type grid structure among embodiment 1 and the embodiment 2;
Fig. 8 deposits resilient coating on the transparency carrier among embodiment 2 and the embodiment 3;
Fig. 9 deposits the gate electrode of also graphical ultra thick metal layers as thin-film transistor among the embodiment 2;
Figure 10 uses PECVD deposition packed layer SiO among the embodiment 2
2
Figure 11 uses negative photoresist and utilizes ultra thick metal gates as the graphical packed layer of mask plate among the embodiment 2;
Figure 12 is a flush type grid structure sketch map among the embodiment 2;
Figure 13 uses the anodic oxidation mode to make gate insulation layer in the gate surface of flush type among the embodiment 2;
Figure 14 is deposition and a graphical active layer among the embodiment 2;
Figure 15 is deposition and a graphical etching barrier layer among the embodiment 2;
Figure 16 is deposition and the graphical source-drain electrode that forms among the embodiment 2;
Figure 17 uses double-level-metal as ultra thick metal gates among the embodiment 3;
Figure 18 uses negative photoresist as packed layer among the embodiment 3;
Figure 19 adopts the graphical packed layer of Alignment Method among the embodiment 3;
Figure 20 uses the anodic oxidation mode to make gate insulation layer at the grid of thin-film transistor among the embodiment 3;
Figure 21 is the metal oxide thin-film transistor sketch map that has the flush type grid structure among the embodiment 3;
Among the figure: the 1-substrate; The 2-resilient coating; The 3-metal level; The 4-packed layer; The 4`-negative photoresist; The 5-insulating barrier; The 6-active layer; The 7-etching barrier layer; The 8-source-drain electrode; The 9-protective layer.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the present invention is described in detail.
Embodiment 1:
A kind of manufacture method with metal oxide thin-film transistor of flush type grid structure, said manufacture method comprises following making step: as shown in Figure 1, deposition resilient coating 2 on transparent substrates 1; As shown in Figure 2, depositing metal layers 3 on above-mentioned resilient coating 2 graphically forms gate metal and peripheral leads then; As shown in Figure 3, deposition packed layer 4, its thickness is suitable with gate metal thickness, and uses negative photoresist 4` as the graphical definition layer; As shown in Figure 4, utilize gate metal as photo mask board, use negative photoresist 4` as the graphical definition layer; Use lithographic method that the packed layer of Al grid top is removed, expose the surface, top of ultra thick metal gates; As shown in Figure 5, form the flush type grid structure; As shown in Figure 6, use the anodic oxidation mode, depositing insulating layer 5 on grid, and make with photoresist to not needing oxide regions to carry out mask; As shown in Figure 7, according to the structural design of concrete metal oxide thin-film transistor, function films such as deposition and graphical active layer 6, source-drain electrode 8, etching barrier layer 7, protective layer 9.
Said gate metal layer can be the single thin film that is made up of Al or Al alloy, and thickness is 1000～5000nm, also can be Al or Al alloy as the upper strata metallic film, other metals are as the bilayer or the sandwich construction of lower metal film.Its at the middle and upper levels thickness of metal film be 100nm～1000nm, the lower metal film thickness is 1000～5000nm.
Said Al alloy single thin film is Al-Si or Al-M, and M is alkali metal, alkaline-earth metal, lanthanide rare metal and magnesium-yttrium-transition metal, and wherein to account for the adjusting range of the percentage of Al be 3wt.%～99wt.% to alloy doping atom.
Lower metal is generally the material with better tack and low-resistivity in said bilayer or the stacked gate structure, like Mo, Au, Ti, Ag; Said packed layer can be selected inorganic SiO for use
2, insulating layer of thin-film such as SiNx, also can select organic films such as polyimides, negative photoresist, acrylic acid for use; Packed layer thickness is suitable with the gate metal film thickness, and difference in height is in ± 300nm scope.
Use negative photoresist 4` to carry out the graphical technology of packed layer, utilize gate metal as mask, ultraviolet light is by glass one side incident.After the development, can the photoresist of gate metal top be removed, all the other photoresists then are retained.Use the method for dry etching or wet etching that the packed layer material etching on the gate metal is removed then.
Said electrolytic solution is any one or a two or more solution A in ammonium pentaborate, tartaric acid ammonia and the salicylic acid ammonia, mixes the resulting solution in back with ethylene glycol B.The preferred B+A+ deionized water of electrolyte, weight ratio is (49～69): 1: the mixed solution of (30～50).
The semi-conducting material of said active layer is metal oxide (In
2O
3)
x(MO)
y(ZnO)
z, wherein 0≤x, y, z≤1, and x+y+z=1, M is Ga, Sn, Si, Al, Mg, Zr or Re element, Re is that La is a rare earth metal; Said metal oxide is generally multi-component metal oxide semiconductor materials such as In-Zn-O, Sn-Zn-O, In-Zn-Al-O, In-Zn-Ga-O, In-Zn-Zr-O.
Graphic method generally adopts wet etching, dry etching and three kinds of methods of photoresist lift off, and inorganic thin film generally adopts chemical plasma depositing system PECVD or physical vapour deposition (PVD) PVD preparation; Organic film generally adopts rotary coating or two kinds of method preparations of blade coating.
What the gate insulator preparation was used is anodised method, and as electrolyte, thickness of insulating layer is 80nm～300nm to the electrolyte that uses as solution such as tartaric acid ammonia, ethylene glycol, salicylic acids; Said thin-film transistor production process combines conventional semiconductor technology, can realize the making of thin film transistor (TFT) array.
Embodiment 2:
A kind of manufacture method with metal oxide thin-film transistor of flush type grid structure comprises following making step: as shown in Figure 8, on the thick alkali-free glass substrate 1 of 0.5mm, use the thick SiO of PECVD deposition 200nm
2Layer is as resilient coating 2.As shown in Figure 9, on resilient coating, (Al: alloy target material Ce=10wt%), the Al-Nd alloy firm of the method deposition 1.5um of use magnetron sputtering are as gate metal, and the use photoetching process is with its graphical gate metal layer 3 that forms to use Al-Nd.Shown in figure 10, use PECVD, deposit thickness is the SiO of 1.5um on patterned ultra thick grid metal
2As packed layer 4.Shown in figure 11, use the graphical definition layer of negative photoresist 4`, and, utilize the gate metal conduct from mask pattern by the glass side irradiating ultraviolet light as packed layer.Shown in figure 12, use reactive ion type dry etching equipment, graphical packed layer forms the flush type grid structure.The used reacting gas CF of etching
4/ O
2=100sccm/20sccm.Shown in figure 13, use electrolyte: ethylene glycol+salicylic acid ammonia+deionized water, weight ratio are 49: 1: 50; Oxidation voltage is set at 100V; Make insulating barrier 5, finally obtaining oxide thickness is 140nm, and the photoresist mask is removed; Cleaning base plate uses lithographic method that unwanted metal lead wire in the thin film transistor (TFT) array is removed then; Shown in figure 14, use the thick metal oxide In-Zn-O of PVD deposition 50nm as active layer 6, and use photoetching that it is graphical.Shown in figure 15, the SiO of deposition 300nm
2As etching barrier layer 7, use PVD to prepare the Mo/Al/Mo lamination metal as source-drain electrode, thickness is respectively 25nm/100nm/25nm.Shown in figure 16, use dry etching, Mo/Al/Mo is graphically formed source-drain electrode 8.As shown in Figure 7, use the method for spin coating, the polyimides of making a layer thickness and be 2um is as protective layer 9.
Embodiment 3:
A kind of manufacture method with metal oxide thin-film transistor of flush type grid structure: said manufacture method comprises following making step: as shown in Figure 8, on the thick alkali-free glass transparent substrates 1 of 0.5mm, use the thick SiO of PECVD deposition 200nm
2Layer is as resilient coating 2.Shown in figure 17; On resilient coating 2, make double-level-metal layer 3; Wherein the Mo film of 1.2um is as lower metal, and the Al alloy firm of 300nm is as the upper strata metal, and the Al alloy firm uses Al-Hf (Al: alloy target material Hf=15wt%); Use the method for magnetron sputtering to make, then and use photoetching process with its graphical gate metal layer that forms.Shown in figure 18, adopt the method for spin coating method, the preparation negative photoresist is as packed layer 4 on metal gates.Shown in figure 19, by the glass side irradiating ultraviolet light, utilize gate metal as from mask, graphical packed layer, then through overexposure, develop photoresist is graphical, make to be mask with photoresist, the part that on the Al-Hf film, covers photoresist will can not be oxidized to Al
2O
3-HfO
2Shown in figure 20, use electrolyte: ethylene glycol+salicylic acid ammonia+deionized water, weight ratio is 49: 1: 50, and oxidation voltage is set at 140V, makes gate insulation layer 5, and finally obtaining the gate insulator layer thickness is 200nm, the photoresist mask is removed cleaning base plate.Use lithographic method that unwanted metal lead wire in the thin film transistor (TFT) array is removed then.Use the thick metal oxide In-Zn-O of PVD deposition 50nm as active layer 6, and use photoetching that it is graphical.Then, the SiO of deposition 300nm
2As etching barrier layer 7.Next use PVD to prepare the Mo/Al/Mo lamination metal as source-drain electrode 8, thickness is respectively 25nm/100nm/25nm.And the use dry etching, Mo/Al/Mo is graphically formed source-drain electrode 8.Shown in figure 21, use the method for spin coating then, the polyimides of making a layer thickness and be 2um is as protective layer 9.Obtain having the metal oxide thin-film transistor of flush type grid structure at last.
Should be noted that at last; Above content is only in order to explain technical scheme of the present invention; But not to the restriction of protection range of the present invention; The simple modification that those of ordinary skill in the art carries out technical scheme of the present invention perhaps is equal to replacement, does not all break away from the essence and the scope of technical scheme of the present invention.
Claims (8)
1. manufacture method with metal oxide thin-film transistor of flush type grid structure, it is characterized in that: said manufacture method comprises following making step:
A, on transparent substrates deposition one deck SiO
2Or SiNx is as resilient coating;
Deposit thickness is metal simple-substance or the emtal alloy film of 1～5um on b, the resilient coating in said step a, and with its graphical gate metal layer that forms;
C, deposition packed layer cover said gate metal layer fully;
D, utilize gate metal layer to carry out, negative photoresist is carried out graphical and packed layer is carried out graphically exposing the upper surface of said gate metal layer from mask process;
E, use anodised method; The grid substrate for preparing is put into electrolytic solution connect positive source; Power cathode connects graphite or metallic plate is put into electrolytic solution; Energising is handled, and preparation one deck dielectric film does not wherein need the part of deposited oxide film to make with photoresist and protects as gate insulation layer in the gate metal layer on said gate metal layer;
After f, anodic oxidation finish photoresist is removed;
G, use lithographic method are removed unwanted metal lead wire in the thin-film transistor;
H, on gate insulation layer, adopt physical vaporous deposition to prepare metal-oxide film, and metal-oxide film is graphical, as the active layer of thin-film transistor;
I, according to the structure of thin-film transistor, deposition and graphical source-drain electrode, pixel electrode, protective layer or etching barrier layer.
2. a kind of manufacture method according to claim 1 with metal oxide thin-film transistor of flush type grid structure; It is characterized in that: said gate metal layer is Al simple substance membrane or Al alloy single thin film; Said Al alloy single thin film is Al-Si film or Al-M film, and wherein M is alkali metal, alkaline-earth metal, lanthanide rare metal or magnesium-yttrium-transition metal.
3. a kind of manufacture method according to claim 1 with metal oxide thin-film transistor of flush type grid structure; It is characterized in that: said gate metal layer is as the upper strata metal by Al or Al alloy firm; The bilayer film that Cu, Mo, Au or Ag form as lower metal; Its at the middle and upper levels the thickness of Al or Al alloy firm be 100～1000nm, the thickness of lower metal is 1～5um.
4. a kind of manufacture method with metal oxide thin-film transistor of flush type grid structure according to claim 1 is characterized in that: said packed layer material is inorganic material SiO
2Or SiNx.
5. a kind of manufacture method with metal oxide thin-film transistor of flush type grid structure according to claim 1 is characterized in that: said packed layer material is organic material acrylic acid, negative photoresist or polyimides with negative photosensitive property.
6. a kind of manufacture method according to claim 1 with metal oxide thin-film transistor of flush type grid structure; It is characterized in that: describedly be to use negative photoresist as the image definition layer or directly as packed layer from the mask process method; Use ultraviolet ray by substrate side irradiation negative photoresist then; Utilize gate metal layer not pass through the characteristic of ultraviolet light, with the figure transfer of gate metal layer to negative photoresist.
7. a kind of manufacture method with metal oxide thin-film transistor of flush type grid structure according to claim 1 is characterized in that: the electrolytic solution in the said e step is one or more and the solution that obtains after ethylene glycol mixes in ammonium pentaborate, tartaric acid ammonia and the salicylic acid ammonia.
8. a kind of manufacture method with metal oxide thin-film transistor of flush type grid structure according to claim 1 is characterized in that: the semi-conducting material of said active layer is metal oxide (In
2O
3)
x(MO)
y(ZnO)
z, wherein 0≤x, y, z≤1, and x+y+z=1, M is Ga, Sn, Si, Al, Mg, Zr or Re element, Re is the lanthanide rare metal.
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|---|---|---|---|
| CN2012100668269A CN102610524A (en) | 2012-03-13 | 2012-03-13 | Method for manufacturing metal-oxide film transistor with embedded gate structure |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014117512A1 (en) * | 2013-02-04 | 2014-08-07 | 广州新视界光电科技有限公司 | Method for preparing thin film transistor, method for preparing thin film transistor driving back panel, and thin film transistor driving back panel |
| CN108921115A (en) * | 2018-07-10 | 2018-11-30 | 京东方科技集团股份有限公司 | Ultrasonic fingerprint identification sensor and preparation method thereof |
| CN113016053A (en) * | 2018-11-16 | 2021-06-22 | 朗姆研究公司 | Bubble defect reduction |
| CN116603700A (en) * | 2022-02-08 | 2023-08-18 | 成都拓米双都光电有限公司 | Preparation method of support grid plate |
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| JPS60103677A (en) * | 1983-11-11 | 1985-06-07 | Seiko Instr & Electronics Ltd | Manufacture of thin film transistor |
| CN102332404A (en) * | 2011-09-21 | 2012-01-25 | 华南理工大学 | Method for manufacturing thin film transistor based on anodic oxidation insulating layer |
-
2012
- 2012-03-13 CN CN2012100668269A patent/CN102610524A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60103677A (en) * | 1983-11-11 | 1985-06-07 | Seiko Instr & Electronics Ltd | Manufacture of thin film transistor |
| CN102332404A (en) * | 2011-09-21 | 2012-01-25 | 华南理工大学 | Method for manufacturing thin film transistor based on anodic oxidation insulating layer |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014117512A1 (en) * | 2013-02-04 | 2014-08-07 | 广州新视界光电科技有限公司 | Method for preparing thin film transistor, method for preparing thin film transistor driving back panel, and thin film transistor driving back panel |
| CN108921115A (en) * | 2018-07-10 | 2018-11-30 | 京东方科技集团股份有限公司 | Ultrasonic fingerprint identification sensor and preparation method thereof |
| CN108921115B (en) * | 2018-07-10 | 2022-04-22 | 京东方科技集团股份有限公司 | Ultrasonic fingerprint identification sensor and manufacturing method thereof |
| CN113016053A (en) * | 2018-11-16 | 2021-06-22 | 朗姆研究公司 | Bubble defect reduction |
| CN116603700A (en) * | 2022-02-08 | 2023-08-18 | 成都拓米双都光电有限公司 | Preparation method of support grid plate |
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