CN111988002B - Digital predistortion method, device, equipment and storage medium for MIMO power amplifier - Google Patents

Digital predistortion method, device, equipment and storage medium for MIMO power amplifier Download PDF

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CN111988002B
CN111988002B CN202010777998.1A CN202010777998A CN111988002B CN 111988002 B CN111988002 B CN 111988002B CN 202010777998 A CN202010777998 A CN 202010777998A CN 111988002 B CN111988002 B CN 111988002B
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predistortion
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CN111988002A (en
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翟建锋
牛杰
于志强
余超
张雷
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Southeast University
Network Communication and Security Zijinshan Laboratory
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Network Communication and Security Zijinshan Laboratory
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3258—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits based on polynomial terms
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

Abstract

The embodiment of the invention discloses a digital predistortion method, a device, equipment and a storage medium for MIMO power amplification, which relate to the technical field of wireless communication and solve the contradiction between the efficiency and the linearity of a power amplifier by relieving the digital predistortion. The invention comprises the following steps: respectively inputting the digital baseband input signals of each sub-channel into corresponding digital predistorters, and obtaining predistortion output signals output by each digital predistorter; and further obtaining a coupled sub-channel signal; injecting the obtained sub-channel signals after coupling into a power amplifier for amplifying, inputting the amplified sub-channel signals into an attenuation coupler, and sequentially filtering and demodulating the coupled signals output by the attenuation coupler to obtain digital baseband output signals of all sub-channels; and inputting the digital baseband input signals and the digital baseband output signals of all the sub-channels into a predistortion training module for training, and updating parameters of all the digital predistorters. The invention is suitable for the digital predistortion of the MIMO power amplifier.

Description

Digital predistortion method, device, equipment and storage medium for MIMO power amplifier
Technical Field
The present invention relates to the field of wireless communication technologies, and in particular, to a digital predistortion technology direction of a MIMO power amplifier, and in particular, to a digital predistortion method, apparatus, device and storage medium for a MIMO power amplifier.
Background
With the rapid development of science and technology and the continuous improvement of communication demands of people, a high-speed and high-capacity communication system becomes a necessary trend of the development of modern mobile communication technology. MIMO (Multiple Input Multiple Output ) is one of the key technologies of modern mobile communications, which can effectively improve the spectrum utilization of the wireless system. The power amplifier is used as a core device in a transmitter, and the design and research of the power amplifier are hot spots in the microwave field.
In order to improve the transmission efficiency of the power amplifier, the power amplifier needs to operate in a saturation region. However, the power amplifier has strong nonlinear characteristics and memory effect, and when the power amplifier inputs a signal with a non-constant envelope, the power amplifier output signal can generate serious nonlinear distortion due to the wide signal bandwidth and high PAPR (Peak to Average Power Ratio, peak-to-average power ratio). On one hand, the nonlinear distortion is reflected by out-of-band spectrum expansion, and the high-order intermodulation quantity generated by the nonlinear characteristic of the power amplifier falls in the adjacent band range to influence the communication quality of adjacent channels, and on the other hand, the nonlinear distortion is reflected by the increase of the in-band error rate, and stronger intersymbol interference is introduced during signal transmission, so that the in-band distortion is generated.
This problem is reflected in MIMO systems, where due to the close distance between the multiple radio frequency channels, inter-channel crosstalk may be introduced, which may create new nonlinear distortions as the crosstalk passes through the power amplifier.
Disclosure of Invention
The embodiment of the application provides a digital predistortion method, a device, equipment and a storage medium for MIMO power amplification, which can solve the contradiction between the efficiency and the linearity of a power amplifier by adopting a digital predistortion reduction technology.
In order to achieve the above purpose, the embodiment of the present application adopts the following technical scheme:
in a first aspect, an embodiment of the present application provides a digital predistortion method for MIMO power amplifiers, including:
step one, inputting digital baseband input signals of all sub-channels into corresponding digital predistorters respectively, and obtaining predistortion output signals output by all the digital predistorters;
step two, after the obtained predistortion output signals are subjected to digital-to-analog conversion, respectively inputting the corresponding low-pass filters, and coupling signals output by all modulators to obtain coupled sub-channel signals, wherein each low-pass filter is connected with one modulator;
step three, injecting the obtained sub-channel signals after coupling into a power amplifier for amplifying, inputting the amplified sub-channel signals into an attenuation coupler, and sequentially filtering and demodulating the coupling signals output by the attenuation coupler to obtain digital baseband output signals of the sub-channels;
And step four, inputting the digital baseband input signals and the digital baseband output signals of all the sub-channels into a predistortion training module, and updating parameters of all the digital predistorters through parameter results obtained by training.
Specifically, aiming at each sub-channel, inputting a digital baseband input signal of a sub-channel n into an n-th digital predistorter, wherein k is more than or equal to n and more than or equal to 1, k=2, and n and k are positive integers; the nth digital predistorter obtains an nth predistortion output signal by using the digital baseband input signal of the subchannel n through the loaded predistortion model and takes the nth predistortion output signal as the output signal of the nth digital predistorter.
The second step comprises the following steps: the n pre-distorted output signal is subjected to digital-to-analog conversion through an n digital-to-analog converter, and the converted signal respectively passes through an n low-pass filter and an n modulator; signals output from the first modulator to the kth modulator are coupled to each other and nonlinear crosstalk is introduced.
The third step comprises the following steps: amplifying the signal of the sub-channel n after coupling through an nth power amplifier, and inputting the amplified signal into an nth attenuation coupler; the coupling signal output by the nth attenuation coupler is filtered by an nth band-pass filter, and the signal output by the nth band-pass filter is demodulated by an nth demodulator; the signal output by the nth demodulator is filtered by an n+k band-pass filter; and after the signals output by the n+k band-pass filter are subjected to analog-to-digital conversion by the n analog-to-digital converter, digital baseband output signals of the sub-channel n are obtained.
And loading a predistortion model of SOMP-PHEC in the first to k-th digital predistorters. The predistortion training is carried out, and model parameters of the first to k digital predistorters are trained by utilizing an SOMP (self-adaptive multi-point) compressed sensing algorithm to obtain normalized mean square errors of digital baseband input signals and digital baseband output signals under different sparsity; and obtaining model parameters of the first to kth digital predistorters trained under the optimal sparsity by utilizing the normalized mean square error.
The 2×2MIMO predistortion models loaded in the first to kth digital predistorters are SOMP-PHEC, comprising:
wherein x is 1 Representing subchannel 1, x 2 Representing subchannel 2, x 1 (n) and x 2 (n) digital baseband input signals for sub-channel 1 and sub-channel 2, respectively, y (n) digital baseband output signal for sub-channel n, P and M are the nonlinear order and memory depth of the alignment term, P, respectively 1 And M 1 The nonlinear order and the memory depth of the product term of the envelope power series of the memory time and the input signal of the current time are respectively M 2 Memory depth, m, for memorizing cross terms 1 ≠m 2 ，h 1,p,q,m 、h 2,p,q,m 、h 3,p,q,m 、h 4,p,q,m 、Andeach representing 6 different model coefficients.
In a second aspect, an embodiment of the present application provides a digital predistortion device for MIMO power amplification, including:
The predistortion module is used for inputting the digital baseband input signals of each subchannel into the corresponding digital predistorter respectively and obtaining predistortion output signals output by each digital predistorter;
the signal coupling module is used for respectively inputting the obtained predistortion output signals into corresponding low-pass filters after digital-to-analog conversion, and coupling the signals output by each modulator to obtain coupled sub-channel signals, wherein each low-pass filter is connected with one modulator;
the signal processing module is used for respectively injecting the obtained sub-channel signals after coupling into the power amplifier for amplifying, inputting the amplified sub-channel signals into the attenuation coupler, and sequentially filtering and demodulating the coupled signals output by the attenuation coupler to obtain digital baseband output signals of all sub-channels;
and the feedback updating module is used for inputting the digital baseband input signals and the digital baseband output signals of all the sub-channels into the predistortion training module, and then updating the parameters of all the digital predistorters through the parameter results obtained by training.
In a third aspect, an embodiment of the present application provides a digital predistortion device for MIMO power amplification, where the digital predistortion device includes at least a processor and a memory, where the memory stores computer-executable instructions, and the processor executes the computer-executable instructions stored in the memory, so that the communication key exchange device executes the method flow in the foregoing embodiment.
In a fourth aspect, an embodiment of the present application provides a storage medium storing a computer program or instructions that, when executed, implement the method flow in the above embodiment.
The digital predistortion method, the device, the equipment and the storage medium for the MIMO power amplifier provided by the embodiment of the application provide that on one hand, the PHEC (Parallel Hammerstein-Envelope memory polynomial-Cross memory term) model is provided, the parallel Hammerstein-envelope memory polynomial-memory cross term) model is obviously improved, the modeling precision of the MP model is obviously improved, and on the other hand, the complexity of the PHEC model is reduced by an SOMP (SubspaceOrthogonal Matching Pursuit ) compressed sensing algorithm, and the operation resources consumed when the 2X 2MIMO power amplifier digital predistortion system is realized are reduced. Compared with the prior art, the PHEC power amplifier digital predistortion model remarkably improves the power amplifier modeling precision of a 2X 2MIMO system; and the complexity of the PHEC model is reduced through an SOMP algorithm, so that the operation resources consumed when the model is realized on an FPGA (Field Programmable Gate Array ) are reduced. Thereby effectively relieving the contradiction between the efficiency and the linearity of the power amplifier by the digital predistortion technology.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a digital predistortion device in accordance with an embodiment of the present invention;
FIG. 2 is a graph of learning a SOMP compressed sensing algorithm in accordance with an embodiment of the present invention;
fig. 3 is a power spectrum comparison diagram of two sub-channels before and after predistortion in an embodiment of the present invention, where (a) in fig. 3 is a power spectrum comparison diagram of sub-channel 1 and (b) in fig. 3 is a power spectrum comparison diagram of sub-channel 2.
Detailed Description
The present invention will be described in further detail below with reference to the drawings and detailed description for the purpose of better understanding of the technical solution of the present invention to those skilled in the art. Embodiments of the present invention will hereinafter be described in detail, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only for explaining the present invention and are not to be construed as limiting the present invention. As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless expressly stated otherwise, as understood by those skilled in the art. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or coupled. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items. It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The embodiment of the invention provides a digital predistortion method for MIMO power amplifier, comprising the following steps:
step one, inputting digital baseband input signals of all sub-channels into corresponding digital predistorters respectively, and obtaining predistortion output signals output by all the digital predistorters.
And step two, after the obtained predistortion output signals are subjected to digital-to-analog conversion, respectively inputting the predistortion output signals into corresponding low-pass filters, and coupling signals output by all modulators to obtain coupled sub-channel signals, wherein each low-pass filter is connected with one modulator.
And thirdly, injecting the obtained sub-channel signals after coupling into a power amplifier for amplification, inputting the amplified sub-channel signals into an attenuation coupler, and sequentially filtering and demodulating the coupling signals output by the attenuation coupler to obtain digital baseband output signals of the sub-channels.
And step four, inputting the digital baseband input signals and the digital baseband output signals of all the sub-channels into a predistortion training module, and updating parameters of all the digital predistorters through parameter results obtained by training.
In this embodiment, the step one includes: for each sub-channel, the digital baseband input signal for sub-channel n is input to an n-th digital predistorter. The nth digital predistorter obtains an nth predistortion output signal by utilizing the digital baseband input signal of the subchannel n through a loaded predistortion model and is used as the output signal of the nth digital predistorter, wherein k is more than or equal to n and more than or equal to 1, k=2, and n and k are both positive integers.
For example: as shown in fig. 1, S1: the first digital predistorter comprises a SOMP-PHEC based predistortion model, digital baseband input signal x for subchannel 1 1 (n) inputting a first digital predistorter which combines its model parameters with the digital baseband input signal x of subchannel 1 1 (n) input into a predistortion model of the predistortion model to output a first predistortion output signal x 1-pre (n) first predistortion output signal x 1-pre (n) also as an output signal of the first digital predistorter; the second digital predistorter comprises a SOMP-PHEC based predistortion model, digital baseband input signal x for subchannel 2 2 (n) inputting a second digital predistorter which applies its own model parameters and the digital baseband input signal x of subchannel 2 2 (n) input into a predistortion model of the predistortion model to output a second predistortion output signal x 2-pre (n) a second predistortion output signal x 2-pre (n) also serves as an output signal of the second digital predistorter.
In this embodiment, the step two includes: and D/A conversion is carried out on the n pre-distorted output signal through an n D/A converter, and the converted signals respectively pass through an n low-pass filter and an n modulator. Signals output from the first modulator to the kth modulator are coupled to each other and nonlinear crosstalk is introduced.
For example: as shown in fig. 1, S2: first predistortion output signal x 1-pre (n) digital-to-analog conversion is performed through a first digital-to-analog converter, and the converted signals respectively pass through a first low-pass filter and a first modulator; second predistortion output signalx 2-pre (n) digital-to-analog conversion is performed through a second digital-to-analog converter, and the converted signals respectively pass through a second low-pass filter and a second modulator; s3: the signal output by the first modulator and the signal output by the second modulator are mutually coupled to introduce nonlinear crosstalk.
Further, the third step includes:
amplifying the coupled signal of the sub-channel n through an nth power amplifier, and inputting the amplified signal into an nth attenuation coupler. The coupling signal output by the nth attenuation coupler is filtered by the nth band-pass filter, and the signal output by the nth band-pass filter is demodulated by the nth demodulator. The signal output by the nth demodulator is filtered by an n+k band-pass filter; and after the signals output by the n+k band-pass filter are subjected to analog-to-digital conversion by the n analog-to-digital converter, digital baseband output signals of the sub-channel n are obtained.
For example: as shown in fig. 1, S4: amplifying the coupled sub-channel 1 signal through a first power amplifier; amplifying the coupled sub-channel 2 signal through a second power amplifier; s5: the signal amplified by the first power amplifier is input into a first attenuation coupler; the signal amplified by the second power amplifier is input into a second attenuation coupler; s6: the coupled signal output by the first attenuation coupler is filtered by a first band-pass filter; the coupled signal output by the second attenuation coupler is filtered by a second band-pass filter; s7: demodulating the signal output by the first band-pass filter through a first demodulator; demodulating the signal output by the second band-pass filter through a second demodulator; s8: the signal output by the first demodulator is filtered by a third band-pass filter; the signal output by the second demodulator is filtered by a fourth band-pass filter; s9: the signal output by the third band-pass filter is subjected to analog-to-digital conversion by the first analog-to-digital converter to obtain a digital baseband output signal y of the subchannel 1 1 (n); the signal output by the fourth band-pass filter is subjected to analog-to-digital conversion by a second analog-to-digital converter to obtain a digital baseband output signal y of the subchannel 2 2 (n); s10: digital baseband input signal x for subchannel 1 1 (n), subchannel 2Digital baseband input signal x 2 (n), digital baseband output signal y of subchannel 1 1 (n) and subchannel 2 digital baseband output signal y 2 And (n) inputting the model parameters of the first digital predistorter and the model parameters of the second predistorter into a predistortion training module, and copying the model parameters of the first predistorter after training to the first digital predistorter and copying the model parameters of the second predistorter after training to the second digital predistorter.
In a preferred version of this embodiment, the first through k-th digital predistorters are loaded with a predistortion model of SOMP-PHEC.
The method specifically further comprises the following steps: and the predistortion training module trains model parameters of the first to k digital predistorters by using an SOMP compressed sensing algorithm to obtain normalized mean square errors of the digital baseband input signals and the digital baseband output signals under different sparsity. And obtaining model parameters of the first to kth digital predistorters trained under the optimal sparsity by utilizing the normalized mean square error.
For example: as shown in fig. 1, in step S10, the predistortion training module trains the model parameters of the first digital predistorter and the model parameters of the second digital predistorter by using an SOMP (subspace orthogonal matching pursuit) compressed sensing algorithm, calculates normalized mean square errors of the digital baseband input signal and the digital baseband output signal under different sparsities, and comprehensively considers modeling precision and model complexity to obtain the model parameters of the first digital predistorter after training and the model parameters of the second digital predistorter after training under the optimal sparsity.
The first to kth digital predistorters are loaded with 2×2MIMO predistortion models of SOMP-PHEC, for example, in step S10, the predistortion training module includes a 2×2MIMO predistortion model based on SOMP-PHEC, and the 2×2MIMO predistortion model based on SOMP-PHEC in the subchannel is shown in formula (1):
wherein x is 1 Representing subchannel 1, x 2 Representing subchannel 2, x 1 (n) and x 2 (n) digital baseband input signals for sub-channel 1 and sub-channel 2, respectively, y (n) digital baseband output signal for sub-channel n, P and M are the nonlinear order and memory depth of the alignment term, P, respectively 1 And M 1 The nonlinear order and the memory depth of the product term of the envelope power series of the memory time and the input signal of the current time are respectively M 2 Memory depth, m, for memorizing cross terms 1 ≠m 2 ，h 1,p,q,m 、h 2,p,q,m 、h 3,p,q,m 、h 4,p,q,m 、Andthe values of the parameters in the above formula can be determined according to specific application scenarios.
Note that lowercase letter p, q, m, m 1 And m 2 Represented, all represent accumulation variables in the accumulation process, where P corresponds to an accumulation upper limit of P or P 1 Q corresponds to the cumulative upper limit P-p+1 or P 1 -p+1, M corresponding cumulative upper limit is M or M 1 ，m 1 、m 2 The corresponding cumulative upper limit is M 2 . p and q represent positive integers, representing x 1 (n) or x 2 (n) the order of the amplitude.
Note that, the expression (1) is written as a vector form of z=ua, where z is a digital baseband output signal, U is a matrix with respect to the digital baseband input signal x (n), and a is a model coefficient. Comprehensively considering modeling precision and model complexity, and adopting an SOMP compressed sensing algorithm to find the optimal sparsity in the [5,45] interval. The specific method comprises the following steps:
1) Algorithm input: the matrix U is measured, the vector z is measured, and the number of iterations time is from 5 to 45.
2) Variable initialization: coefficient matrixSupport set->Atomic index->Residual r 0 =z, current iteration number t=1, current test matrix U 0 =u, constant matrix U c ＝U。
3) Calculation ofThe maximum index position is found.
4) Updating the support set and the atomic index: t (T) t ＝T t-1 ∪U t-1 (position)，index t ＝index t-1 And (3) carrying out position and entering a sub SP algorithm.
5) Updating: re-updating support set and atomic index T t ＝T sp ，index t ＝index sp ，s＝(T t T T t ) -1 T t T z，U t ＝U c ，U t (index t ) =0, update residual r t ＝z-T t s＝z-T t (T t T T t ) -1 T t T z。
6) Updating the iteration times: t=t+1, when t is less than or equal to time, repeating step 3-5, and when t > time, ending the iteration.
7) Algorithm output: model coefficient s, support the centralized atomic index.
sub-SP algorithm:
1) Algorithm input: the outer layer algorithm inputs the measurement vector z and the support set T t Atomic index t The iteration number t of the current outer layer algorithm and the current test matrix u=u t-1 。
2) Variable initialization: sub-SP algorithm initial support set T 0 ＝T t Maximum iteration number i=t, current iteration number i=1, initial residual r 0 ＝z-T 0 s＝z-T 0 (T 0 T T 0 ) -1 T 0 T z, initial atomic index 0 ＝index t 。
3) Searching I optimal atoms: u=abs (U T r i-1 ) Selecting I maximum values in u to obtain index temp 。
4) Updating the total support set and the total atomic index: t (T) i ＝T i-1 ∪U(index temp )，index i ＝index i-1 ∪index temp 。
5) Backtracking and updating: calculate x= (T i T T i ) -1 T i T z, selecting I maximum values from x to obtain index sp Updating the support set T i ＝T i (index sp ) Updating index i ＝index i (index sp ) Update U (index) i )＝0。
6) Updating residual errors: s= (T i T T i ) -1 T i T z，r i ＝z-T i s＝z-T i (T i T T i ) -1 T i T z。
7) And (5) iterative updating: i=i+1, and when I is less than or equal to I, repeating steps 3-6. When I > I or r i || 2 When=0, the iteration is terminated, let T sp ＝T i ，index sp ＝index i When r i || 2 ＞||r i-1 || 2 When the iteration is terminated, let T sp ＝T i-1 And index sp ＝index i-1 。
8) Algorithm output: output of a new support set T sp Corresponding new atomic index sp To the outer layer algorithm.
And comprehensively considering modeling precision and model complexity, finding out optimal sparsity in a [5,45] interval, and reconstructing a test vector z=ua=U (index) s, wherein the number of model parameters is the optimal sparsity at the moment.
In a preferred scheme of this embodiment, the sparseness of the SOMP compressed sensing algorithm has a value range of [5,45]. For example, the establishment process of the 2×2MIMO predistortion model based on the SOMP-PHEC comprises the following steps:
1) Acquisition of digital baseband input signal x for subchannel 1 1 (n), digital baseband input signal x for subchannel 2 2 (n), digital baseband output signal y of subchannel 1 1 (n) and subchannel 2 digital baseband output signal y 2 (n) and normalizing;
2) Model parameters were selected according to the following ranges: p is less than or equal to 5, M is less than or equal to 3, P 1 ≤3,M 1 ≤2,M 2 ≤2；
3) According to the nonlinear order P and the memory depth M of the model alignment term, memorizing the nonlinear order P of the product term of the time envelope power series and the current time input signal 1 And memory depth M 1 Memory depth M of memory cross item 2 In the value range of sparsity [5,45]]In-band searching, each search uses SOMP compressed sensing algorithm to input signal x according to digital baseband of sub-channel 1 1 (n), digital baseband input signal x for subchannel 2 2 (n), digital baseband output signal y of subchannel 1 1 (n) and subchannel 2 digital baseband output signal y 2 And (n) training the model parameters of the first digital predistorter and the model parameters of the second digital predistorter, calculating normalized mean square errors of the digital baseband input signals and the digital baseband output signals under different sparsity, and comprehensively considering modeling precision and model complexity to obtain the model parameters of the first digital predistorter after training and the model parameters of the second digital predistorter after training under the optimal sparsity.
The embodiment also provides a digital predistortion device for MIMO power amplifier, which is characterized by comprising:
and the predistortion module is used for inputting the digital baseband input signals of each subchannel into the corresponding digital predistorter respectively and obtaining predistortion output signals output by each digital predistorter.
And the signal coupling module is used for respectively inputting the obtained predistortion output signals into corresponding low-pass filters after digital-to-analog conversion, and coupling the signals output by each modulator to obtain coupled sub-channel signals, wherein each low-pass filter is connected with one modulator.
And the signal processing module is used for respectively injecting the obtained sub-channel signals after coupling into the power amplifier for amplification, inputting the amplified sub-channel signals into the attenuation coupler, and sequentially filtering and demodulating the coupled signals output by the attenuation coupler to obtain digital baseband output signals of all the sub-channels.
And the feedback updating module is used for inputting the digital baseband input signals and the digital baseband output signals of all the sub-channels into the predistortion training module, and then updating the parameters of all the digital predistorters through the parameter results obtained by training.
Specifically, the predistortion module includes:
a first digital predistorter comprising an SOMP-PHEC based predistortion model, said first digital predistorter for inputting a digital baseband input signal of subchannel 1 to said SOMP-PHEC based predistortion model and outputting a first predistortion output signal.
And the second digital predistorter also comprises the SOMP-PHEC-based predistortion model and is used for inputting the digital baseband input signal of the subchannel 2 into the SOMP-PHEC-based predistortion model and outputting a second predistortion output signal.
The signal coupling module comprises:
and the first digital-to-analog converter is used for performing digital-to-analog conversion on the first predistortion output signal and inputting the converted signal into a first low-pass filter for filtering.
And the second digital-to-analog converter is used for performing digital-to-analog conversion on the second predistortion output signal and inputting the converted signal into a second low-pass filter for filtering.
The first low-pass filter is used for filtering the signal output by the first digital-to-analog converter.
And the second low-pass filter is used for filtering the signal output by the second digital-to-analog converter.
The first modulator is configured to modulate a signal output by the first low-pass filter.
The second modulator is configured to modulate a signal output by the second low-pass filter.
The sub-channel coupling unit is used for coupling the signals output by the first modulator and the signals output by the second modulator to each other to introduce nonlinear crosstalk.
The signal processing module comprises:
and the first power amplifier is used for amplifying the coupled subchannel 1 signal and inputting the amplified subchannel 1 signal into the first attenuation coupler.
And the second power amplifier is used for amplifying the coupled subchannel 2 signal and inputting the amplified subchannel 2 signal into the second attenuation coupler.
And the first band-pass filter is used for filtering the coupling signal output by the first attenuation coupler.
And the second band-pass filter is used for filtering the coupling signal output by the second attenuation coupler.
And the first demodulator is used for demodulating the signal output by the first band-pass filter.
And the second demodulator is used for demodulating the signal output by the second band-pass filter.
And the third band-pass filter is used for filtering the signal output by the first demodulator.
And a fourth band-pass filter for filtering the signal output by the second demodulator.
And the first analog-to-digital converter is used for performing analog-to-digital conversion on the signal output by the third band-pass filter and obtaining a digital baseband output signal of the subchannel 1.
And the second analog-to-digital converter is used for performing analog-to-digital conversion on the signal output by the fourth band-pass filter and obtaining a digital baseband output signal of the subchannel 2.
The feedback updating module comprises:
the predistortion training module is configured to train the model parameters of the first digital predistorter and the model parameters of the second digital predistorter according to the digital baseband input signal of the subchannel 1, the digital baseband input signal of the subchannel 2, the digital baseband output signal of the subchannel 1 and the digital baseband output signal of the subchannel 2, copy the trained model parameters of the first digital predistorter to the first digital predistorter, and copy the trained model parameters of the second digital predistorter to the second digital predistorter.
For example, as shown in fig. 1, a first digital predistorter: the first digital predistorter comprises a SOMP-PHEC based predistortion model, digital baseband input signal x for subchannel 1 1 (n) inputting a first digital predistorter which combines its model parameters with the digital baseband input signal x of subchannel 1 1 (n) input into a predistortion model of the predistortion model to output a first predistortion output signal x 1-pre (n) first predistortion output signal x 1-pre (n) also as an output signal of the first digital predistorter; a second digital predistorter: the second digital predistorter comprises a SOMP-PHEC based predistortion model, digital baseband input signal x for subchannel 2 2 (n) inputting a second digital predistorter which applies its own model parameters and the digital baseband input signal x of subchannel 2 2 (n) input into a predistortion model of the predistortion model to output a second predistortion output signal x 2-pre (n) a second predistortion output signal x 2-pre (n) also serves as an output signal of the second digital predistorter.
A first digital-to-analog converter: first predistortion output signal x 1-pre (n) digital-to-analog conversion is carried out through a first digital-to-analog converter, and the converted signal is input into a first low-pass filter for filtering treatment; a second digital-to-analog converter: second predistortion output signal x 2-pre (n) digital-to-analog conversion is carried out through a second digital-to-analog converter, and the converted signal is input into a second low-pass filter for filtering processing.
A first low pass filter: filtering the signal output by the first digital-to-analog converter; a second low pass filter: and filtering the signal output by the second digital-to-analog converter.
A first modulator: the signal output by the first low-pass filter is modulated by a first modulator; a second modulator: the signal output by the second low-pass filter is modulated by a second modulator.
Sub-channel coupling: the signal output by the first modulator and the signal output by the second modulator are mutually coupled to introduce nonlinear crosstalk.
A first power amplifier: amplifying the coupled sub-channel 1 signal through a first power amplifier; a second power amplifier: the coupled subchannel 2 signal is amplified by a second power amplifier.
A first attenuation coupler: the signal amplified by the first power amplifier is input into a first attenuation coupler; a second attenuation coupler: the signal amplified by the second power amplifier is input to the second attenuation coupler.
A first band-pass filter: the coupled signal output by the first attenuation coupler is filtered by a first band-pass filter; a second band-pass filter: the coupled signal output by the second attenuating coupler is filtered by a second bandpass filter.
A first demodulator: demodulating the signal output by the first band-pass filter through a first demodulator; a second demodulator: the signal output by the second band-pass filter is demodulated by a second demodulator.
Third band-pass filter: the signal output by the first demodulator is filtered by a third band-pass filter; fourth band-pass filter: the signal output by the second demodulator is filtered by a fourth bandpass filter.
A first analog-to-digital converter: the signal output by the third band-pass filter is subjected to analog-to-digital conversion by the first analog-to-digital converter to obtain a digital baseband output signal y of the subchannel 1 1 (n); a second analog-to-digital converter: the signal output by the fourth band-pass filter is subjected to analog-to-digital conversion by a second analog-to-digital converter to obtain a digital baseband output signal y of the subchannel 2 2 (n)。
Predistortion training module: digital baseband input signal x for subchannel 1 1 (n), digital baseband input signal x for subchannel 2 2 (n), digital baseband output signal y of subchannel 1 1 (n) and subchannel 2 digital baseband output signal y 2 And (n) inputting the model parameters of the first digital predistorter and the model parameters of the second digital predistorter into a predistortion training module, and copying the model parameters of the first digital predistorter after training to the first digital predistorter and copying the model parameters of the second predistorter after training to the second digital predistorter.
A suitable power amplifier model is required due to the efficient digital predistortion scheme. Most of the existing power amplifier models adopt a Volterra series with memory. For a two-channel or multi-channel communication system, because of new nonlinear distortion caused by inter-channel crosstalk, an original single-channel power amplifier model needs to be improved, and a cross term capable of describing the nonlinear distortion is introduced to accurately describe the behavior of the power amplifier. The existing 2×2MIMO power amplifier model is mostly based on a simplified Volterra polynomial-Memory Polynomial (MP), and this model has good modeling accuracy, and can improve adjacent channel power leakage of the power amplifier of each sub-channel in the 2×2MIMO system. However, this model has fewer cross-channel term varieties in describing intermodulation distortion. Therefore, how to improve modeling accuracy and reduce model complexity is an important content of current research. Compared with a 2 multiplied by 2MP model, the PHEC model has more kinds of cross terms and can more flexibly and accurately characterize the memory effect. The SOMP compressed sensing algorithm is an OMP algorithm improved by an SP algorithm, and can carry out sparse decomposition and accurate reconstruction on the matrix.
The design objective of this embodiment is to propose a PHEC (Parallel Hammerstein-Envelope memory polynomial-Cross memory term, parallel Hammerstein-envelope memory polynomial-memory cross term) model to significantly improve the modeling accuracy of an MP model, and reduce the complexity of the PHEC model by an SOMP (SubspaceOrthogonal Matching Pursuit ) compressed sensing algorithm, and reduce the operation resources consumed when implementing a 2×2MIMO power amplifier digital predistortion system. Compared with the prior art, the embodiment has the following advantages: 1) The PHEC power amplifier digital predistortion model is provided to remarkably improve the power amplifier modeling precision of a 2×2MIMO system. 2) The SOMP algorithm is adopted to reduce the complexity of the PHEC model and reduce the operation resources consumed by the model when the model is realized on an FPGA (Field Programmable Gate Array ).
The advantages of the present embodiment are understood by specific examples: the baseband signals respectively select 20MHz single-tone OFDM signals and 20MHz double-tone OFDM signals as input signals of two paths of channels, the PAPR values are respectively 6.2dB and 7.2dB, and the signal carrier frequency is set to be 3.6GHz. The coupling degree between analog sub-channels of the directional coupler is-15 dB. And carrying out normalization processing after synchronous acquisition of the input and output data of the power amplifier. The output of the power amplifier was compared with ACPR on the upper and lower sidebands of the two subchannels after a 2 x 2MIMO predistortion model based on SOMP-PHEC before predistortion, as shown in table 1 below and in fig. 3:
TABLE 1
As can be seen from fig. 2, the SOMP compressed sensing algorithm approaches convergence at a sparsity of 25. In addition, by comparing the ACPR of the upper side band and the lower side band of the pre-distorted signal, the ACPR improvement effect of more than 23dB can be obtained when the model is used for modeling the power amplifier in the 2X 2MIMO system. This effect is significantly better than the traditional MP model, and for the MP model employed in current 2 x 2MIMO predistortion:
compared with the model of the present embodiment in performance. First, in terms of the number of parameters: when the MP model is selected for modeling, the memory depth is selected to be M, the nonlinear order of the model is selected to be P, and the number of model parameters at the moment is 2 x (M+1) x (1+P) x P/2; when the 2 multiplied by 2MIMO predistortion model based on SOMP-PHEC is selected, the number of model parameters can be obviously reduced by an SOMP compressed sensing algorithm, and the operation resources consumed when the model is realized on an FPGA are reduced. Second, in modeling accuracy of the model: for the MP model, only the cross terms of the alignment terms exist; in the SOMP-PHEC power amplifier model, the cross item between the memory time signal envelope and the current input signal and the cross product item between the memory time envelope and the memory time input signal are added, so that the strong memory effect of the broadband power amplifier can be more accurately described.
Therefore, the PHEC power amplifier digital predistortion model provided in the embodiment remarkably improves the power amplifier modeling precision of a 2×2MIMO system, reduces the number of parameters in the PHEC model through an SOMP compressed sensing algorithm, reduces the operation resources consumed when the model is realized on an FPGA, and accelerates the calculation time of optimal model parameters.
The present embodiment also provides a digital predistortion device for MIMO power amplification, where the digital predistortion device includes at least a processor and a memory, the memory stores computer-executable instructions, and the processor executes the computer-executable instructions stored in the memory, so that the communication key exchange device executes the method flow in the foregoing embodiment.
The present embodiment also provides a storage medium storing a computer program or instructions that, when executed, implement the method flows in the above embodiments.
The steps of a method or algorithm described in connection with the present disclosure may be embodied in hardware, or may be embodied in software instructions executed by a processor. The software instructions may be comprised of corresponding software modules that may be stored in random access memory (RandomAccessMemory, RAM), flash memory, read-only memory (ReadOnlyMemory, ROM), erasable programmable read-only memory (ErasableProgrammableROM, EPROM), electrically erasable programmable read-only memory (ElectricallyEPROM, EEPROM), registers, hard disk, a removable disk, a compact disc read-only memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. In addition, the ASIC may be located in a core network interface device. The processor and the storage medium may reside as discrete components in a core network interface device.
Those skilled in the art will appreciate that in one or more of the examples described above, the functions described in the present application may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, these functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.
The foregoing embodiments have been provided for the purpose of illustrating the general principles of the present application in further detail, and are not to be construed as limiting the scope of the application, but are merely intended to cover any modifications, equivalents, improvements, etc. based on the teachings of the application.

Claims (10)

1. A digital predistortion method for a MIMO power amplifier, comprising:
Step one, inputting digital baseband input signals of all sub-channels into corresponding digital predistorters respectively, and obtaining predistortion output signals output by all the digital predistorters; wherein the digital predistorter comprises a SOMP-PHEC-based predistortion model;
step two, after the obtained predistortion output signals are subjected to digital-to-analog conversion, respectively inputting the corresponding low-pass filters, and coupling signals output by all modulators to obtain coupled sub-channel signals, wherein each low-pass filter is connected with one modulator;
step three, injecting the obtained sub-channel signals after coupling into a power amplifier for amplifying, inputting the amplified sub-channel signals into an attenuation coupler, and sequentially filtering and demodulating the coupling signals output by the attenuation coupler to obtain digital baseband output signals of the sub-channels;
inputting the digital baseband input signals and the digital baseband output signals of all the sub-channels into a predistortion training module, and updating parameters of all the digital predistorters through parameter results obtained by training; the predistortion training module trains model parameters of the digital predistorter by utilizing an SOMP compressed sensing algorithm, calculates normalized mean square errors of digital baseband input signals and digital baseband output signals under different sparsity, and acquires the trained model parameters under the optimal sparsity by utilizing the normalized mean square errors.
2. The method according to claim 1, wherein the first step includes:
inputting a digital baseband input signal of a sub-channel n into an n-th digital predistorter for each sub-channel, wherein k is more than or equal to n and more than or equal to 1, k=2, and n and k are both positive integers;
the nth digital predistorter obtains an nth predistortion output signal by using the digital baseband input signal of the subchannel n through the loaded predistortion model and takes the nth predistortion output signal as the output signal of the nth digital predistorter.
3. The method according to claim 2, wherein the second step comprises:
the n pre-distorted output signal is subjected to digital-to-analog conversion through an n digital-to-analog converter, and the converted signal respectively passes through an n low-pass filter and an n modulator;
signals output from the first modulator to the kth modulator are coupled to each other and nonlinear crosstalk is introduced.
4. A method according to claim 3, wherein the third step comprises:
amplifying the signal of the sub-channel n after coupling through an nth power amplifier, and inputting the amplified signal into an nth attenuation coupler;
the coupling signal output by the nth attenuation coupler is filtered by an nth band-pass filter, and the signal output by the nth band-pass filter is demodulated by an nth demodulator;
The signal output by the nth demodulator is filtered by an n+k band-pass filter;
and after the signals output by the n+k band-pass filter are subjected to analog-to-digital conversion by the n analog-to-digital converter, digital baseband output signals of the sub-channel n are obtained.
5. The method of claim 2, wherein the first through kth digital predistorters are loaded with a predistortion model of SOMP-PHEC.
6. The method as recited in claim 5, further comprising:
the predistortion training is carried out, and model parameters of the first to k digital predistorters are trained by utilizing an SOMP (self-adaptive multi-point) compressed sensing algorithm to obtain normalized mean square errors of digital baseband input signals and digital baseband output signals under different sparsity;
and obtaining model parameters of the first to kth digital predistorters trained under the optimal sparsity by utilizing the normalized mean square error.
7. The method of claim 5, wherein the 2 x 2MIMO predistortion model loaded in the first through kth digital predistorters is a SOMP-PHEC, comprising:
wherein x is 1 Representing subchannel 1, x 2 Representing subchannel 2, x 1 (n) and x 2 (n) digital baseband input signals for sub-channel 1 and sub-channel 2, respectively, y (n) digital baseband output signal for sub-channel n, P and M are the nonlinear order and memory depth of the alignment term, P, respectively 1 And M 1 The nonlinear order and the memory depth of the product term of the envelope power series of the memory time and the input signal of the current time are respectively M 2 Memory depth, m, for memorizing cross terms 1 ≠m 2 ，h 1,p,q,m 、h 2,p,q,m 、h 3,p,q,m 、h 4,p,q,m 、And->Respectively represent 6 different model coefficients, p, q, m, m 1 And m 2 Respectively representing the accumulation variables in the accumulation process.
8. A digital predistortion device for a MIMO power amplifier, comprising:
the predistortion module is used for inputting the digital baseband input signals of each subchannel into the corresponding digital predistorter respectively and obtaining predistortion output signals output by each digital predistorter; wherein the digital predistorter comprises a SOMP-PHEC-based predistortion model;
the signal coupling module is used for respectively inputting the obtained predistortion output signals into corresponding low-pass filters after digital-to-analog conversion, and coupling the signals output by each modulator to obtain coupled sub-channel signals, wherein each low-pass filter is connected with one modulator;
the signal processing module is used for respectively injecting the obtained sub-channel signals after coupling into the power amplifier for amplifying, inputting the amplified sub-channel signals into the attenuation coupler, and sequentially filtering and demodulating the coupled signals output by the attenuation coupler to obtain digital baseband output signals of all sub-channels;
The feedback updating module is used for inputting the digital baseband input signals and the digital baseband output signals of all the sub-channels into the predistortion training module, and then updating the parameters of all the digital predistorters through the parameter results obtained by training; the predistortion training module trains model parameters of the digital predistorter by utilizing an SOMP compressed sensing algorithm, calculates normalized mean square errors of digital baseband input signals and digital baseband output signals under different sparsity, and acquires the trained model parameters under the optimal sparsity by utilizing the normalized mean square errors.
9. A digital predistortion device for a MIMO power amplifier, characterized in that the digital predistortion device comprises at least a processor and a memory, the memory storing computer-executable instructions, the processor executing the computer-executable instructions stored by the memory, causing a communication key exchange device to perform the method of any one of claims 1 to 7.
10. A storage medium storing a computer program or instructions which, when executed, implement the method of any one of claims 1 to 7.
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