CN105958952A - Single-bit DPD (Digital Pre-Distortion) method for power amplifier - Google Patents

Abstract

The invention relates to a single-bit digital pre-distortion method of a power amplifier, which performs time delay estimation through a frequency domain method and performs time delay compensation in a digital domain; takes the difference between input and output signals; and replaces a conventional feedback branch ADC with The 1bit ADC or comparator samples the difference between the input and output signals accordingly, that is, x is still the input signal sequence, and the output y signal is processed by taking the difference; estimate the step size required in the iteration; after the above After the processing, the iterative format suitable for 1bit is used to iterate to complete the parameter extraction of DPD. In the present invention, the 1-bit technology developed in the field of digital signal processing in recent years is used in the digital pre-distortion technology of the power amplifier to form a single-bit digital pre-distortion method, which can greatly reduce the power consumption and cost of the feedback loop, and can also greatly improve the pre-distortion technology. The bandwidth range of the application is expected to reach hundreds of MHz, and it is possible to solve the broadband DPD technical requirements of 5G communication.

Description

A Single Bit Digital Predistortion Method for Power Amplifier

technical field

The invention relates to a single-bit digital predistortion method of a power amplifier, which belongs to the technical field of electronic information and communication.

Background technique

In a wireless communication system, a power amplifier (Power Amplifier, PA) is a main nonlinear device. Severe nonlinearity near the saturation point of the power amplifier will cause in-band distortion of the signal, and at the same time, spectrum leakage will occur, resulting in adjacent channel interference. On the contrary, making the peak-to-average ratio signal work in the linear region will reduce power efficiency. Therefore, the linearization technology of the power amplifier has become a research hotspot in recent years. Among them, digital predistortion (Digital PreDistortion, DPD) has become a widely used technology due to its advantages of low cost and flexible programming [1,2]. The DPD technology is to cascade a predistorter (PreDistorter, PD) with the opposite nonlinear characteristics before the power amplifier, so that the cascaded system is linear [2]. Figure 1 shows a typical conventional DPD block diagram.

Since the DPD technology works in the digital domain, an analog-to-digital converter (Analog-to-Digital Converter, ADC) is a necessary device. Due to the existence of nonlinearity, the frequency spectrum of the signal will be broadened after passing through the power amplifier. In order to further obtain the characteristics of the predistorter in order to analyze its nonlinear characteristics, if the rate of 5th-order intermodulation distortion is considered, it is necessary to analyze the spectrum of at least 5 times the bandwidth of the input signal. That is, one needs to sample at least 5 times the Nyquist sampling rate of the input signal. With the popularization of the 3rd and 4th generation wireless communication technologies, the input signal bandwidth becomes wider and wider, reaching 100MHz or even wider, which puts extremely high requirements on the ADC, and the cost will also increase significantly[3 ]. Therefore, reducing the ADC rate requirement and power consumption is an urgent problem to be solved in the current DPD research.

(1) Digital predistortion is the research focus of RF front-end

Digital predistortion is currently the research focus of the RF front end. Digital predistortion was proposed in the 1990s, and after entering this century, this technology began to get people's attention and has a wide range of applications. Many international research institutions are engaged in related research work, including iRadio Laboratory in Canada, University of Dublin in Ireland, and many laboratories in Germany, Japan and other countries. In China, many research groups such as Tsinghua University, Chengdu University of Electronic Science and Technology, Southeast University, Ningbo University, Beijing University of Posts and Telecommunications, and University of Science and Technology of China have carried out DPD-related research work.

At present, research hotspots in the field of DPD mainly focus on the selection of DPD models, improvement and optimization, and complexity reduction [4-9]. The more common models include memory polynomial (MP) model, Hammerstein model, Wiener model, Volterra model, LUT model and Several enhanced models based on this, etc. In recent years, DPD application scenarios have gradually transitioned from single-frequency to dual-frequency or even multi-frequency [10-12]. Therefore, research on dual-frequency and multi-frequency DPD models has gradually become popular, which also puts forward more requirements for processing bandwidth. high demands.

With the rapid development of today's digital signal processing software and hardware, and the popularization of next-generation wireless communication technology, the continuous improvement of signal transmission rate, spectrum utilization rate and power amplifier linearization requirements will make digital pre-distortion technology continue to become the focus of wireless RF front-end research one of the directions.

(2) Undersampling DPD research is gradually heating up

Reducing the system sampling rate is one of the main research directions in the DPD field in the future. In recent years, researchers at home and abroad have begun to pay attention to this field and have proposed some feasible solutions.

One of the methods is direct undersampling, which is simple and convenient, and works well in some narrowband scenarios. Documents [3,13] have proved the feasibility of direct undersampling in digital predistortion, but At the cost of losing out-of-band information, predistortion does not work well in broadband scenarios. Even so, the literature [14] proved that the direct subsampling digital predistortion method can significantly suppress the frequency components close to the main band, and successfully applied it in broadband scenarios, at the cost of adding a bandpass filter after the PA device. Literature [15] proposes a band-limited DPD, which is only suitable for low-speed ADCs to collect signal in-band information, and out-of-band information is obtained through spectrum extrapolation. Corresponding to it is a scalar predistortion (scalar DPD) method [16], which only needs to collect the out-of-band information of the signal and minimize it to extract the DPD parameters. The disadvantage is that the convergence speed is slow and it cannot cope with memory effect. Another solution is parallel undersampling, which can not only reduce the sampling rate of a single channel, but also ensure that out-of-band information will not be lost, and at the same time give up the trouble of adding an additional band-pass filter. The applicant has proposed a parallel under-sampling DPD structure in literature [17], and preliminarily verified its feasibility, as shown in Fig. 2 .

With the development and popularization of next-generation wireless communication technology, the demand for under-sampling DPD for high-speed broadband wireless communication signals is more urgent. The present invention proposes at this demand.

(3) Application of 1bit technology in radar imaging

In the radar imaging system, due to the large amount of echo data, the quantization accuracy of the echo is generally not high (each sample is usually quantized with 4 to 8 bits) [18]. SAR imaging based on single-bit quantization was studied and analyzed by G. Schirinzi et al. in the 1990s [18-22]. Single-bit quantization is also called single-bit coding [18,19,22] (onebit coded), symbol coding [21] (signum coded) or phase quantization [20] (phase quantization). , and the two channels of Q perform single-bit coding operations respectively, as shown in FIG. 3 .

In the single-bit SAR imaging system, the traditional ADC is replaced by a comparator. For the down-converted signal, after single-bit measurement, the measured data is in the form of {±1±j}. Therefore, the I and Q two-way signals whose original values are real values are mapped to two discrete values, so it is also called symbol encoding. The single-bit quantization is equivalent to performing four-quadrant quantization on the phase, so it is also called four-level phase quantization. After single-bit quantization, the waveform of the signal is greatly affected, and the frequency spectrum of the signal is correspondingly broadened. After a large number of research and analysis by G.Schirinzi et al., it is pointed out that under the conditions of low signal-to-noise ratio and Nyquist sampling, single-bit quantization has little influence on the signal spectrum, so the traditional matched filtering method can be used to pass the time-space two-dimensional Convolution to image the scene.

For sparse scenes, the sparse optimization method can be used to combine single-bit compressed sensing with single-bit synthetic aperture radar imaging, breaking through the limitations of traditional single-bit matched filtering methods and improving imaging quality. The research on single-bit SAR sparse imaging based on compressed sensing is still in its infancy.

Based on the above three related technical development backgrounds and trends, it can be seen that in order to cope with the ever-increasing demand for bandwidth, on the one hand, an appropriate down-sampling scheme can be adopted under the condition of keeping the number of sampling bits unchanged, so that the overall bandwidth requirement can be reduced. , which is equivalent to reducing the total number of bits per unit time, so that wideband DPD can be completed. Another brand-new idea is that the present invention proposes a single-bit digital pre-distortion method for power amplifiers, directly introduces the 1-bit idea into the DPD of the power amplifier, and adopts ADC technology with only 1 bit (also called single-bit) to realize The reduction of the total number of bits (although a faster sampling rate may be required, the total number of bits is still small), and the rate of the single-bit ADC is extremely fast, and even a comparator can be used to replace the ADC, which is faster. Therefore, it is expected to break through the current predicament and improve the applicable bandwidth level of DPD technology as a whole.

The single-bit digital pre-distortion method is a brand new method for power amplifier digital pre-distortion technology. The key problem to be solved is how to use only 1 bit to reflect the amplitude information of the signal. There is no relevant literature report yet.

The key idea proposed by the present invention is: although the input and output information is distorted due to the nonlinearity of the power amplifier, but has a good correlation, it is proposed to take the difference between the two and perform 1-bit sampling on the difference.

references

[1] D.R.Morgan, Z.Ma, J.Kim, M.G.Zierdt, J.Pastalan.A Generalized Memory Polynomial Model for Digital Predistortion of RF Power Amplifiers[J].IEEE Transactions on Signal Processing,2006,54(10):3852- 3860.

[2]F.M.Ghannouchi,O.Hammi.Behavioral Modeling and Predistortion[J].IEEE Microwave Magazine,2009,10(12):52-64.

[3] Chen Changwei, Qin Kaiyu. Application of Undersampling in Linearization of Baseband Predistortion Power Amplifier [J]. Telecommunications Technology, 2010,50(5):47-50.

[4] J.C.Pedro and S.A.Maas, A Comparative Overview of Microwave and Wireless Power-Amplifier Behavioral Modeling Approaches [J], IEEE Transactions on Microwave Theory and Techniques, vol.53, pp.1150-1163, April 2005.

[5] Z.Anding, J.C.Pedro, and T.J.Brazil, Dynamic Deviation Reduction-Based Volterra Behavioral Modeling of RF Power Amplifiers [J], IEEE Transactions on Microwave Theory and Techniques, vol.54, pp.4323-4332, 2006.

[6] T. Liu, S. Boumaiza, and F. M. Ghannouchi, Augmented hammerstein predistorter for linearization of broad-band wireless transmitters [J], IEEE Transactions on Microwave Theory and Techniques, vol.54, pp.1340-1349, June 2006.

[7] L.Ding, G.T.Zhou, D.R.Morgan, Z.Ma, J.S.Kenney, J.Kim, et al., A robust digital baseband predistorter constructed using memory polynomials[J], IEEE Transactions on Communications, vol.52, pp. 159-165, Jan 2004.

[8] Y.J.Liu, J.Zhou, W.Chen, and B.H.Zhou, A Robust AugmentedComplexity-Reduced Generalized Memory Polynomial for Wideband RF PowerAmplifiers[J], IEEE Transactions on Industrial Electronics, vol.61, pp.2389-2401, 2014.

[9]L.Guan and A.Zhu,Optimized Low-Complexity Implementation of LeastSquares Based Model Extraction for Digital Predistortion of RF Power Amplifiers[J],IEEE Transactions on Microwave Theory and Techniques,vol.60,pp.594-603, March 2012.

[10] F.M.Ghannouchi, M.Younes, and M.Rawat, Distortion and impairment mitigation and compensation of single-and multi-band wireless transmitters (invited) [J], IET Microwaves, Antennas & Propagation, vol.7, pp.518-534 ,2013.

[11] L.Ding, Z.Yang, and H.Gandhi, Concurrent Dual-band Digital Predistortion[C], 2012 IEEE MTT-S International Microwave Symposium Digest, Montreal, QC, Canada, 2012.

[12] G.Yang, F.Liu, L.Li, H.Wang, C.Zhao, and Z.Wang, 2D Orthogonal Polynomials for Concurrent Dual-Band Digital Predistortion[C], 2013 International Microwave Symposium, Seattle, WA, 2013 .

[13]H.Koeppl and P.Singerl,An efficient scheme for nonlinear modeling and predistortion in mixed-signal systems[J].IEEE Trans.Circuits Syst.II,vol.53,no.12,pp.1368–1372,Dec .2006.

[14]C.Yu,L.Guan,E.Zhu and A.Zhu.Band-Limited Volterra Series-Based Digital Predistortion for Wideband RF Power Amplifiers[J].IEEE Transactions on Microwave Theory and Techniques,2012,60(12): 4198-4208.

[15] Y.Ma, Y.Yamao, Y.Akaiwa, and K.Ishibashi, Wideband Digital Predistortion Using Spectral Extrapolation of Band-Limited Feedback Signal[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, vol.PP, pp .1-10, 2014.

[16]I.Takanori,J.Zhou,H.Li,Z.Shi,P.Chen,B.Zhao,and K.Kakinuma,Asimple predistorter infixed microwave radio system with the transmission power control[C].IEEE Topical Conf .Power Amplifiers Wireless Radio Appl., Jan.2012, vol.65, no.68, pp.15–18.

[17] Liu Falin, Wang Haoyu, Yang Guang, Li Gang. Undersampling digital predistortion [J]. Microwave Journal, 2013Vol.29(5-6): 81-85

[18]G.Fornaro,V.Pascazio,G.Schirinzi,Synthetic aperture radar interferometry using one bit coded raw and reference signals[J],Ieee Transactions on Geoscience and Remote Sensing,1997,35:1245-1253.

[19] V. Pascazio, G. Schirinzi, Synthetic aperture radar imaging by one bit coded signals [J], Electronics & Communication Engineering Journal, 1998, 10:17-28.

[20] G. Franceschetti, S. Merolla, M. Tesauro, Phase quantized SAR signal processing: Theory and experiments [J], IEEE Transactions on Aerospace and Electronic Systems, 1999, 35: 201-214.

[21] G. Franceschetti, V. Pascazio, G. Schirinzi, Processing of Signum Coded Sar Signal-Theory and Experiments [J], IEE Proceedings-F Radar and Signal Processing, 1991, 138: 192-198.

[22] G.Alberti, G.Franceschetti, V.Pascazio, et al, Time-Domain Convolution of One-Bit Coded Radar Signals [J], IEE Proceedings-F Radar and Signal Processing, 1991, 138:438-444.

Contents of the invention

The technical problem of the present invention is to overcome the deficiencies of the prior art, and propose a single-bit digital pre-distortion method for power amplifiers, and use the 1-bit technology developed in the field of digital signal processing in recent years for the digital pre-distortion technology of power amplifiers to form a single-bit digital pre-distortion method. digital predistortion method. On the one hand, it can greatly reduce the power consumption and cost of the feedback loop, on the other hand, it can greatly increase the applicable bandwidth range of pre-distortion technology, which is expected to reach hundreds of MHz, and may solve the broadband DPD technology requirements of 5G communication. This technique can also be used as a linearization technique for wideband radar transmitters.

The technical solution of the present invention is described as follows: a single-bit digital pre-distortion method of a power amplifier, the implementation steps are:

(1) Take the difference between the input and output signals;

(2) Replace the conventional feedback branch ADC with a 1-bit ADC or comparator, and sample the difference between the input and output signals accordingly, that is, x is still the input signal sequence, and the output y signal is processed by taking the difference ;

(3) After the above-mentioned processing, iteratively adopts an iterative format suitable for 1 bit to complete the whole process of DPD.

The iterative format adapted to 1bit is implemented as follows:

(31) Perform 1-bit quantized sampling on the difference between the input and output signals to obtain:

$\mathrm{<span\; class="notranslate">\; the\; s</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>$

This formula means to perform 1-bit quantized sampling on the difference between the input and output signals. The s on the left side of the formula is the vector after taking the sign of the difference, where sign() means to take 1-bit quantization, that is, when the sampled data is greater than or equal to a certain threshold It is set to 1, less than this threshold is limited to 0 or -1, represented by +1 and -1, then there are:

s=[±1 ... ±1] ^T

$\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; \&ap;</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}\mathrm{<span\; class="notranslate">\; the\; s</span>}$

Among them, c _k is the iteration step size, and its function is to control the disturbance amplitude;

(32) The iteration format is as follows:

$\begin{array}{c}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&mu;</span>}{<span\; class="notranslate">\; (</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; \&ap;</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}{<span\; class="notranslate">\; (</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\mathrm{<span\; class="notranslate">\; the\; s</span>}\end{array}$

in It is the matrix expression form of the basis function obtained by the input sequence, and the Volterra series is generally used as the basis function to describe the nonlinearity and memory effect of the power amplifier. α _k denotes the predistorter parameters after the kth iteration

(33) After iterating in this formula, the parameter extraction of the single-bit digital predistortion is completed.

The time delay alignment algorithm used when sampling the difference between the input and output signals needs to estimate the time delays of the two loops respectively. Path 1 represents the original transmission branch from the digital-to-analog converter to the analog-to-digital converter of the feedback loop, and path 2 represents the input signal branch after transmission delay processing from the digital-to-analog converter to the analog-to-digital converter of the feedback loop Converter, specifically: first use a 1-bit ADC to collect the signal of path 1, at this time path 2 is grounded, and then perform FFT transformation on the signal to the frequency domain, and estimate the time of path 1 compared with the in-band part of the original signal Delay t ₁ ; then use 1bit ADC to collect the signal of path 2. At this time, path 1 is grounded, and then perform FFT transformation on the signal to the frequency domain. Compared with the in-band part of the original signal, the time delay t of path 2 is estimated ₂ ; when the time delays of the two paths are all estimated, the signal of path 2 carries out a fixed time delay of t ₁ -t ₂ in the digital domain, thereby ensuring that when performing DPD parameter extraction, the input and output difference signals are mutually aligned.

The iteration step size during the iteration adopts the following formula:

${\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}}{{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}}$

where c0 is the initial step size, _k is the number of iterations, and γ is the scaling factor.

The initial step size _c0 can be estimated by the prior knowledge of the power amplifier, that is, the product manual of the power amplifier or a single-tone test of the power amplifier, as follows:

${\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&lambda;</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; x</span>}}{\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; |</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; (</span>\sqrt{\frac{{\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; t</span>}}^{\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; g</span>}}}{{\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; t</span>}}^{\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; k</span>}}}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

in is the actual peak output power, is the expected peak output power at small signal gain, λ is a constant less than 1, and x is the input signal.

After a lot of experimental tests, according to different signal bandwidths and power amplifiers, the value range of γ is suggested to be 1.1 to 1.8.

Compared with the prior art, the present invention has the advantages that: the present invention uses a 1-bit precision ADC in the feedback loop, which greatly reduces power consumption and cost. Because the ADC is one of the most expensive devices in the DPD system, and the basic component of the ADC is a comparator, and the number of comparators increases exponentially with the sampling accuracy. When the sampling accuracy is only 1bit, the power consumption and cost are greatly reduced, which facilitates the application of DPD to small devices (currently DPD is mainly used in large base stations, and small devices mostly use power back-off instead of DPD Therefore, the efficiency is very low); on the other hand, compared with high-precision ADCs, 1-bit ADCs can easily reach a sampling rate of several GSPS, which greatly facilitates the linearization of wideband systems by DPD. It is expected to solve the demand for broadband DPD in the next generation communication system. In addition, compared with the traditional DPD method using multi-digit ADC, the results of this method have comparable accuracy and similar solution speed.

Description of drawings

Figure 1 is a typical DPD block diagram;

Fig. 2 is a kind of subsampling DPD structural block diagram;

Fig. 3 is a single-bit complex signal measurement block diagram;

Figure 4 is a simplified block diagram of a typical direct learning DPD system;

Fig. 5 block diagram of single-bit DPD principle of the present invention

Fig. 6 is a schematic diagram of a single-bit DPD implementation in the present invention;

Fig. 7 is a comparison chart of power spectral density;

Figure 8 is a comparison chart of convergence speed.

detailed description

The scheme principle of the 1bit digital predistortion method proposed by the present invention is shown in Figure 5, and the process is: (1) take the difference between the input and output signals; (2) replace the conventional feedback branch ADC with a 1bit ADC or comparator , according to which the difference between the input and output signals is sampled. That is, x is still the input signal sequence, and the output y signal is subjected to difference processing. After such processing, a new iterative format suitable for 1 bit is used to iterate to complete the whole process of DPD.

Therefore, the gist of the method of the present invention is also embodied in that a new iterative equation is theoretically provided to replace the traditional DPD iterative equation. The time-delay alignment algorithm and step-size selection strategy are necessary steps to complete the iteration, which fully embodies the characteristics of 1-bit processing conditions. The theoretical content of this part is discussed in detail as follows:

(1) Theoretical derivation of traditional DPD

The principle block diagram of traditional DPD is as shown in Figure 1, and in its feedback branch, since will directly sample the output signal (rather than the signal difference that the present invention uses in the single-bit method), generally should utilize the ADC of multi-digit number To approach the dynamic range of the signal, the larger the dynamic range, the more bits of ADC required.

Simplifying Fig. 1, a schematic diagram of a feedback branch of a conventional direct learning structure as shown in Fig. 4 can be obtained. Among them, x is the input signal sequence, and y is the feedback signal sequence after conventional ADC sampling.

Generally, the optimization objective function is taken as follows, the purpose is to minimize the error between the input and output, so as to eliminate the influence of the nonlinear effect of the power amplifier.

The optimization objective function is:

Note the gradient of the objective function and the Hessian matrix:

Then the iteration format is as follows:

α _k+1 ＝α _k -μH ^-1 g＝α _k -μ(X ^H X) ^-1 X ^H (yx)

Among them, μ is the iteration step size, and X is the matrix expression form of the basis function obtained from the input sequence. Generally, the Volterra series is used as the basis function to describe the nonlinearity and memory effect of the power amplifier. α _k denotes the predistorter parameters after the kth iteration. This is the plural form. If remember:

$\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}<span\; class="notranslate">\; =</span>\left[\begin{array}{c}\mathrm{<span\; class="notranslate">\; Re</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; Im</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; \&alpha;</span>}<span\; class="notranslate">\; )</span>\end{array}\right]<span\; class="notranslate">\; ,</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; =</span>\left[\begin{array}{c}\mathrm{<span\; class="notranslate">\; Re</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; Im</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\end{array}\right]<span\; class="notranslate">\; ,</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; =</span>\left[\begin{array}{c}\mathrm{<span\; class="notranslate">\; Re</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; Im</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; )</span>\end{array}\right]<span\; class="notranslate">\; ,</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; =</span>\left[\begin{array}{cc}\mathrm{<span\; class="notranslate">\; Re</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>& <span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Im</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\\ \mathrm{<span\; class="notranslate">\; Im</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>& \mathrm{<span\; class="notranslate">\; Re</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; )</span>\end{array}\right]$

Then it can be transformed into the following real number iterative form:

${\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&mu;</span>}{<span\; class="notranslate">\; (</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>$

After such iterations are completed, the digital pre-distortion is completed.

(2) theoretical derivation of the inventive method

The core principle block diagram of the single-bit DPD method proposed by the present invention is shown in FIG. 5 . From the perspective of the hardware system, two key changes have been made in the traditional band-limited feedback channel. One is to take the difference between the input and output signals, which reduces the amplitude dynamic range of the signal to be sampled; digit ADC.

In order to realize the single-bit DPD algorithm, its theoretical framework and solution method must be studied. The theoretical derivation adapted to this hardware modification is given below, and the two jointly constitute the core innovation of this application.

Taking the direct learning structure as an example (it can also be used in other structures such as the indirect learning structure), a schematic diagram of an implementation of the 1bit digital predistortion method proposed by the present invention is shown in Figure 6. The main points are: (1) take the input and output signals (2) Replace the conventional feedback branch ADC with a 1-bit ADC or a comparator, so that the 1-bit ADC samples the difference between the input and output signals. That is, x is still the input signal sequence, and the output y signal is subjected to difference processing.

In the present invention, the optimization objective function is still to minimize the error between the input and the output, which is a general requirement of the power amplifier DPD. But the iteration format has undergone important changes. remember:

$\mathrm{<span\; class="notranslate">\; the\; s</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; i</span>}\mathrm{<span\; class="notranslate">\; g</span>}\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>$

This formula means to perform 1-bit quantized sampling on the difference between the input and output signals. The s on the left side of the formula is the vector after taking the sign of the difference. Among them, sign() means to take 1-bit quantization, that is, the sampled data is greater than or equal to a certain gate The time limit is set to 1, and the threshold is limited to 0 or -1 if it is less than this threshold. Generally represented by +1 and -1, there are:

s=[±1 ... ±1] ^T

$\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; \&ap;</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}\mathrm{<span\; class="notranslate">\; the\; s</span>}$

Among them, c _k is the iteration step size, the function is to control the disturbance amplitude, and s is understood as a random disturbance vector.

Then the iterative format can be deduced as follows:

$\begin{array}{c}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; \&mu;</span>}{<span\; class="notranslate">\; (</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>\\ <span\; class="notranslate">\; \&ap;</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}{<span\; class="notranslate">\; (</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\mathrm{<span\; class="notranslate">\; the\; s</span>}\end{array}$

Among them, μ is incorporated into c _k , which is used as the total iteration step size. Same meaning as the traditional method. So far, the theoretical derivation is completed. After such iterations, the single-bit digital pre-distortion is completed.

The above derivation can also be understood from the process of minimizing a norm. If the objective function becomes:

$\underset{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}{\mathrm{<span\; class="notranslate">\; argmin</span>}}\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; (</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{<span\; class="notranslate">\; ||</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; the\; y</span>}}<span\; class="notranslate">\; -</span>\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; ||</span>}_{\mathrm{<span\; class="notranslate">\; 1</span>}}$

The second gradient can be obtained as:

Then the iteration formula of the first-order Newton iteration method is:

${\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\mathrm{<span\; class="notranslate">\; the\; s</span>}$

In order to speed up the convergence speed of the algorithm, add This term, the above formula becomes:

${\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; \&alpha;</span>}}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}{<span\; class="notranslate">\; (</span>{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}<span\; class="notranslate">\; )</span>}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\stackrel{<span\; class="notranslate">\; ~</span>}{\mathrm{<span\; class="notranslate">\; x</span>}}}^{\mathrm{<span\; class="notranslate">\; T</span>}}\mathrm{<span\; class="notranslate">\; the\; s</span>}$

It can be seen that this is exactly the same as the iterative formula deduced using the concept of random disturbance. The two important algorithms involved in the algorithm, delay alignment and step size estimation, are briefly described as follows:

(3) The delay alignment algorithm of the inventive method

Since the accuracy of the feedback loop is only 1 bit, the common cross-correlation algorithm cannot be used to estimate the experiment. The frequency domain algorithm is used to estimate the delay, because the in-band part of the signal is not greatly affected by 1bit quantization, that is to say, the in-band information is relatively intact, which helps to use the in-band information for delay estimation. It is necessary to estimate the delay of the two paths separately, as shown in Figure 6, "path 1" indicates that the original transmission branch starts from the digital-to-analog converter to the analog-to-digital converter of the feedback loop, and "path 2" indicates that the transmission passes through The input signal branch of the delay processing starts from the digital-to-analog converter to the analog-to-digital converter of the feedback loop. First, a 1-bit ADC is used to collect the signal of path 1 (path 2 is grounded at this time), and then the signal is transformed into the frequency domain by FFT, and compared with the in-band part of the original signal, the time delay t ₁ of path 1 is estimated. The delay t2 for path ₂ is estimated similarly. When the time delays of the two paths are estimated, the signal of path 2 is delayed by a fixed t ₁ -t ₂ in the digital domain, thus ensuring that the input and output difference signals are aligned with each other when extracting DPD parameters .

(4) the step size selection of the inventive method

The iteration step size needs to be tightly controlled to achieve fast convergence and good accuracy. If the step size is too large, the algorithm may cause excessive convergence errors or even fail to converge; if the step size is too small, the convergence will be very slow, which cannot meet the real-time requirements of many systems. It is proposed to use the following formula to determine the iteration step size:

${\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}}{{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}}$

where c0 is the initial step size, _k is the number of iterations, and γ is the scaling factor. c ₀ can be estimated by the prior knowledge of the power amplifier (the product manual of the power amplifier or a single-tone test of the power amplifier)

${\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; 0</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; \&lambda;</span>}<span\; class="notranslate">\; \&CenterDot;</span>\mathrm{<span\; class="notranslate">\; r</span>}\mathrm{<span\; class="notranslate">\; m</span>}\mathrm{<span\; class="notranslate">\; the\; s</span>}<span\; class="notranslate">\; (</span>\frac{\mathrm{<span\; class="notranslate">\; x</span>}}{\mathrm{<span\; class="notranslate">\; max</span>}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; |</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; (</span>\sqrt{\frac{{\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; t</span>}}^{\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; the\; s</span>}\mathrm{<span\; class="notranslate">\; g</span>}}}{{\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; o</span>}\mathrm{<span\; class="notranslate">\; u</span>}\mathrm{<span\; class="notranslate">\; t</span>}}^{\mathrm{<span\; class="notranslate">\; p</span>}\mathrm{<span\; class="notranslate">\; e</span>}\mathrm{<span\; class="notranslate">\; a</span>}\mathrm{<span\; class="notranslate">\; k</span>}}}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

in is the actual peak output power, is the expected peak output power at small signal gain. λ is a constant less than 1. x is the input signal. After a lot of experimental tests, according to different signal bandwidths and power amplifiers, the value range of γ is suggested to be 1.1 to 1.8.

As shown in Figure 5, the blue arrow and the subtractor represented by the circle are used to perform difference processing on the input and output signals. Since the two have a good correlation, the magnitude of the difference has been effectively reduced. . This is the key to using 1bit ADC. (2) 1bit ADC module, as shown in Figure 5. This module performs 1bitADC sampling for the above difference, and a comparator can also be used to realize this sampling process. (3) A new theoretical solution method. Including (a) iterative solution core method, (b) delay alignment algorithm and (c) step size selection strategy, etc. Due to the above-mentioned hardware processing mode, the traditional DPD solution mode is no longer directly applicable. The present invention proposes a DPD solution method suitable for 1-bit processing, and its detailed process has been explained in the above theoretical part.

The preliminary verification is carried out by Matlab simulation experiment. The conditions are as follows:

Amplifier: Wiener Model (Wiener Model)

DPD: memory polynomial (memory depth P=5, nonlinear order M=4)

step size:

Input signal: LTE 20MHz bandwidth, peak-to-average ratio PAPR 6.6dB

Figure 7 and Figure 8 show the processed results of a set of 1-bit DPD for 20MHz bandwidth. It can be seen from the figure that the digital predistortion effect (with 1bit DPD) is equivalent to the effect of the conventional DPD technology (with DLDPD) after direct learning structure, and the convergence speed is similar to the conventional DPD technology. The effectiveness of the proposed method of the present invention is proved.

Another set of AM-AM (amplitude modulation-amplitude modulation) noise characteristics and AM-PM (amplitude modulation-phase modulation) noise characteristics after single-bit digital pre-distortion processing has almost the same performance compared with the existing DPD technology.

The above embodiments are provided only for the purpose of describing the present invention, not to limit the scope of the present invention. The scope of the invention is defined by the appended claims. Various equivalent replacements and modifications made without departing from the spirit and principle of the present invention shall fall within the scope of the present invention.

Claims (6)

1. the monobit digital pre-distortion method of a power amplifier, it is characterised in that realize step as follows:

(1) carry out time delay estimation by frequency domain method, and carry out delay compensation at numeric field；

(2) difference of input/output signal is taken；

(3) conventional feedback branch ADC is replaced with ADC or the comparator of 1bit, according to this input and output is believed Number difference sample, i.e. x is still input signal sequence, has carried out taking difference for the y signal of output and has processed；

(4) step-length required in iteration estimated by technical manual or priori by PA；

(5) after above-mentioned process, then use the Iteration being adapted to 1bit to be iterated, complete the ginseng of DPD Number extracts.

The monobit digital pre-distortion method of power amplifier the most according to claim 1, it is characterised in that: suitable Should be accomplished by the Iteration of 1bit

(1) difference for input/output signal carry out 1bit quantify sampling obtain:

$s=sign(\tilde{y}-\tilde{x})$

This formula represents that the difference for input/output signal carries out 1bit and quantifies sampling, and the s on the formula left side is that difference is taken symbol Vector after number, wherein sign () expression takes 1 bit quantization, and the data being i.e. sampled are fixed more than or equal to during certain thresholding It is 1, is set to 0 or-1 less than this thresholding, represents then have with+1 and-1:

S=[± 1 ... ± 1]^T

$\tilde{y}\&ap;\tilde{x}+c_{k}s$

Wherein, c_kFor iteration step length, effect is control disturbance amplitude；

(2) Iteration is as follows:

$\begin{array}{c}{\widetilde{\mathrm{\&alpha;}}}_{k+1}={\widetilde{\mathrm{\&alpha;}}}_k-\mathrm{\&mu;}{\left({\tilde{X}}^T\tilde{X}\right)}^{-1}{\tilde{X}}^T\left(\tilde{y}-\tilde{x}\right)\\ \&ap;{\widetilde{\mathrm{\&alpha;}}}_k-c_k{\left({\tilde{X}}^T\tilde{X}\right)}^{-1}{\tilde{X}}^{T}s\end{array}$

WhereinIt is the expression matrix form of the basic function obtained by list entries, typically using Volterra progression as base letter Number describes the non-linear of power amplifier and memory effect,Represent the predistorter parameter after kth time iteration；

(3), after such formula iteration, the parameter extraction of monobit digital predistortion is just completed.

The monobit digital pre-distortion method of power amplifier the most according to claim 1, it is characterised in that: institute State when the difference to input/output signal is sampled use time-delay alignment algorithm be: estimate respectively two paths time Prolong, represent that former transmitting branch starts the analog-digital converter up to feedback circuit, path 2 from digital to analog converter with path 1 Represent that the input signal branch road being transferred through time delay processing starts the analog digital conversion up to feedback circuit from digital to analog converter Device, particularly as follows: first gather the signal in path 1 with the ADC of 1bit, now path 2 ground connection, then this signal Carry out FFT to frequency domain, compared with the band inner portion of primary signal, estimate time delay t in path 1₁；Use 1bit again ADC gather the signal in path 2, now path 1 ground connection, then this signal is carried out FFT to frequency domain, with The band inner portion of primary signal is compared, and estimates time delay t in path 2₂；After the time delay of two paths all estimates, The t that the signal in path 2 is fixed at numeric field₁-t₂Time delay, thus ensure that when carrying out DPD parameter extraction, Input and output difference signal is mutually aligned.

The monobit digital pre-distortion method of power amplifier the most according to claim 1, it is characterised in that: institute Iteration step length when stating iteration uses below equation:

$c_k=\frac{c_0}{k^{\mathrm{\&gamma;}}}$

Wherein c₀Being initial step length, k is iterations, and γ is zoom factor.

The monobit digital pre-distortion method of power amplifier the most according to claim 4, it is characterised in that: institute State initial step length c₀Estimated by the priori of power amplifier, i.e. the product manual of power amplifier or power amplifier is carried out singletone test, As follows:

$c_0=\mathrm{\&lambda;}\&CenterDot;rms\left(\frac{x}{max\left|x\right|}\right)\&CenterDot;(\sqrt{\frac{P_{out}^{peak,sg}}{P_{out}^{peak}}}-1)$

WhereinIt is true peak output,Being the expectation maximum output under small-signal gain, λ is little In the constant of 1, x is then input signal.

The monobit digital pre-distortion method of power amplifier the most according to claim 4, it is characterised in that: institute Through substantial amounts of experiment test, according to different signal bandwidths and power amplifier, the span suggestion of γ is 1.1 to 1.8.