CN111987771A

CN111987771A - On-chip system, battery pack and electronic device

Info

Publication number: CN111987771A
Application number: CN202010880054.7A
Authority: CN
Inventors: 宋利军; 宋朋亮
Original assignee: Xi'an Wenxian Semiconductor Technology Co ltd
Current assignee: Xi'an Wenxian Semiconductor Technology Co ltd
Priority date: 2020-08-27
Filing date: 2020-08-27
Publication date: 2020-11-24
Anticipated expiration: 2040-08-27
Also published as: CN114221420A; CN111987771B

Abstract

The present application provides a system on a chip, comprising: the system on chip comprises a power supply pin, a power grounding pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit and a first switch unit, wherein the system on chip further comprises a shipping pin, when the shipping pin receives a first signal, the system on chip enters a shipping mode, the first switch unit is switched off to enable a battery to stop supplying power to a system circuit, at least part of units of the system on chip are stopped supplying power, and when the system on chip is in the shipping mode, the wake-up unit is supplied with power, and the wake-up unit is used for enabling the system on chip to exit the shipping mode. The application also provides a battery pack and an electronic device. The application has the advantages that: the current consumption of the battery in the transportation and storage processes can be reduced, the electric quantity retention time of the battery is prolonged, and the user experience is improved.

Description

On-chip system, battery pack and electronic device

Technical Field

The present application relates to the field of battery technologies, and in particular, to a system on chip, a battery pack, and an electronic device.

Background

The battery assembly is widely applied to electronic devices, such as bluetooth headsets, mobile phones, tablet computers and the like, so as to provide a more flexible use environment for the electronic devices without being limited by the range of sockets and power supply wires. Generally, a battery assembly includes a bare cell, a battery protection circuit electrically connected to the bare cell to prevent the bare cell from being overcharged or overdischarged.

After the electronic device with the battery pack is manufactured in a production place, the electronic device is shut down after the battery pack is charged with preset electric quantity, then the electronic device is transported and stored for a long time, and finally when an end user takes the electronic device for use for the first time, the electronic device is completely discharged due to internal current consumption due to long-time transportation and storage, so that the end user has to charge the electronic device before the end user uses the electronic device for the first time to recover the electric quantity, and the experience of the user is poor.

Disclosure of Invention

An embodiment of the present application provides a system on chip, a battery pack, and an electronic device. The current consumption of the battery in the transportation and storage processes can be reduced, the electric quantity retention time of the battery is prolonged, and the user experience is improved.

In order to solve the above technical problem, a first aspect of embodiments of the present application provides a system on a chip, including: the power supply circuit comprises a power supply pin, a power grounding pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit and a first switch unit, wherein the power supply pin and the power grounding pin are respectively used for being electrically connected with a battery, and the first switch unit is used for controlling the battery to supply power to a system circuit;

the system on chip further comprises a shipping pin, the system on chip enters a shipping mode when the shipping pin receives a first signal, the first switch unit is switched off in the shipping mode so that the battery stops supplying power to the system circuit and at least part of the units of the system on chip are stopped supplying power, the wake-up unit is supplied with power in the shipping mode, and the wake-up unit is used for enabling the system on chip to exit the shipping mode.

Optionally, the shipping pin triggers the system on chip to generate a shipping control signal to enter a shipping mode when receiving the first signal.

Optionally, the first signal is an encoded signal of a protocol between the system on chip and the system circuit.

Optionally, the first signal includes a pulse signal, the system on chip further includes a pulse counting unit, the pulse counting unit is electrically connected to the shipping pin, and when the number of pulses received by the pulse counting unit in a first predetermined time period is greater than or equal to a first predetermined number, the generation of the shipping control signal is triggered.

Optionally, the first signal is a continuous high-level signal or a continuous low-level signal, the system on chip further includes a first timing unit, the first timing unit is electrically connected to the shipping pin, and when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to a second predetermined time period, the first timing unit triggers generation of a shipping control signal.

Optionally, the over-discharge voltage protection unit includes a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, the first signal is a continuous high level signal or a continuous low level signal, the system on chip further includes a second switch unit and a first resistor, a control end of the second switch unit is electrically connected to the shipping pin, an input end of the second switch unit is grounded, an output end of the second switch unit is electrically connected to one end of the first resistor, another end of the first resistor is connected to a high level, an output end of the second switch unit is electrically connected to a reverse end of the comparator of the over-discharge voltage protection unit, an output end of the comparator is electrically connected to the second timing unit, when the shipping pin receives the first signal, the second switch unit is turned on, and when a duration time of the high level received by the second timing unit is greater than or equal to a third predetermined time period, the second timing unit triggers generation of the ship operation control And (5) signal preparation.

Optionally, the wake-up unit is a charging detection unit.

Optionally, when the charging detection unit detects a charging signal, the system on chip exits the shipping mode.

Optionally, at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit is powered off.

Optionally, when the system on chip enters the shipping mode, the circuits of the system on chip except the wake-up unit are powered off.

Optionally, the first switching unit includes a MOS transistor.

A second aspect of embodiments of the present application provides a battery pack, including:

a battery;

in the system on chip, the power supply pin and the power ground pin of the system on chip are electrically connected to the battery, respectively.

Optionally, the capacity of the battery is 10mAH-80 mAH.

A third aspect of embodiments of the present application provides an electronic apparatus, including:

the above battery module;

system circuitry, wherein the battery supplies power to the system circuitry via the system-on-chip control.

Optionally, the electronic device is a bluetooth headset.

The embodiment of the application has the following beneficial effects: since the system-on-chip further comprises a shipping pin, the system-on-chip enters a shipping mode when the shipping pin receives a first signal, the first switch unit is turned off in the shipping mode to stop the battery from supplying power to the system circuit and stop supplying power to at least part of the units of the system-on-chip, and the wake-up unit is supplied with power in the shipping mode and is used for enabling the system-on-chip to exit the shipping mode. In the shipping mode, the first switch unit is disconnected, so that the battery can not supply power to the system circuit, the electric quantity of the battery can be greatly saved, in the shipping mode, at least part of units of the system on chip are stopped supplying power, so that the battery only needs to supply power to a small number of circuit units such as a wake-up unit of the system on chip, the electric quantity consumption of the battery is further reduced, the current consumption of the electronic device can be reduced, the electric quantity keeping time of the battery can be prolonged, after the user takes the electronic device, the user only needs to operate the wake-up unit to enable the system on chip to quit the shipping mode, the electronic device can be normally used when being started, and the user experience is improved.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Fig. 1 is a schematic circuit block diagram of an electronic device according to an embodiment of the present application;

FIG. 2 is a schematic circuit block diagram of an electronic device according to another embodiment of the present application;

FIG. 3 is a schematic circuit block diagram of a system on a chip according to an embodiment of the present application;

FIG. 4 is a schematic diagram illustrating one implementation of a shipping control signal triggered by a system-on-chip when a first signal is received at a shipping pin of the system-on-chip according to an embodiment of the present application;

FIG. 5 is a waveform diagram of the signal received by the ship pin and the pulse count unit output signal of FIG. 4;

FIG. 6 is a schematic diagram illustrating another implementation of a shipping control signal triggered by a system-on-chip when a first signal is received at a shipping pin of the system-on-chip according to an embodiment of the present application;

FIG. 7 is a waveform diagram of the signals received by the ship pin and the output signal of the first timing unit of FIG. 6;

FIG. 8 is a schematic diagram illustrating yet another implementation of a shipping control signal that triggers a system-on-chip to generate when a first signal is received at a shipping pin of the system-on-chip according to an embodiment of the present application;

FIG. 9 is a specific circuit implementation diagram of a shipping pin and over-discharge protection unit according to an embodiment of the present application;

FIG. 10 is a waveform diagram of the signals received by the ship pin and the output signal of the second timing unit of FIG. 9;

description of the figure numbers:

100-a system on a chip; 200-system circuitry; 300-a battery; VDD-Power supply pin; GND-power ground pin; VM — System ground pin; CTL-shipping pins; 110-an overcharge voltage protection unit; 120-charging overcurrent protection unit; 130-discharge overcurrent protection unit; 140-reference voltage generating unit; 150-a frequency generation unit; 160-a control unit; 170-a wake-up unit; 180-a first switching unit; 190-an over-discharge voltage protection unit; 191-a comparator; 192-a second timing unit; 410-a temperature protection unit; 420-a pulse counting unit; 430-a first timing unit; 440-a second switching unit; r1 — first resistance; r2 — second resistance; r3 — third resistance; c-capacitance; t1 — a second predetermined period of time; t2-third predetermined period of time.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The terms "comprising" and "having," and any variations thereof, as appearing in the specification, claims and drawings of this application, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or modules is not limited to the listed steps or elements but may alternatively include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus. Furthermore, the terms "first," "second," and "third," etc. are used to distinguish between different objects and are not used to describe a particular order.

The embodiment of the application provides an electronic device, and the electronic device is a bluetooth headset, a mobile phone, a tablet computer and the like. Referring to fig. 1, the electronic device includes a battery assembly and a system circuit 200, the system circuit 200 is a circuit composed of a microprocessor, a camera driving circuit, an image processor, and the like, the system circuit 200 is electrically connected to the battery assembly, and the battery assembly is used for supplying power to the system circuit 200. The battery assembly includes a battery 300 and a system-on-chip 100, the system-on-chip 100 is electrically connected to the positive and negative electrodes of the battery 300, the system circuit 200 is electrically connected to the system-on-chip 100, the battery 300 supplies power to the system-on-chip 100, and the system-on-chip 100 plays a role in protection, for example, when the battery 300 is overcharged or overdischarged, since how the system-on-chip 100 protects the battery 300 from overcharge and overdischarge is a common technical measure in the art, it is not described herein again. In the present embodiment, the number of the battery 300 is one or more, and when the number of the battery 300 is plural, the plural batteries 300 may be connected in parallel or in series or in parallel, and may be mixed, the battery 300 is preferably a lithium battery 300, the capacity of the battery 300 is 10mAH to 80mAH, for example, 10mAH, 20mAH, 30mAH, 40mAH, 50mAH, 60mAH, 70mAH, and 80mAH, the size of the battery 300 with such a capacity is smaller, and preferably, the capacity of the battery 300 is 20mAH to 40mAH, and then the size of the battery 300 is smaller, and the battery can be conveniently configured in a small electronic device, for example, a bluetooth headset. Furthermore, since the capacity of the battery 300 is so small, how the amount of electricity of the battery 300 is maintained for a long time becomes an important issue. In this embodiment, a System On Chip (SOC) 100 is a technology commonly used in the field of integrated circuits, and is intended to combine a plurality of integrated circuits with specific functions on one Chip to form a System or product, which includes a finished hardware System and embedded software carried by the hardware System. The system-on-chip 100 has significant advantages in performance, cost, power consumption, reliability, and life cycle and range of use. In addition, in other embodiments of the present application, referring to fig. 2, a second resistor R2 and a capacitor C are further disposed between the battery 300 and the system-on-chip 100, and the second resistor R2 and the capacitor C are disposed for filtering. In addition, in other embodiments of the present application, other circuits or electronic elements may be disposed between the battery 300 and the system-on-chip 100.

In this embodiment, referring to fig. 1 and fig. 3 in combination, the system on chip 100 includes a power supply pin VDD, a power ground pin GND, an overcharge protection unit 110, an overdischarge protection unit 190, a discharge overcurrent protection unit 130, a reference voltage generation unit 140, a frequency generation unit 150, a control unit 160, a wake-up unit 170, and a first switch unit 180.

In this embodiment, the power supply pin VDD and the power ground pin GND are respectively used for electrically connecting with the positive electrode and the negative electrode of the battery 300, so that the battery 300 can supply power to the system-on-chip 100, and meanwhile, the battery 300 forms a loop through the system-on-chip 100 and the system circuit 200 to supply power to the system circuit 200.

In the embodiment, the overcharge voltage protection unit 110 is used to protect the battery 300 when detecting that the charge voltage is too high during the charging process of the battery 300, for example, stopping charging the battery 300, and so on, so as to prevent the battery 300 from being damaged or causing safety problems.

In the embodiment, the over-discharge voltage protection unit 190 is used for protecting the battery 300 when detecting that the discharge voltage is too low during the discharge process of the battery 300, for example, controlling the battery 300 to discharge only minimally, and generally stopping supplying power to the system circuit 200 and stopping supplying power to circuits of the system on chip 100 except for the charge detection circuit, so as to prevent the battery 300 from being permanently damaged due to over-discharge of the battery 300.

In the embodiment, the discharge overcurrent protection unit 130 is used for protecting the battery 300 when detecting that the discharge current is too large during the discharge of the battery 300, for example, the battery 300 stops discharging, and the like, so as to prevent the battery 300 from being permanently damaged or causing a safety problem due to the too large discharge current. In the present embodiment, the discharge overcurrent protection unit 130 includes a plurality of sub-units, each of which is electrically connected to the control unit 160, and each of which is used for processing different discharge currents, and three sub-units are provided in the figure.

In the present embodiment, the reference voltage generating unit 140 is configured to generate a reference voltage required by the system on chip 100, the frequency generating unit 150 is configured to generate different frequencies, and the control unit 160 is electrically connected to the overcharge voltage protecting unit 110, the overdischarge voltage protecting unit 190, the discharge overcurrent protecting unit 130, the reference voltage generating unit 140, the frequency generating unit 150, the wake-up unit 170, the first switch unit 180, and the like. In this embodiment, the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the reference voltage generation unit 140, the frequency generation unit 150, and the control unit 160 are conventional circuits in the art, and are not described herein again.

In this embodiment, the wake-up unit 170 is a charging detection unit for detecting whether the electronic device is connected to a power supply through a charger to charge the battery 300, and when the electronic device is connected to the power supply through the charger, the charging detection unit detects a charging signal to charge the battery 300; if the over-discharge voltage protection unit 190 protects the battery 300 and the charging detection unit detects the charging signal, the over-discharge voltage protection of the battery 300 is exited, that is, the system circuit 200 is powered and the system on chip 100 is normally powered.

In this embodiment, the first switch unit 180 includes a switch transistor and a substrate control circuit, the switch transistor is an MOS transistor, a control end of the switch transistor is electrically connected to the control unit 160, the substrate control circuit is electrically connected to the control unit 160, and the substrate control circuit is configured to implement correct bias of a substrate of the switch transistor. However, the present application is not limited thereto, and in other embodiments of the present application, the first switch unit 180 may further include a charge switch and a discharge switch, where the charge switch and the discharge switch are both MOS transistors, and the charge switch and the discharge switch are respectively electrically connected to the control unit 160. In addition, in other embodiments of the present application, the first switch unit 180 may also be implemented in other forms, such as only one switch tube. In this embodiment, the first switch unit 180 is used to control the battery 300 to supply power to the system circuit 200, and specifically, the battery 300, the system circuit 200, and the first switch unit 180 of the system on chip 100 form a loop to supply power to the system on chip 100. Specifically, the control terminal of the first switch unit 180 is electrically connected to the control unit 160, the input terminal of the first switch unit 180 is electrically connected to the battery 300, for example, electrically connected to the power ground pin GND of the system-on-chip 100, and the output terminal of the first switch unit 180 is electrically connected to the system circuit 200, so that the battery 300, the system circuit 200, and the first switch unit 180 form a power supply loop, and the system-on-chip 100 can control whether the battery 300 supplies power to the system circuit 200 by controlling the first switch unit 180.

In this embodiment, the system-on-chip 100 further includes a shipping pin CTL, where the shipping pin CTL is a new pin of the system-on-chip 100, the system-on-chip 100 enters a shipping mode when the shipping pin CTL receives the first signal, the first switch unit 180 is turned off in the shipping mode so that the battery 300 stops supplying power to the system circuit 200, and at least some units of the system-on-chip 100 are stopped supplying power. In this embodiment, the generation of the first signal may be implemented by software, or may be implemented by hardware, and when the generation is implemented by hardware, the generation may be implemented by, for example, a power key of the electronic device, for example, by long pressing the power key.

In this embodiment, the wake-up unit 170 continues to be powered by the battery 300 while in the shipping mode, and the wake-up unit 170 is used to cause the system-on-chip 100 to exit the shipping mode. In this embodiment, the wake-up unit 170 is a charging detection circuit, which is originally a circuit of the system-on-chip 100, so that the design can save the cost. In this embodiment, when the electronic device is charged, the charging detection circuit detects the charging signal, and the system-on-chip 100 automatically exits the shipping mode, so that the electronic device can be normally powered on for use because the power of the battery 300 can be maintained for a long time. In addition, in other embodiments of the present application, the wake-up unit 170 may not be a charge detection circuit, but may also be another additional hardware circuit dedicated to enabling the system-on-chip 100 to exit the shipping mode, and those skilled in the art may perform circuit design according to specific requirements.

In this embodiment, when the electronic device needs to be transported for a long distance or stored for a long time, the system-on-chip 100 of the electronic device may enter a shipping mode, in which the first switch unit 180 is turned off, so that the battery 300 cannot supply power to the system circuit 200, and the power of the battery 300 may be greatly saved, and in the shipping mode, at least a part of the units of the system-on-chip 100 is stopped to supply power, so that the battery 300 only needs to supply power to a few circuit units, such as the wake-up unit 170 of the system-on-chip 100, and the power consumption of the battery 300 is further reduced, which may reduce the current consumption of the electronic device, and the current consumption may be as low as several nA/h, thereby increasing the power retention time of the battery 300, even if the capacity of the battery 300 itself is relatively small, the power of the battery 300 may be retained for half a year to one year in the shipping mode, when the user takes the electronic device, the user only needs to operate the wake-up unit 170 to enable the system-on-chip 100 to exit the shipping mode, and the electronic device can be normally used when being started, so that the user experience is improved, and the user is prevented from mistakenly thinking that the electronic device is problematic.

In the present embodiment, at least some of the units of the system-on-chip 100 are powered off in the shipping mode. In the present embodiment, at least one of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140, and the frequency generation unit 150 of the system-on-chip 100 is stopped from being supplied with power, for example, one of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140, and the frequency generation unit 150 is stopped from being supplied with power in the ship mode, or two of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140, and the frequency generation unit 150 are stopped from being supplied with power in the ship mode, or the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the frequency generation unit 150 are stopped from being supplied, Three of the control unit 160, the reference voltage generating unit 140, and the frequency generating unit 150 are stopped from supplying power, …, or the overcharge voltage protecting unit 110, the overdischarge voltage protecting unit 190, the discharge overcurrent protecting unit 130, the control unit 160, the reference voltage generating unit 140, and the frequency generating unit 150 are all stopped from supplying power in the shipping mode, at which time the consumption of the power of the battery 300 can be further reduced. In addition, in other embodiments of the present application, the system-on-chip 100 further includes a temperature protection unit 410, a charging overcurrent protection unit 120, and the like, and the temperature protection unit 410 and the charging overcurrent protection unit 120 may not be powered or may be powered in the shipping mode, which is also within the scope of the present invention. In this embodiment, when the system-on-chip 100 enters the shipping mode, all circuits of the system-on-chip 100 except the wake-up unit 170 are powered off, that is, except the wake-up unit 170 required by the system-on-chip 100 to exit the shipping mode is powered, other circuit units of the system-on-chip 100 are not powered, so that the power of the battery 300 can be further saved, the power consumption of the battery 300 is reduced, the power retention time of the battery 300 is further prolonged, and especially the power retention time of the battery 300 with small capacity can be prolonged.

In this embodiment, the shipping control signal is generated by the system-on-chip 100 to enter the shipping mode when the shipping pin CTL receives the first signal. However, the present application is not limited thereto, and in other embodiments of the present application, the system-on-chip 100 may directly enter the shipping mode when the shipping pin CTL receives the first signal.

In this embodiment, the first signal is a digital code signal, the code signal is pre-agreed at the design time of the system-on-chip and the system circuit, and when the shipping pin receives the code signal, the system-on-chip generates the shipping control signal to enter the shipping mode. For example, the first signal includes two periods of time: the first time period is a high level signal, the second time period is a pulse signal with a predetermined number, where the high level signal is used to trigger an element corresponding to the system-on-chip to activate, for example, to tell the element corresponding to the system-on-chip to prepare for timing or counting, and then the element corresponding to the system-on-chip counts or clocks the received pulse signal (for example, different pulse durations are different), when the number of pulses meets a preset requirement, the system-on-chip generates a shipping control signal, and when the number of pulses does not meet the preset requirement, the element corresponding to the system-on-chip returns to a state where activation is not performed. The first signal is a coded signal of a protocol of the system-on-chip and the system circuit, so that the specific form of the first signal is not limited, complex coding or simple coding can be adopted, and the system-on-chip and the system circuit can be identified by the protocol of the system-on-chip. In addition, when the first signal is complex, the system on chip is reliable and safe, and can prevent false triggering.

In this embodiment, there are three ways to trigger the system-on-chip 100 to generate the shipping control signal when the shipping pin CTL receives the first signal, which are described below. Of course, the way that the shipping pin CTL triggers the system-on-chip 100 to generate the shipping control signal when receiving the first signal is not limited to the following three, and in other embodiments of the present application, a person skilled in the art may also set other conventional circuits to trigger the system-on-chip 100 to generate the shipping control signal.

1. In an embodiment of the present application, referring to fig. 4 and 5, the first signal includes a pulse signal, and the system on chip 100 further includes a pulse counting unit 420 and a third resistor R3. Here, the shipping pin CTL defaults to a low level, which is realized by grounding the shipping pin CTL via the third resistor R3 in this embodiment, the pulse counting unit 420 outputs a low level signal under normal conditions, and the shipping pin CTL is electrically connected to the pulse counting unit 420. When the shipping pin CTL receives the first signal, the pulse counting unit 420 counts pulses, the pulse counting unit 420 counts by rising edge trigger, when the number of pulses received by the pulse counting unit 420 in a first predetermined time period is greater than or equal to a first predetermined number, the output signal of the pulse counting unit 420 is changed from a low level to a high level, the high level at this time is the shipping control signal, wherein the first predetermined time period and the first predetermined number are preset by the system-on-chip 100, the first predetermined time period is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, and the like, and the first predetermined number is, for example, 3, 4, 5, and the like, which is designed to prevent false triggering. In the present embodiment, the output terminals of the pulse counting unit 420 are electrically connected to the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the reference voltage generation unit 140, the frequency generation unit 150, the control unit 160, and other units that need to be powered off, respectively, so as to stop the power supply of the units of the system-on-chip 100 except the wake-up unit 170. In addition, in other embodiments of the present application, the output terminal of the pulse counting unit 420 outputs a high level under normal conditions, and the low level is a shipping control signal. In the present embodiment, the pulse counting unit 420 is provided separately from the control unit 160. In addition, in other embodiments of the present application, the pulse counting unit 420 may also be integrated into the control unit 160.

2. In an embodiment of the present application, referring to fig. 6 and 7, the first signal includes a continuous high signal or a continuous low signal, and the system on chip 100 further includes a first timing unit 430 and a third resistor R3. Here, the shipping pin CTL defaults to a low level, which is realized by grounding the shipping pin CTL via the third resistor R3 in this embodiment, the first timing unit 430 outputs a low level signal under normal conditions, and the shipping pin CTL is electrically connected to the first timing unit 430. When the shipping pin CTL receives the first signal as a high level signal, that is, when the signal received by the shipping pin CTL changes from a low level to a high level, the first timing unit 430 triggers timing, the first timing unit 430 performs timing by rising edge triggering, when the duration of the high level signal received by the first timing unit 430 is greater than or equal to a second predetermined time period T1, the first timing unit 430 outputs a signal that changes from a low level to a high level, and the high level signal at this time is the shipping control signal, where the second predetermined time period T1 is preset by the system-on-chip 100, and the second predetermined time period T1 is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, and the like, and thus the design can prevent false triggering. In the present embodiment, the output terminals of the first timing unit 430 are respectively electrically connected to the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the reference voltage generation unit 140, the frequency generation unit 150, the control unit 160, and other units that need to be powered off, so as to stop the power supply of the units of the system-on-chip 100 except the wake-up unit 170. In addition, in other embodiments of the present application, the output terminal of the first timing unit 430 outputs a high-level signal under normal conditions, and the low-level signal is a shipping control signal. In the present embodiment, the first timing unit 430 is provided separately from the control unit 160. In addition, in other embodiments of the present application, the first timing unit 430 may also be integrated into the control unit 160.

3. Referring to fig. 3, in general, in the conventional system-on-chip 100 or battery 300 protection circuit, when the battery 300 is deeply discharged, when the conventional system-on-chip 100 or battery 300 protection circuit detects the deep discharge of the battery 300 through the over-discharge voltage protection unit 190, the over-discharge voltage protection unit 190 sends a signal to the control unit 160, the control unit 160 passively controls the first switch unit 180 to be turned off, and passively controls the system-on-chip 100 or battery 300 protection circuit except for the charge detection unit to be stopped supplying power for protecting the battery 300, so as to prevent the battery 300 from being damaged due to the over-discharge until the system-on-chip 100 or battery 300 protection circuit resumes supplying power after the charge detection unit detects the charge signal, and the first switch unit 180 is turned off to resume supplying power to the system circuit 200. In an embodiment of the present application, the original circuits and functions of the over-discharge voltage protection unit 190 in the prior art are fully utilized to actively control the first switch unit 180 to be turned off, and actively control the system-on-chip 100 except for the charge detection unit to be powered off, so that the cost can be reduced. Specifically, referring to fig. 8-10, the over-discharge voltage protection unit 190 includes a comparator 191 and a second timing unit 192, the comparator 191 has a common terminal and two opposite terminals, the two opposite terminals are a first opposite terminal and a second opposite terminal respectively, an output terminal of the comparator 191 is electrically connected to the second timing unit, the common terminal of the comparator 191 is connected to a reference voltage, and the first opposite terminal of the comparator 191 is electrically connected to an output voltage detection point of the battery 300 for detecting whether the battery 300 is deeply discharged. The first signal includes a continuous high-level signal, the system-on-chip 100 further includes a second switch unit 440 and a first resistor R1, a control terminal of the second switch unit 440 is electrically connected to the ship pin CTL, an input terminal of the second switch unit 440 is grounded, an output terminal of the second switch unit 440 is electrically connected to one terminal of the first resistor R1, the other terminal of the first resistor R1 is connected to a high level, and an output terminal of the second switch unit 440 is further electrically connected to a second inverting terminal of the comparator 191 of the over-discharge voltage protection unit 190, wherein the low levels of the first inverting terminal and the second inverting terminal have higher priorities, that is, when one of the first inverting terminal or the second inverting terminal is a low level, the inverting terminal of the comparator 191 is a low level. In this embodiment, when the shipping pin CTL receives the first signal, the second switch unit 440 is turned on, the second inverting terminal of the comparator 191 is grounded, the inverting terminal of the comparator 191 is at a low level, so that the comparator 191 outputs a high level, and the second timing unit 192 triggers generation of the shipping control signal when the duration of the received high level is greater than or equal to a third predetermined time period T2, where the shipping control signal is a high level signal. Thereby controlling the first switching unit 180 to be turned off and controlling the system-on-chip 100 except the charge detection unit to be stopped from being powered by using the existing over-discharge voltage protection unit 190. The third predetermined time period T2 is preset by the system-on-chip 100, and the third predetermined time period T2 is, for example, 10 seconds, 5 seconds, 3 seconds, etc., so that the design can prevent false triggering. In this embodiment, the second switching unit 440 is an NMOS transistor. However, the present application is not limited thereto, and in other embodiments of the present application, the second switching unit 440 may also be a PMOS transistor, in which case the first signal includes a continuous low signal.

In this embodiment, referring to fig. 1 and fig. 3 in combination, the system on chip 100 further includes a system ground pin VM, the system ground pin VM is used for electrically connecting to the system circuit 200, and the system ground pin VM is also used for charging. In the present embodiment, the first switching unit 180 is disposed between the system ground pin VM and the power ground pin GND.

It should be understood that reference to "a plurality" herein means two or more. Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.

It should be noted that, in the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.

The above disclosure is only for the purpose of illustrating the preferred embodiments of the present application and is not to be construed as limiting the scope of the present application, so that the present application is not limited thereto, and all equivalent variations and modifications can be made to the present application.

Claims

1. A system on a chip, comprising: the power supply circuit comprises a power supply pin, a power grounding pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit and a first switch unit, wherein the power supply pin and the power grounding pin are respectively used for being electrically connected with a battery, and the first switch unit is used for controlling the battery to supply power to a system circuit;

2. The system-on-chip of claim 1, wherein the shipping pin, when receiving the first signal, triggers the system-on-chip to generate a shipping control signal to enter a shipping mode.

3. The system on a chip of claim 2, wherein the first signal is an encoded signal that the system on chip is in protocol with system circuitry.

4. The system-on-chip of claim 3, wherein the first signal comprises a pulse signal, the system-on-chip further comprising a pulse counting unit electrically coupled to the shipping pin, the pulse counting unit triggering generation of a shipping control signal when a number of pulses received by the pulse counting unit within a first predetermined time period is greater than or equal to a first predetermined number.

5. The system-on-chip of claim 3, wherein the first signal comprises a continuous high signal or a continuous low signal, the system-on-chip further comprising a first timing unit electrically coupled to the shipping pin that triggers generation of the shipping control signal when the high signal or the low signal received by the first timing unit has a duration greater than or equal to a second predetermined time period.

6. The system on chip of claim 3, wherein the over-discharge voltage protection unit comprises a comparator and a second timing unit, an output terminal of the comparator is electrically connected to the second timer, the first signal is a continuous high-level signal or a continuous low-level signal, the system on chip further comprises a second switch unit and a first resistor, a control terminal of the second switch unit is electrically connected to the shipping pin, an input terminal of the second switch unit is grounded, an output terminal of the second switch unit is electrically connected to one terminal of the first resistor, the other terminal of the first resistor is at a high level, an output terminal of the second switch unit is further electrically connected to an inverted terminal of the comparator of the over-discharge voltage protection unit, an output terminal of the comparator is electrically connected to the second timing unit, and the second switch unit is turned on when the shipping pin receives the first signal, and when the high level duration received by the second timing unit is greater than or equal to a third preset time period, the ship control signal is triggered and generated.

7. The system on chip of any of claims 1-6, wherein the wake-up unit is a charge detection unit.

8. The system-on-chip of claim 7, wherein the system-on-chip exits shipping mode when a charge detection unit detects a charge signal.

9. The system on a chip of any one of claims 1-6, wherein at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit, and the frequency generation unit is powered down.

10. The system on a chip of claim 9, wherein circuitry of the system on a chip other than the wake-up unit is powered down when the system on a chip enters a ship mode.

11. The system on chip of any of claims 1-6, wherein the first switching unit comprises a MOS transistor.

12. A battery assembly, comprising:

a battery;

the system-on-chip of any one of claims 1-11, wherein a power supply pin and a power ground pin of the system-on-chip are electrically connected to a battery, respectively.

13. The battery assembly of claim 12, wherein the battery has a capacity of 10mAH to 80 mAH.

14. An electronic device, comprising:

the battery module according to claim 12 or 13;

15. The electronic device of claim 14, wherein the electronic device is a bluetooth headset.