WO2022042708A1

WO2022042708A1 - System-on-chip, battery assembly, electronic device, battery protection circuit, test subsystem, test system, bluetooth earphone, shipping mode setting method, and computer readable storage medium

Info

Publication number: WO2022042708A1
Application number: PCT/CN2021/115169
Authority: WO
Inventors: 宋利军; 宋朋亮; 徐丹蓉
Original assignee: 西安稳先半导体科技有限责任公司
Priority date: 2020-08-27
Filing date: 2021-08-27
Publication date: 2022-03-03

Abstract

The present application provides a system-on-chip, comprising: a power supply pin, a power grounding pin, an over-charge voltage protection unit, an over-discharge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit, and a first switch unit. The system-on-chip further comprises a shipping pin. When the shipping pin receives a first signal, the system-on-chip enters a shipping mode; in the shipping mode, the first switch unit is turned off so that a battery stops supplying power to a system circuit, and at least part of the units of the system-on-chip are stopped from power supply; moreover, in the shipping mode, the wake-up unit is supplied with power, and the wake-up unit is used for causing the system-on-chip to exit the shipping mode. The present application further provides a battery assembly and an electronic device. The present application has the following advantages: current consumption of the battery in the transportation and storage process can be reduced, the electric quantity retention time of the battery is prolonged, and user experience is improved.

Description

A system-on-chip, battery assembly, electronic device, battery protection circuit, test subsystem, test system, Bluetooth headset, shipping mode setting method, and computer-readable storage medium

technical field

The present application relates to the field of battery technology, and in particular, to a system-on-chip, a battery assembly, an electronic device, a battery protection circuit, a test subsystem, a test system, a Bluetooth headset, a shipping mode setting method, and a computer-readable storage medium.

Background technique

Battery components are widely used in electronic devices, such as Bluetooth headsets, mobile phones, tablet computers, etc., to provide a more flexible use environment for electronic devices without being limited by the range of sockets and power supply cables. Generally speaking, a battery assembly includes a bare cell, a battery protection circuit electrically connected to the bare cell to prevent overcharging or overdischarging of the bare cell.

After the electronic device with battery assembly is manufactured at the production site, the battery assembly is charged with a preset amount of power and the electronic device is turned off, and then transported and stored for a long time, and finally when the end user gets the electronic device for the first time. Due to long-term transportation and storage, the electronic device may be completely discharged due to internal current consumption. Therefore, the end user must charge the electronic device to restore the power before the first use, resulting in poor user experience.

SUMMARY OF THE INVENTION

The technical problem to be solved by the embodiments of the present application is to provide a system-on-chip, a battery assembly, and an electronic device. It can reduce the current consumption of the battery during transportation and storage, improve the battery retention time, and improve the user experience.

In order to solve the above technical problem, a first aspect of the embodiments of the present application provides a system-on-chip, including: a power supply pin, a power ground pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge and overcurrent protection unit, A reference voltage generation unit, a frequency generation unit, a control unit, a wake-up unit, and a first switch unit, wherein the power supply pin and the power ground pin are respectively used for electrical connection with the battery, and the first switch unit is used for controlling The battery supplies power to the system circuit;

Wherein, the system-on-chip further includes a shipping pin, when the shipping pin receives a first signal, the system-on-chip enters a shipping mode, and in the shipping mode, the first switch unit is turned off to stop the battery Power is supplied to the system circuit and at least some units of the system-on-chip are powered off, and the wake-up unit is powered when in the shipping mode, and the wake-up unit is used to exit the system-on-chip from the shipping mode.

Optionally, when the shipping pin receives the first signal, the system-on-chip is triggered to generate a shipping control signal to enter the shipping mode.

Optionally, the first signal is an encoded signal that is agreed between the system on chip and the system circuit.

Optionally, the first signal includes a pulse signal, and the system-on-chip further includes a pulse counting unit, the pulse counting unit is electrically connected to the shipping pin, when the pulse counting unit receives the pulse signal within a first predetermined period of time. When the number of received pulses is greater than or equal to the first predetermined number, a shipping control signal is triggered.

Optionally, the first signal is a continuous high-level signal or a continuous low-level signal, the system-on-chip further includes a first timing unit, and the first timing unit is electrically connected to the shipping pin , when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to the second predetermined time period, triggering the generation of the shipping control signal.

Optionally, the over-discharge voltage protection unit includes a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, and the first signal is a continuous high-level signal or a continuous high-level signal. a low-level signal, the system-on-chip further includes a second switch unit and a first resistor, the control end of the second switch unit is electrically connected to the shipping pin, and the input end of the second switch unit is grounded, The output end of the second switch unit is electrically connected to one end of the first resistor, the other end of the first resistor is connected to a high level, and the output end of the second switch unit is also connected to the overdischarge voltage protection unit. The reverse terminal of the comparator is electrically connected, and the output terminal of the comparator is electrically connected to the second timing unit. When the shipping pin is connected to the first signal, the second switch unit is turned on, and the second switch unit is turned on. The generation of the shipping control signal is triggered when the duration of the high level received by the timing unit is greater than or equal to the third predetermined time period.

Optionally, the wake-up unit is a charge detection unit.

Optionally, when the charging detection unit detects a charging signal, the system-on-chip exits the shipping mode.

Optionally, at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit is powered off.

Optionally, when the system-on-chip enters the shipping mode, all circuits of the system-on-chip except the wake-up unit are powered off.

Optionally, the first switch unit includes a MOS transistor.

A second aspect of the embodiments of the present application provides a battery assembly, including:

Battery;

In the above system-on-chip, wherein the power supply pin and the power ground pin of the system-on-chip are respectively electrically connected to the battery.

Optionally, the capacity of the battery is 10mAH-80mAH.

A third aspect of the embodiments of the present application provides an electronic device, including:

The above-mentioned battery assembly;

a system circuit, wherein the battery supplies power to the system circuit via the system-on-chip control.

Optionally, the electronic device is a Bluetooth headset.

A fourth aspect of the embodiments of the present application provides a system-on-chip, including: a power supply pin, a power supply ground pin, an overdischarge voltage protection unit, a control unit, a wake-up unit, and a first switch unit, wherein the power supply lead The pin and the power ground pin are respectively used for electrical connection with the battery, and the first switch unit is used for controlling the battery to supply power to the system circuit;

Wherein, the power supply pin is also used for electrical connection with the shipping outlet of the system circuit. When the voltage signal received by the power supply pin changes due to the change of the shipping output signal, the system-on-chip Entering a shipping mode, in which the first switch unit is turned off to stop the battery from supplying power to the system circuit and at least part of the system-on-chip units are powered off, and in the shipping mode the wake-up unit is powered , the wake-up unit is used to make the system-on-chip exit the shipping mode.

Optionally, when the number of pulses received by the power supply pin within a predetermined period of time is greater than or equal to a first predetermined number, the system-on-chip enters the shipping mode.

Optionally, the system-on-chip further includes a pulse counting unit, which is electrically connected to the power supply pin, and when the pulse counting unit confirms the number of pulses received by the power supply pin within a predetermined period of time. The system-on-chip enters the shipping mode when the number is greater than or equal to the first predetermined number.

Optionally, the over-discharge voltage protection unit includes a comparator, the system-on-chip further includes a third switch unit and a third resistor, and the control terminal of the third switch unit is electrically connected to the output terminal of the pulse counting unit. , the input end of the third switch unit is grounded, the output end of the third switch unit is electrically connected to one end of the third resistor, the other end of the third resistor is connected to a high level, and the output end of the third switch unit is electrically connected to one end of the third resistor. The output terminal is also electrically connected to the reverse terminal of the comparator, and when the pulse counting unit confirms that the number of pulses received by the power supply pin within a predetermined period of time is greater than or equal to the first predetermined number, a control signal is output to make all The third switch unit is turned on, the output signal of the comparator is changed to control the system on chip to enter the shipping mode, and in the shipping mode, all units of the system on chip except the wake-up unit are powered off.

Optionally, the system-on-chip enters the shipping mode when the voltage signal received by the power supply pin is lower than a preset threshold voltage due to the voltage division of the branch where the shipping outlet is located.

Optionally, the over-discharge voltage protection unit is electrically connected to the power supply pin, and when the voltage signal of the power supply pin is lower than the threshold voltage, the discharge protection unit controls the system-on-chip to enter the shipping mode, and is in shipping mode. In the mode, the first switch unit is turned off, and all units of the system-on-chip except the wake-up unit are powered off.

Optionally, the wake-up unit is a charge detection unit.

Optionally, the system-on-chip further includes an overcharge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, and a frequency generation unit. In the shipping mode, the overcharge voltage protection unit, the overdischarge voltage protection unit, At least one of the discharge overcurrent protection unit, the control unit, the reference voltage generating unit and the frequency generating unit is stopped from supplying power.

Optionally, in the shipping mode, all units of the system-on-chip except the wake-up unit are powered off.

Optionally, the first switch unit includes a MOS transistor.

A fifth aspect of the embodiments of the present application provides a battery assembly, including:

Battery;

Optionally, the capacity of the battery is 10mAH-80mAH.

A sixth aspect of the embodiments of the present application provides an electronic device, including:

The above-mentioned battery assembly;

Optionally, the electronic device is a Bluetooth headset.

Optionally, the shipping output terminal of the system circuit is electrically connected to the power supply pin of the system-on-chip via a second resistor, and the shipping output terminal is in the middle of outputting a signal that causes the system-on-chip to enter the shipping mode. Outside the time is high resistance state.

A seventh aspect of an embodiment of the present application provides a battery protection circuit, including: a power supply terminal, a power ground terminal, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, and a frequency generation unit. a unit, a control unit, and a first switch unit, wherein the power supply terminal and the power ground terminal are respectively used for electrical connection with the battery, and the first switch unit is used to control the battery to supply power to the system circuit;

Wherein, the battery protection circuit further includes a shipping input terminal, when the shipping input terminal receives the first signal, the battery protection circuit enters the shipping mode, and at least some units of the battery protection circuit are stopped in the shipping mode powered by.

Optionally, in the shipping mode, the first switch unit is turned off to stop the battery from supplying power to the system circuit.

Optionally, the battery protection circuit further includes a wake-up unit, the wake-up unit is powered in the shipping mode, and the wake-up unit is configured to make the battery protection circuit exit the shipping mode.

Optionally, when the shipping input terminal receives the first signal, the battery protection circuit is triggered to generate a shipping control signal to enter the shipping mode.

Optionally, the first signal is an encoded signal that the battery protection circuit and the system circuit perform an agreement on.

Optionally, the first signal includes a pulse signal, the battery protection circuit further includes a pulse counting unit, the pulse counting unit is electrically connected to the shipping input end, when the pulse counting unit is within a first predetermined time period When the number of received pulses is greater than or equal to the first predetermined number, the generation of the shipping control signal is triggered.

Optionally, the first signal includes a continuous high-level signal or a continuous low-level signal, the battery protection circuit further includes a first timing unit, and the first timing unit is electrically connected to the shipping input terminal. connected, when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to the second predetermined time period, triggering the generation of a shipping control signal.

Optionally, the over-discharge voltage protection unit includes a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, and the first signal is a continuous high-level signal or a continuous high-level signal. a low-level signal, the battery protection circuit further includes a second switch unit and a first resistor, the control end of the second switch unit is electrically connected to the shipping pin, and the input end of the second switch unit is grounded , the output end of the second switch unit is electrically connected to one end of the first resistor, the other end of the first resistor is connected to a high level, and the output end of the second switch unit is also connected to the overdischarge voltage protection unit The reverse end of the comparator is electrically connected, and the output end of the comparator is electrically connected to the second timing unit. When the shipping pin is connected to the first signal, the second switch unit is turned on, and the second switch unit is turned on. When the duration of the high level received by the second timing unit is greater than or equal to the third predetermined time period, the shipping control signal is triggered.

Optionally, the wake-up unit is a charge detection unit.

Optionally, when the charging detection unit detects a charging signal, the battery protection circuit exits the shipping mode.

Optionally, when the battery protection circuit enters the shipping mode, all circuits of the battery protection circuit except the wake-up unit are stopped from supplying power.

Optionally, the first switch unit includes a MOS transistor.

Optionally, the battery protection circuit is implemented on the same chip, or all units of the battery protection circuit except the first switch unit are implemented on the same chip.

An eighth aspect of the embodiments of the present application provides a battery assembly, including:

Battery;

In the above-mentioned battery protection circuit, the power supply terminal and the power ground terminal of the battery protection circuit are respectively electrically connected to the battery.

Optionally, the capacity of the battery is 10mAH-80mAH.

A ninth aspect of the embodiments of the present application provides an electronic device, including:

The above-mentioned battery assembly;

A system circuit, wherein the battery is controlled to supply power to the system circuit via the battery protection circuit.

A tenth aspect of an embodiment of the present application provides a system-on-chip, including: a power supply pin, a power ground pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency A generation unit, a control unit, a wake-up unit, and a control pin, wherein the power supply pin and the power ground pin are respectively used for electrical connection with the battery, and the control pin is used to control the first switch unit, and the third A switch unit is used to control the battery to supply power to the system circuit;

Wherein, the system-on-chip further includes a shipping pin, when the shipping pin receives the first signal, the system-on-chip enters the shipping mode, and the system-on-chip output is used to turn off the first switch in the shipping mode The control signal of the unit is given to the control pin to make the battery stop supplying power to the system circuit and at least part of the system-on-chip units are stopped, and the wake-up unit is powered in the shipping mode, and the wake-up unit is used to make the The SoC exits shipping mode.

Optionally, the first signal includes a continuous high-level signal or a continuous low-level signal, the system-on-chip further includes a first timing unit, and the first timing unit is electrically connected to the shipping pin. , when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to the second predetermined time period, triggering the generation of the shipping control signal.

Optionally, the wake-up unit is a charge detection unit.

Optionally, the first switch unit includes a MOS transistor.

An eleventh aspect of the embodiments of the present application provides a battery assembly, including:

Battery;

The above-mentioned system-on-chip, wherein the power supply pin and the power supply ground pin of the system-on-chip are respectively electrically connected to the battery;

The first switch unit is electrically connected to the control pin of the system-on-chip, the input end of the first switch unit is electrically connected to the battery, and the output end of the first switch unit is used for electrical connection with the system circuit.

Optionally, the capacity of the battery is 10mAH-80mAH.

A twelfth aspect of the embodiments of the present application provides an electronic device, including:

The above-mentioned battery assembly;

Optionally, the electronic device is a Bluetooth headset.

A thirteenth aspect of an embodiment of the present application provides a system-on-chip, including: a power supply pin, a power ground pin, an overdischarge voltage protection unit, a control unit, a wake-up unit, and a control pin, wherein the power supply lead The pin and the power ground pin are respectively used for electrical connection with the battery, the control pin is used to control the first switch unit, and the first switch unit is used to control the battery to supply power to the system circuit;

Wherein, the power supply pin is also used for electrical connection with the shipping outlet of the system circuit. When the voltage signal received by the power supply pin changes due to the change of the shipping output signal, the system-on-chip Entering the shipping mode, in the shipping mode, the system-on-chip outputs a control signal for turning off the first switch unit to the control pin, so that the battery stops supplying power to the system circuit and at least some units of the system-on-chip are powered off, And in the shipping mode, the wake-up unit is powered, and the wake-up unit is used to make the system on chip exit the shipping mode.

Optionally, the system-on-chip also includes a pulse counting unit, which is electrically connected to the power supply pin, and when the pulse counting unit confirms the number of pulses received by the power supply pin within a predetermined period of time. The system-on-chip enters the shipping mode when the number is greater than or equal to the first predetermined number.

Optionally, the wake-up unit is a charge detection unit.

Optionally, the first switch unit includes a MOS transistor.

A fourteenth aspect of the embodiments of the present application provides a battery assembly, including:

Battery;

Optionally, the capacity of the battery is 10mAH-80mAH.

A fifteenth aspect of the embodiments of the present application provides an electronic device, including:

The above-mentioned battery assembly;

Optionally, the electronic device is a Bluetooth headset.

A sixteenth aspect of the embodiments of the present application provides a battery protection circuit, including: a power supply terminal, a power ground terminal, an overdischarge voltage protection unit, a control unit, a first resistor, a first switch unit, a first test solder joint, and The second test solder joint, wherein the power supply terminal and the power ground terminal are respectively used for electrical connection with the battery, the over-discharge voltage protection unit is electrically connected with the control unit, and the input terminal of the first resistor is electrically connected with the battery , the output end of the first resistor is electrically connected to the power supply end of the power supply, and the first switch unit is used to control the battery to supply power to the system circuit;

The first test pad is electrically connected to the power supply terminal, the second test pad is electrically grounded, and the first test pad and the second test pad are used for electrical connection with the test unit. When the test pad and the second test pad are used for electrical connection with the test unit, the first test pad and the second test pad are turned on, so that the voltage signal received by the power supply terminal is lower than the preset threshold voltage , so that the battery protection circuit enters a sleep mode, in which the first switch unit is turned off to stop the battery supplying power to the system circuit, and at least part of the battery protection circuit is stopped from supplying power.

Optionally, the battery protection circuit further includes a wake-up unit, the wake-up unit is powered in the sleep mode, and the wake-up unit is configured to make the battery protection circuit exit the sleep mode.

Optionally, the first test pad is directly electrically connected to the power supply terminal of the power supply; or a second resistance is set between the first test pad and the power supply terminal to be indirectly electrically connected.

Optionally, the second test pad is directly grounded; or a second resistance indirect electrical connection is set between the second test pad and the ground.

Optionally, the over-discharge voltage protection unit is electrically connected to the power supply terminal. When the voltage signal of the power supply terminal is lower than the threshold voltage, the discharge protection unit controls the battery protection circuit to enter the sleep mode. The first switch unit is turned off, and at least part of the battery protection circuit is stopped from supplying power.

Optionally, the wake-up unit is a charge detection unit. When the charging detection unit detects the charging signal, the battery protection circuit exits the sleep mode.

Optionally, the battery protection circuit further includes an overcharge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit and a frequency generation unit, wherein in the sleep mode, the overcharge voltage protection unit, the overdischarge voltage protection unit At least one of the unit, the discharge overcurrent protection unit, the control unit, the reference voltage generating unit and the frequency generating unit is powered off.

Optionally, when the battery protection circuit enters the sleep mode, all circuits of the battery protection circuit except the wake-up unit are stopped from supplying power.

Optionally, the first switch unit includes a MOS transistor.

A seventeenth aspect of the embodiments of the present application provides a battery assembly, including:

Battery;

Optionally, the capacity of the battery is 10mAH-80mAH.

An eighteenth aspect of the embodiments of the present application provides a testing subsystem, including:

The above-mentioned battery protection circuit;

The two ends of the test unit are used for electrical connection with the first test pad and the second test pad, when the two ends of the test unit are electrically connected with the first test pad and the second test pad. The first test pad and the second test pad are turned on, so that the voltage signal received by the power supply end of the battery protection circuit is lower than a preset threshold voltage, so that the battery protection circuit enters a sleep mode, In the sleep mode, the first switch unit is turned off to stop the battery from supplying power to the system circuit, and at least part of the battery protection circuit is stopped from supplying power.

Optionally, the test unit is a wire, and a second resistance is provided between the first test pad and the power supply terminal.

Optionally, the test unit is a wire, and a second resistance is set between the second test pad and the ground.

Optionally, the test unit is a wire and a second resistor, and a second resistor is set between the first test pad and the second test point.

A nineteenth aspect of the embodiments of the present application provides a testing system, including:

Battery,

In the above test subsystem, the power supply terminal and the power ground terminal of the battery protection circuit in the test subsystem are respectively electrically connected to the battery.

Optionally, the capacity of the battery is 10mAH-80mAH.

A twentieth aspect of an embodiment of the present application provides an electronic device, including:

The above-mentioned battery assembly;

A twenty-first aspect of the embodiments of the present application provides a Bluetooth headset, including:

system circuit;

Battery, its capacity is 10mAH-80mAH;

A battery protection circuit includes: a power supply terminal, a power ground terminal, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, and a first switch unit, Wherein, the power supply terminal and the power ground terminal are respectively electrically connected to the battery, and the first switch unit is used to control the battery to supply power to the system circuit;

The system circuit is electrically connected to the battery protection circuit, the battery protection circuit enters a shipping mode when the system circuit outputs a first signal to the battery protection circuit, and the first switch unit is disconnected in the shipping mode to stop the battery supplying power to the system circuits.

Optionally, the battery protection circuit includes a shipping input terminal, the shipping input terminal is electrically connected to the system circuit, and the system circuit outputs the first signal through the shipping input terminal.

Optionally, the battery protection circuit further includes a wake-up unit, at least some units of the battery protection circuit are powered off in the shipping mode, and the wake-up unit is powered on in the shipping mode, and the wake-up unit is used for Take the battery protection circuit out of shipping mode.

Optionally, the wake-up unit is a charge detection unit.

Optionally, when the battery protection circuit receives the first signal, the battery protection circuit is triggered to generate a shipping control signal to enter the shipping mode.

Optionally, the first switch unit includes a MOS transistor.

A twenty-second aspect of an embodiment of the present application provides a method for setting a shipping mode of an electronic device, the method comprising:

Receive the shipping instruction sent by the host computer to enter the shipping mode;

sending a shipping mode feedback command to the host computer;

Wherein, the shipping mode feedback command is a valid response command for successfully entering the shipping mode or an invalid response command for failing to enter the shipping mode.

Optionally, the electronic device includes a main control module and a battery protection module electrically connected to the main control module,

The step of receiving the shipping instruction to enter the shipping mode sent by the host computer specifically includes:

The main control module receives the shipping instruction to enter the shipping mode sent by the host computer;

The battery protection module receives the shipping instruction sent by the main control module;

The step of sending the shipping mode feedback command to the host computer specifically includes:

If the shipping confirmation signal sent by the battery protection module is received within a preset time, the main control module sends the valid response command to the upper computer;

If the shipping confirmation signal sent by the battery protection module is not received within a preset time, the main control module sends the failure response command to the upper computer.

Optionally, the electronic device is a tws earphone, the tws earphone includes an earphone body and an earphone compartment for accommodating the earphone body, and the main control module and the battery protection module are arranged in the earphone body;

The step of the main control module receiving the shipping instruction to enter the shipping mode sent by the host computer specifically includes:

The earphone compartment receives the shipping instruction to enter the shipping mode sent by the host computer;

The main control module receives the shipping instruction sent by the headset compartment;

The step of the main control module sending the effective response command to the host computer specifically includes:

The main control module sends the effective response command to the headset compartment;

The headset compartment sends the effective response command to the host computer;

The step of the main control module sending the failure response command to the host computer specifically includes:

The main control module sends the failure response command to the earphone compartment;

The earphone compartment sends the failure response command to the upper computer.

Optionally, after the step of sending the effective response command to the host computer by the headset compartment, the step further includes:

Enter shipping mode.

Optionally, the shipping instruction, the shipping mode feedback instruction and the shipping confirmation signal are respectively in the form of code, pulse or level.

A twenty-third aspect of an embodiment of the present application provides an electronic device, the electronic device includes a processor and a memory coupled to each other, the processor is configured to execute program instructions stored in the memory, so as to implement the above-mentioned ship Operation mode setting method.

A twenty-fourth aspect of an embodiment of the present application provides a computer-readable storage medium, on which program instructions are stored, and when the program instructions are executed by a processor, the foregoing method for setting a shipping mode is implemented.

A twenty-fifth aspect of an embodiment of the present application provides an electronic device, the electronic device includes a main control module and a battery protection module, the main control module is provided with input and output pins, and the battery protection module is provided with a shipping pin, when the main control module receives the shipping instruction from the host computer to enter the shipping mode, the shipping instruction is transmitted to the shipping pin by the input and output pins, and the master control The module sends a shipping mode feedback command to the host computer according to whether it receives a shipping confirmation signal fed back from the shipping pin; wherein, the shipping mode feedback command is an effective response command that successfully enters the shipping mode Or a fail-response command that fails to enter shipping mode.

Optionally, the input and output pins include a first input and output pin and a second input and output pin, the battery protection module is further provided with a feedback pin, and the shipping instructions are guided by the first input and output pins. The pin is transmitted to the shipping pin, and the feedback command is sent from the feedback pin to the second input and output pin.

Optionally, the electronic device is a tws earphone.

Implementing the embodiments of the present application has the following beneficial effects: since the system-on-chip further includes a shipping pin, when the shipping pin receives the first signal, the system-on-chip enters the shipping mode, and in the shipping mode, the The first switch unit is turned off so that the battery stops supplying power to the system circuit and at least some units of the system on chip are powered off, and the wake-up unit is powered in the shipping mode, the wake-up unit is used to enable the system on chip Exit shipping mode. In the shipping mode, the first switch unit is turned off, so that the battery cannot supply power to the system circuit, which can greatly save the power of the battery. Moreover, in the shipping mode, at least some units of the system-on-chip are powered off, so that the battery only needs to supply power to the system. A few circuit units such as the wake-up unit of the system-on-chip continue to supply power, so that the power consumption of the battery is further reduced, which can reduce the current consumption of the electronic device and improve the battery retention time. When the user gets the electronic device, the user only needs to operate the wake-up The unit enables the system-on-chip to exit the shipping mode, and the electronic device can be used normally when it is turned on, which improves the user experience.

Description of drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present application. For those of ordinary skill in the art, other drawings can also be obtained based on these drawings without any creative effort.

1 is a schematic diagram of a circuit module of an electronic device according to a first embodiment of the present application;

2 is a schematic diagram of a circuit module of an electronic device according to another embodiment of the first embodiment of the present application;

3 is a schematic diagram of a circuit module of the system-on-chip according to the first embodiment of the present application;

4 is a schematic diagram of an implementation of triggering the system-on-chip to generate a shipping control signal when the shipping pin of the system-on-chip according to the first embodiment of the present application receives the first signal;

Fig. 5 is the waveform diagram of the signal received by the shipping pin in Fig. 4 and the output signal of the pulse counting unit;

6 is a schematic diagram of another implementation manner of triggering the SoC to generate a shipping control signal when the shipping pin of the SoC according to the first embodiment of the present application receives the first signal;

Fig. 7 is the waveform diagram of the signal received by the shipping pin in Fig. 6 and the output signal of the first timing unit;

8 is a schematic diagram of yet another implementation manner of triggering the SoC to generate a shipping control signal when the shipping pin of the SoC according to the first embodiment of the present application receives the first signal;

9 is a specific circuit implementation diagram of the shipping pin and the over-discharge voltage protection unit according to the first embodiment of the present application;

Fig. 10 is the waveform diagram of the signal received by the shipping pin in Fig. 9 and the output signal of the second timing unit;

11 is a schematic diagram of a circuit module of an electronic device according to a second embodiment of the present application;

12 is a schematic diagram of a circuit module of still another electronic device according to the second embodiment of the present application;

13 is a schematic diagram of a circuit module of a system-on-chip according to the second embodiment of the present application;

Fig. 14 is the waveform diagram of the signal received by the shipping outlet, the signal received by the power supply pin and the output signal of the pulse counting unit in Fig. 13;

15 is a schematic diagram of a circuit module of another electronic device according to the second embodiment of the present application;

Fig. 16 is the circuit module schematic diagram of the system-on-chip in Fig. 15;

17 is a schematic diagram of a circuit module of another system-on-a-chip according to the second embodiment of the present application;

FIG. 18 is a specific circuit realization diagram of the pulse counting unit and the over-discharge voltage protection unit in FIG. 17;

19 is a schematic diagram of a circuit module of an electronic device according to a third embodiment of the present application;

Figure 20 is a waveform diagram of the signal received at the shipping input in Figure 19 and the output signal of the pulse counting unit;

21 is a schematic diagram of a circuit module of another electronic device according to the third embodiment of the present application;

22 is a schematic diagram of a circuit module of another electronic device according to the third embodiment of the present application;

Figure 23 is a waveform diagram of the signal received at the shipping input in Figure 22 and the output signal of the first timing unit;

24 is a schematic diagram of a circuit module of another electronic device according to the third embodiment of the present application;

25 is a specific circuit implementation diagram of the shipping input terminal and the over-discharge voltage protection unit according to the third embodiment of the present application;

Figure 26 is a waveform diagram of the signal received at the shipping input in Figure 25 and the output signal of the second timing unit;

27 is a schematic diagram of a circuit module of an electronic device according to a fourth embodiment of the present application;

28 is a schematic diagram of a circuit module of another electronic device according to the fourth embodiment of the present application;

29 is a schematic diagram of a circuit module of a system-on-chip according to the fourth embodiment of the present application;

30 is a schematic diagram of an implementation manner of triggering the SoC to generate a shipping control signal when the shipping pin of the SoC according to the fourth embodiment of the present application receives the first signal;

Figure 31 is a waveform diagram of the signal received by the shipping pin in Figure 30 and the output signal of the pulse counting unit;

32 is a schematic diagram of another implementation manner of triggering the SoC to generate a shipping control signal when the shipping pin of the SoC according to the fourth embodiment of the present application receives the first signal;

Figure 33 is a waveform diagram of the signal received by the shipping pin in Figure 32 and the output signal of the first timing unit;

34 is a schematic diagram of yet another implementation of triggering the system-on-chip to generate a shipping control signal when the shipping pin of the system-on-chip according to the fourth embodiment of the present application receives the first signal;

35 is a specific circuit implementation diagram of the shipping pin and the over-discharge voltage protection unit according to the fourth embodiment of the present application;

Figure 36 is a waveform diagram of the signal received by the shipping pin in Figure 35 and the output signal of the second timing unit;

37 is a schematic diagram of a circuit module of an electronic device according to a fifth embodiment of the present application;

38 is a schematic diagram of a circuit module of another electronic device according to the fifth embodiment of the present application;

39 is a schematic diagram of a circuit module of a system-on-chip according to the fifth embodiment of the present application;

Figure 40 is a waveform diagram of the signal received by the shipping outlet in Figure 39, the signal received by the power supply pin and the output signal of the pulse counting unit;

41 is a schematic diagram of a circuit module of another electronic device according to the fifth embodiment of the present application;

FIG. 42 is a schematic diagram of a circuit module of the system-on-chip in FIG. 41;

43 is a schematic diagram of a circuit module of another system-on-chip according to the fifth embodiment of the present application;

Fig. 44 is the concrete circuit realization diagram of the pulse counting unit and the over-discharge voltage protection unit in Fig. 43;

45 is a schematic diagram of a circuit module of the electronic device according to the sixth embodiment of the present application;

46 is a schematic diagram of a circuit module of the battery protection circuit according to the sixth embodiment of the present application;

47 is a schematic diagram of a circuit module of another electronic device according to the sixth embodiment of the present application;

48 is a schematic diagram of a circuit module of another electronic device according to the sixth embodiment of the present application;

49 is a schematic flowchart of the first embodiment of the shipping mode setting method of the electronic device of the present application;

50 is a schematic flowchart of the second embodiment of the shipping mode setting method of the electronic device of the present application;

51 is a schematic flowchart of the third embodiment of the shipping mode setting method of the electronic device of the present application;

FIG. 52 is a schematic diagram of the framework of the seventh embodiment of the electronic device of the present application;

53 is a schematic diagram of a framework of an embodiment of a computer-readable storage medium of the present application;

Fig. 54 is another circuit diagram of the seventh embodiment of the electronic device of the present application;

FIG. 55 is another circuit diagram of the seventh embodiment of the electronic device of the present application.

detailed description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

The appearances of the terms "comprising" and "having" and any variations thereof in the specification, claims and drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or modules is not limited to the listed steps or units, but optionally also includes unlisted steps or units, or optionally also includes For other steps or units inherent to these processes, methods, products or devices. In addition, the terms "first", "second", "third", etc. are used to distinguish different objects, and not to describe a specific order.

An embodiment of the present application provides an electronic device, and the electronic device is, for example, a Bluetooth headset, a mobile phone, a tablet computer, and the like. Referring to FIG. 1, the electronic device includes a battery assembly and a system circuit 200. The system circuit 200 is, for example, a circuit composed of a microprocessor, a camera driving circuit, an image processor, etc. The system circuit 200 is electrically connected to the battery assembly, and the battery assembly is used to supply The system circuit 200 is powered. The battery assembly includes a battery 300 and a system-on-chip 100, the system-on-chip 100 is electrically connected to the positive and negative poles of the battery 300, the system circuit 200 is electrically connected to the system-on-chip 100, the battery 300 supplies power to the system-on-chip 100, and the system-on-chip 100 plays a protective role. The battery 300 is protected when it is overcharged or overdischarged. Since how the system-on-chip 100 protects the battery 300 from overcharge and overdischarge is a common technical means in the field, it will not be repeated here. In this embodiment, the number of the batteries 300 is one or more. When there are multiple batteries 300, the multiple batteries 300 can be connected in parallel, in series, or mixed in series and parallel. The batteries 300 are preferably lithium batteries 300, and the capacity of the batteries 300 is 10mAH-80mAH, such as 10mAH, 20mAH, 30mAH, 40mAH, 50mAH, 60mAH, 70mAH, 80mAH, the battery 300 with this capacity is small in volume, preferably, the capacity of the battery 300 is 20mAH-40mAH, and the The volume is smaller and can be easily configured in small electronic devices, such as Bluetooth headsets. Moreover, since the capacity of the battery 300 is so small, how to maintain the power of the battery 300 for a long time becomes a very important issue. In this embodiment, the system on chip 100 (System on Chip, SOC) is a technology commonly used in the field of integrated circuits, and the purpose is to combine multiple integrated circuits with specific functions on one chip to form a system or product, including complete The hardware system and the embedded software it carries. The system-on-chip 100 has obvious advantages in performance, cost, power consumption, reliability, and life cycle and usage range. In addition, in other embodiments of the present application, referring to FIG. 2 , a second resistor R2 and a capacitor C are further provided between the battery 300 and the system-on-chip 100 , and the second resistor R2 and the capacitor C are set for filtering. In addition, in other embodiments of the present application, other circuits or electronic components may also be provided between the battery 300 and the system-on-chip 100 .

In the embodiment of the present application, the power supply pin VDD and the power supply ground pin GND are respectively used for electrical connection with the positive and negative poles of the battery 300 , so that the battery 300 can supply power to the system-on-chip 100 . . The system circuit 200 forms a loop to supply power to the system circuit 200 .

In the embodiment of the present application, the overcharge voltage protection unit 110 is used to protect the battery 300 when it is detected that the charging voltage is too high during the charging process of the battery 300, for example, stop charging the battery 300, etc., to prevent the battery 300 from being charged. damage or safety issues.

In the embodiment of the present application, the over-discharge voltage protection unit 190 is used to protect the battery 300 when it is detected that the discharge voltage is too low during the discharge process of the battery 300, for example, to control the battery 300 to discharge to a minimum degree, etc. Generally, the power supply to the system circuit 200 is stopped, and the power supply to the circuits other than the charging detection circuit of the system on chip 100 is stopped, so as to prevent the battery 300 from being permanently damaged due to excessive discharge of the battery 300 .

In the embodiment of the present application, the discharge overcurrent protection unit 130 is used to protect the battery 300 when it is detected that the discharge current is too large during the discharge process of the battery 300 , for example, the battery 300 stops discharging, etc., to prevent the discharge current from being excessively high. It may cause permanent damage to the battery 300 or a safety problem. In this embodiment, the discharge overcurrent protection unit 130 includes a plurality of sub-units, each of which is electrically connected to the control unit 160, and each sub-unit is used to process different discharge currents, and three sub-units are set in the figure .

In the embodiment of the present application, the reference voltage generation unit 140 is used to generate the reference voltage required by the system on chip 100 , the frequency generation unit 150 is used to generate different frequencies, and the control unit 160 is respectively connected with the overcharge voltage protection unit 110 and the overdischarge voltage. The protection unit 190 , the discharge overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , the wake-up unit 170 , the first switch unit 180 and the like are electrically connected. In this embodiment, the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , and the control unit 160 are conventional circuits in the field, and here No longer.

In the embodiment of the present application, the wake-up unit 170 is a charging detection unit for detecting whether the electronic device is connected to a power source through a charger to charge the battery 300 . When the electronic device is connected to the power source through a charger, the charging detection unit detects to the charging signal to charge the battery 300; if the battery 300 is protected by the overdischarge voltage protection unit 190 and the charging detection unit detects the charging signal at this time, the overdischarge voltage protection for the battery 300 is exited, that is, the The system circuit 200 supplies power and normally supplies power to the system on chip 100 .

In the embodiment of the present application, the first signal is a digital coded signal, and the coded signal is pre-agreed in the design of the SoC and the system circuit. When the coded signal is received by the shipping pin, the SoC generates the shipping Control signal to enter shipping mode. For example, the first signal includes two periods of time: the first period is a high-level signal, and the second period is a predetermined number of pulse signals. Here, the high-level signal is used to trigger the corresponding components of the system-on-chip to activate, for example Tell the corresponding component of the system-on-chip to prepare for timing or counting, and then the corresponding component of the system-on-chip will count or time the received pulse signal (for example, different pulse durations are different). When the number of pulses meets the preset requirements, the system-on-chip generates For the shipping control signal, when the number of pulses does not meet the preset requirements, the corresponding components of the system-on-chip return to the state where they are not activated at the beginning. Since the first signal is a coded signal of the SoC and the system circuit protocol, the specific form of the first signal is not limited, complex coding or simple coding can be used, and the SoC and the system circuit can be identified by pre-protocol agreement. In addition, when the first signal is relatively complex, the system-on-chip is reliable and safe at this time, which can prevent false triggering.

In the embodiment of the present application, when the electronic device needs to be transported or stored for a long time, there are several ways to enter the system-on-chip 100 of the electronic device into the shipping mode, which are described below. Of course, the manners for making the SoC 100 of the electronic device enter the shipping mode are not limited to the following. In other embodiments of the present application, those skilled in the art can also set other conventional circuits to realize the SoC 100 of the electronic device. Enter shipping mode.

first embodiment

In the first embodiment of the present application, please refer to FIG. 1 and FIG. 3 in combination, the system-on-chip 100 includes a power supply pin VDD, a power supply ground pin GND, an overcharge voltage protection unit 110, an overdischarge voltage protection unit 190, a discharge voltage The overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , the control unit 160 , the wake-up unit 170 , and the first switch unit 180 .

In the embodiment of the present application, the first switch unit 180 includes a switch tube and a substrate control circuit, the switch tube is a MOS tube, the control end of the switch tube is electrically connected to the control unit 160 , and the substrate control circuit is electrically connected to the control unit 160 , the substrate control circuit is used to realize the correct bias of the substrate of the switch tube. However, the present application is not limited thereto. In other embodiments of the present application, the first switch unit 180 may further include a charge switch and a discharge switch, wherein the charge switch and the discharge switch are both MOS transistors, and the charge switch and the discharge switch are respectively connected to the control Unit 160 is electrically connected. In addition, in other embodiments of the present application, the first switch unit 180 may also be implemented in other forms, for example, including only one switch tube. In this embodiment, the first switch unit 180 is used to control the battery 300 to supply power to the system circuit 200 . Specifically, the control terminal of the first switch unit 180 is electrically connected to the control unit 160, and the input terminal of the first switch unit 180 is used to electrically connect to the battery 300, for example, to the power ground pin GND of the system-on-chip 100. The output end of a switch unit 180 is used for electrical connection with the system circuit 200 , so that the battery 300 , the system circuit 200 and the first switch unit 180 form a power supply loop, and the system-on-chip 100 can control whether the battery 300 is Power is supplied to the system circuit 200 .

In the implementation of this application, the system on chip 100 further includes a shipping pin CTL. The shipping pin CTL is a newly added pin of the system on chip 100. When the shipping pin CTL receives the first signal, the system on chip 100 enters the ship In the shipping mode, the first switch unit 180 is turned off to stop the battery 300 from supplying power to the system circuit 200, and at least some units of the system-on-chip 100 are stopped from supplying power. In this embodiment, the generation of the first signal may be implemented by software or by hardware. When implemented by hardware, it may be implemented by, for example, the power button of the electronic device, for example, by long pressing the power button to generate the first signal.

In the embodiment of the present application, the wake-up unit 170 is continuously powered by the battery 300 in the shipping mode, and the wake-up unit 170 is used to make the system-on-chip 100 exit the shipping mode. In this embodiment, since the wake-up unit 170 is a charging detection circuit, and the charging detection circuit is an existing circuit of the system-on-chip 100 , this design can save costs. In this embodiment, when the electronic device is charged, the charging detection circuit detects the charging signal, and the system-on-chip 100 automatically exits the shipping mode. Since the power of the battery 300 can be maintained for a long time, the electronic device can be powered on normally. In addition, in other embodiments of the present application, the wake-up unit 170 may not be a charging detection circuit, but may also be other newly added hardware circuits specially used to make the system on chip 100 exit the shipping mode. Those skilled in the art may Specific requirements for circuit design.

In the embodiment of the present application, when the electronic device needs to be transported or stored for a long time, the system-on-chip 100 of the electronic device can enter the shipping mode. In the shipping mode, the first switch unit 180 is turned off, Therefore, the battery 300 cannot supply power to the system circuit 200, which can greatly save the power of the battery 300. Moreover, in the shipping mode, at least some units of the SoC 100 are powered off, so that the battery 300 only needs to power the wake-up unit 170 of the SoC 100, etc. A few circuit units continue to supply power, so that the power consumption of the battery 300 is further reduced, which can reduce the current consumption of the electronic device. The current consumption can be as low as several nA/h, so that the power retention time of the battery 300 can be improved, even if the capacity of the battery 300 itself is In a relatively small case, the power of the battery 300 can also be maintained for half a year to a year in the shipping mode. When the user gets the electronic device, the user only needs to operate the wake-up unit 170 to make the system-on-chip 100 exit the shipping mode, and the electronic device is turned on immediately. It can be used normally, which improves the user experience and prevents the user from mistakenly thinking that the electronic device is faulty.

In this embodiment, at least some units of the system on chip 100 are powered off during the shipping mode. In this embodiment, at least one of the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the control unit 160 , the reference voltage generation unit 140 and the frequency generation unit 150 of the system on chip 100 is Stop power supply, for example, one of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140 and the frequency generation unit 150 is stopped in the shipping mode power supply, or two of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140 and the frequency generation unit 150 are powered off during the shipping mode, Or in the shipping mode, three of the overcharge voltage protection unit 110, the overdischarge voltage protection unit 190, the discharge overcurrent protection unit 130, the control unit 160, the reference voltage generation unit 140 and the frequency generation unit 150 are powered off, . . . Or in the shipping mode, the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the control unit 160 , the reference voltage generation unit 140 and the frequency generation unit 150 are all powered off. Reduce battery consumption by 300. In addition, in other embodiments of the present application, the system-on-chip 100 further includes a temperature protection unit 410, a charging overcurrent protection unit 120, etc. In the shipping mode, the temperature protection unit 410 and the charging overcurrent protection unit 120 may not be powered, It can also be powered, which is also the scope of the protection of the present invention. In this embodiment, when the system on chip 100 enters the shipping mode, the circuits of the system on chip 100 except the wake-up unit 170 are all powered off, that is, the circuits of the system on chip 100 except for the circuits required for the system on chip 100 to exit the shipping mode are stopped. Except that the wake-up unit 170 is powered, other circuit units of the system-on-chip 100 are not powered, which can further save the power of the battery 300, reduce the power consumption of the battery 300, and further improve the power retention time of the battery 300. The capacity retention time of the battery 300 .

In this embodiment, when the shipping pin CTL receives the first signal, the system-on-chip 100 is triggered to generate a shipping control signal to enter the shipping mode. However, the present application is not limited thereto. In other embodiments of the present application, the system on chip 100 can directly enter the shipping mode when the shipping pin CTL receives the first signal.

In this embodiment, when the shipping pin CTL receives the first signal, there are three ways to trigger the system-on-chip 100 to generate the shipping control signal, which will be described separately below. Certainly, when the shipping pin CTL receives the first signal, the manner of triggering the SoC 100 to generate the shipping control signal is not limited to the following three. In other embodiments of the present application, those skilled in the art can also set other conventional circuits. to trigger the system-on-chip 100 to generate a shipping control signal.

1. In an embodiment of the present application, please refer to FIG. 4 and FIG. 5 , the first signal includes a pulse signal, and the system-on-chip 100 further includes a pulse counting unit 420 and a third resistor R3. Here, the shipping pin CTL defaults to a low level. In this embodiment, the shipping pin CTL is grounded through the third resistor R3 to achieve a low level, and the pulse counting unit 420 outputs a low level signal under normal conditions. , the shipping pin CTL is electrically connected with the pulse counting unit 420 . When the shipping pin CTL receives the first signal, the pulse counting unit 420 counts the pulses, and the pulse counting unit 420 triggers counting with a rising edge. or equal to the first predetermined number, the output signal of the pulse counting unit 420 changes from a low level to a high level, and the high level at this time is the shipping control signal, wherein the first predetermined time period and the first predetermined number are The system on chip 100 is preset, the first predetermined time period is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, etc., and the first predetermined number is, for example, 3, 4, 5, etc. This design can prevent false triggering. In this embodiment, the output terminals of the pulse counting unit 420 are respectively connected with the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , and the control unit 160 . The units whose power supply needs to be stopped are electrically connected to stop the power supply of the units other than the wake-up unit 170 of the system on chip 100 . In addition, in other embodiments of the present application, the output terminal of the pulse counting unit 420 outputs a high level under normal conditions, and at this time, a low level is a shipping control signal. In this embodiment, the pulse counting unit 420 is provided separately from the control unit 160 . In addition, in other embodiments of the present application, the pulse counting unit 420 may also be integrated into the control unit 160 .

2. In an embodiment of the present application, please refer to FIG. 6 and FIG. 7 , the first signal includes a continuous high-level signal or a continuous low-level signal, and the system-on-chip 100 further includes a first timing unit 430 and a third resistor R3 . Here, the shipping pin CTL defaults to a low level. In this embodiment, the shipping pin CTL is grounded through the third resistor R3 to achieve a low level, and the first timing unit 430 outputs a low level under normal conditions. signal, the shipping pin CTL is electrically connected to the first timing unit 430 . When the first signal received by the shipping pin CTL is a high level signal, that is, when the signal received by the shipping pin CTL changes from a low level to a high level, the first timing unit 430 triggers the timing, and the first timing The unit 430 triggers timing with a rising edge. When the duration of the high-level signal received by the first timing unit 430 is greater than or equal to the second predetermined time period T1, the output signal of the first timing unit 430 changes from a low level to a high level, The high-level signal at this time is the shipping control signal, wherein the second predetermined time period T1 is preset by the SoC 100, and the second predetermined time period T1 is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second Waiting time period, this design can prevent false triggering. In this embodiment, the output end of the first timing unit 430 is respectively connected with the overcharge voltage protection unit 110 , the overdischarge voltage protection unit 190 , the discharge overcurrent protection unit 130 , the reference voltage generation unit 140 , the frequency generation unit 150 , and the control unit The units whose power supply needs to be stopped, such as 160 , are electrically connected to stop the power supply of units other than the wake-up unit 170 of the system on chip 100 . In addition, in other embodiments of the present application, the output end of the first timing unit 430 outputs a high-level signal under normal conditions, and at this time, the low-level signal is a shipping control signal. In this embodiment, the first timing unit 430 is provided separately from the control unit 160 . In addition, in other embodiments of the present application, the first timing unit 430 may also be integrated into the control unit 160 .

3. Please refer to FIG. 3. Generally speaking, when the battery 300 is deeply discharged, the conventional system-on-chip 100 or battery 300 protection circuit detects through the over-discharge voltage protection unit 190. The battery 300 is deeply discharged, the over-discharge voltage protection unit 190 sends a signal to the control unit 160, the control unit 160 passively controls the first switch unit 180 to disconnect, and passively controls the system-on-chip 100 or the battery 300 protection circuit except the charging detection unit to be disabled. Stop the power supply to protect the battery 300 and prevent the battery 300 from being damaged due to over-discharge, until the system-on-chip 100 or the battery 300 protection circuit resumes power supply after the charging detection unit detects the charging signal, and the first switch unit 180 is turned off to restore the system circuit 200. of power supply. In an embodiment of the present application, the original circuits and functions of the over-discharge voltage protection unit 190 in the prior art are fully utilized to actively control the disconnection of the first switch unit 180 and actively control the system-on-chip except the charging detection unit. 100 is powered off, which can reduce costs. Specifically, please refer to FIG. 8 to FIG. 10 , the over-discharge voltage protection unit 190 includes a comparator 191 and a second timing unit 192 . The comparator 191 has a same-direction terminal and two reverse terminals, and the two reverse terminals are respectively are the first reverse terminal and the second reverse terminal, the output terminal of the comparator 191 is electrically connected to the second timer, the non-inverting terminal of the comparator 191 is connected to a reference voltage, and the first reverse terminal of the comparator 191 is electrically connected to the battery The output voltage detection point of 300 is used to detect whether the battery 300 is deeply discharged. The first signal includes a continuous high-level signal. The system on chip 100 further includes a second switch unit 440 and a first resistor R1. The control end of the second switch unit 440 is electrically connected to the shipping pin CTL. The input end is grounded, the output end of the second switch unit 440 is electrically connected to one end of the first resistor R1, the other end of the first resistor R1 is connected to a high level, and the output end of the second switch unit 440 is also connected to the overdischarge voltage protection unit 190 The second reverse terminal of the comparator 191 is electrically connected, wherein the low level priority of the first reverse terminal and the second reverse terminal is higher, that is, when either the first reverse terminal or the second reverse terminal is When one is at low level, the reverse terminal of comparator 191 is at low level at this time. In this embodiment, when the shipping pin CTL is connected to the first signal, the second switch unit 440 is turned on, at this time, the second reverse terminal of the comparator 191 is grounded, and at this time, the reverse terminal of the comparator 191 is low Therefore, the comparator 191 outputs a high level, and the second timing unit 192 triggers the generation of a shipping control signal when the received high level duration is greater than or equal to the third predetermined time period T2, and the shipping control signal is high level signal. Furthermore, by using the existing over-discharge voltage protection unit 190, the first switch unit 180 is controlled to be turned off, and the power supply of the system-on-chip 100 other than the charge detection unit is controlled to be stopped. The third predetermined time period T2 is preset by the system-on-chip 100, and the third predetermined time period T2 is, for example, 10 seconds, 5 seconds, 3 seconds, etc. This design can prevent false triggering. In this embodiment, the second switch unit 440 is an NMOS transistor. However, the present application is not limited thereto. In other embodiments of the present application, the second switch unit 440 may also be a PMOS transistor, and at this time, the first signal includes a continuous low-level signal.

In this embodiment, referring to FIG. 1 and FIG. 3 in combination, the system-on-chip 100 further includes a system ground pin VM, which is used for electrical connection with the system circuit 200 , and the system ground pin VM is also used for Charge. In this embodiment, a first switch unit 180 is disposed between the system ground pin VM and the power supply ground pin GND.

Second Embodiment

The second embodiment is based on the first embodiment, and the newly added shipping pin CTL_2 of the system on chip 100_2 shares one pin with the power supply pin VDD_2. Referring to FIG. 11 and FIG. 13 , the power supply pin VDD_2 is the same as the power supply pin VDD_2. The shipping outlet 210_2 of the system circuit 200_2 is electrically connected, so that the output of the battery 300_2 is divided into two branches from the power supply pin VDD_2, one branch enters the system-on-chip 100_2 through the power supply pin VDD_2, and the other branch Entering the system circuit 200_2 through the shipping output terminal 210_2, when the control system circuit 200_2 is controlled so that the signal of the shipping output terminal 210_2 changes, the voltage signal of the power supply pin VDD_2 changes accordingly. At this time, the system on chip 100_2 performs In the shipping mode, in the shipping mode, the first switch unit 180_2 is turned off so that the battery 300_2 stops supplying power to the system circuit 200_2, and at least some units of the system-on-chip 100_2 are powered off. In this embodiment, controlling the inside of the system circuit 200_2 to change the signal of the shipping outlet 210_2 can be implemented by software or hardware. For example, it is realized by the power button or the sound button. For example, by long pressing the power button, the signal on the shipping outlet 210_2 can be changed.

In the second embodiment of the present application, please refer to FIG. 11 and FIG. 13 in combination, the system-on-chip 100_2 includes a power supply pin VDD_2, a power supply ground pin GND_2, an overcharge voltage protection unit 110_2, an overdischarge voltage protection unit 190_2, a discharge voltage The overcurrent protection unit 130_2, the reference voltage generation unit 140_2, the frequency generation unit 150_2, the control unit 160_2, the wake-up unit 170_2, and the first switch unit 180_2.

In this embodiment, the structure and working principle of the first switch unit 180_2 are the same as those in the first embodiment, and are not repeated here.

In this embodiment, the wake-up unit 170_2 is continuously powered by the battery 300_2 in the shipping mode, and the wake-up unit 170_2 is used to make the system-on-chip 100_2 exit the shipping mode. In the present embodiment, since the wake-up unit 170_2 is a charging detection circuit, and the charging detection circuit is an existing circuit of the system-on-chip 100_2, such a design can save costs. In this embodiment, when the electronic device is charged, the charging detection circuit detects the charging signal at this time, and the system-on-chip 100_2 automatically exits the shipping mode. Since the power of the battery 300_2 can be maintained for a long time, the electronic device can be normally turned on for use. In addition, in other embodiments of the present application, the wake-up unit 170_2 may not be a charging detection circuit, but may also be other newly added hardware circuits specially used to make the system-on-chip 100_2 exit the shipping mode. Those skilled in the art may Design the circuit according to specific requirements.

In this embodiment, when the electronic device needs to be transported or stored for a long time, the SoC 100_2 of the electronic device can enter the shipping mode. In the shipping mode, the first switch unit 180_2 is turned off, so that the battery 300_2 The system circuit 200_2 cannot be powered, which can greatly save the power of the battery 300_2. Moreover, in the shipping mode, at least some units of the system-on-chip 100_2 are powered off, so the battery 300_2 only needs to continue to supply a few circuit units such as the wake-up circuit of the system-on-chip 100_2. Power supply, so that the power consumption of the battery 300_2 is further reduced, which can reduce the current consumption of the electronic device, and the current consumption can be as low as several nA/h, so that the power retention time of the battery 300_2 can be improved, even if the capacity of the battery 300_2 itself is relatively small. , in the shipping mode, the power of the battery 300_2 can also be maintained for half a year to a year. After the user gets the electronic device, the user only needs to wake up the unit 170_2 to make the system-on-chip 100_2 exit the shipping mode, and the electronic device can be turned on normally. In use, the user's experience is improved, and the user is prevented from mistaking the quality of the electronic device itself.

In this embodiment, at least some units of the system on chip 100_2 are powered off during the shipping mode. In this embodiment, at least one of the overcharge voltage protection unit 110_2 , the overdischarge voltage protection unit 190_2 , the discharge overcurrent protection unit 130_2 , the control unit 160_2 , the reference voltage generation unit 140_2 and the frequency generation unit 150_2 of the system on chip 100_2 is Stop power supply, for example, one of the overcharge voltage protection unit 110_2, the overdischarge voltage protection unit 190_2, the discharge overcurrent protection unit 130_2, the control unit 160_2, the reference voltage generation unit 140_2 and the frequency generation unit 150_2 is stopped in the shipping mode power supply, or two of the overcharge voltage protection unit 110_2, the overdischarge voltage protection unit 190_2, the discharge overcurrent protection unit 130_2, the control unit 160_2, the reference voltage generation unit 140_2 and the frequency generation unit 150_2 are powered off in the shipping mode, Or in the shipping mode, three of the overcharge voltage protection unit 110_2, the overdischarge voltage protection unit 190_2, the discharge overcurrent protection unit 130_2, the control unit 160_2, the reference voltage generation unit 140_2 and the frequency generation unit 150_2 are powered off, . . . Or in the shipping mode, the overcharge voltage protection unit 110_2 , the overdischarge voltage protection unit 190_2 , the discharge overcurrent protection unit 130_2 , the control unit 160_2 , the reference voltage generation unit 140_2 and the frequency generation unit 150_2 are all powered off. Reduce the power consumption of the battery 300_2. In addition, in other embodiments of the present application, the system-on-chip 100_2 further includes a temperature protection unit 410_2, a charging overcurrent protection unit 120_2, etc. In the shipping mode, the temperature protection unit 410_2 and the charging overcurrent protection unit 120_2 may not be powered, It can also be powered, which is also the scope of protection of this application. In this embodiment, when the system on chip 100_2 enters the shipping mode, the power supply of the circuit units of the system on chip 100_2 except the wake-up unit 170_2 is stopped, that is, the system on chip 100_2 is not required to exit the shipping mode except for the system on chip 100_2. Except that the wake-up unit 170_2 is powered, other circuit units of the system-on-chip 100_2 are not powered, so that the power of the battery 300_2 can be further saved, the power consumption of the battery 300_2 can be reduced, and the power retention time of the battery 300_2 can be further improved. The power retention time of the small-capacity battery 300_2.

In this embodiment, there are the following ways to realize the change of the signal of the shipping output terminal 210_2 of the system circuit 200_2 to cause the voltage signal received by the power supply pin VDD_2 to change, which will be described below. Of course, the way to realize the change of the signal of the shipping output terminal 210_2 of the system circuit 200_2 to cause the change of the voltage signal received by the power supply pin VDD_2 is not limited to the following. Personnel can also set other conventional circuits to realize the change of the signal of the shipping output terminal 210_2 of the system circuit 200_2, resulting in the change of the voltage signal received by the power supply pin VDD_2.

1. In an embodiment of the present application, please refer to FIG. 11 , FIG. 13 and FIG. 14 , when the number of pulses received by the power supply pin VDD_2 within a predetermined period of time is greater than or equal to the first predetermined number, the system-on-chip 100_2 Enter shipping mode. Specifically, the shipping outlet 210_2 is electrically connected to the power supply pin VDD_2 via a second resistor R2_2, and the second resistor R2_2 and the first resistor R1_2 have the same resistance value. Under normal conditions, the shipping outlet 210_2 is in a high resistance state. Considering that the shipping output terminal 210_2 is controlled to be disconnected by a switch, the voltage signal received by the power supply pin VDD_2 is only affected by the battery 300_2 and is not affected by the shipping output terminal 210_2 of the system-on-chip 100_2. When the ship transport outlet 210_2 is controlled by the system circuit 200_2 to output a pulse signal, for example, the switch is closed at this time, the high level of the pulse signal is, for example, the battery voltage, and the low level of the pulse signal is, for example, 0V. When the shipping output terminal 210_2 is at a high level, the voltage at the power supply pin VDD_2 is the battery voltage. When the shipping output terminal 210_2 is at 0V, the first resistor R1_2 and the second resistor R2_2 divide the battery voltage, and the power supply leads The voltage at the pin VDD_2 is lower than the battery voltage, which is half the battery voltage in this embodiment, so the voltage at the power supply pin VDD_2 is also a pulse voltage, and the high level of the pulse voltage at the power supply pin VDD_2 is the battery voltage voltage, the low level is half the battery voltage. In this embodiment, the system-on-chip 100_2 further includes a pulse counting unit 420_2. The pulse counting unit 420_2 outputs a low level signal under normal conditions, and the power supply pin VDD_2 is electrically connected to the pulse counting unit 420_2. When the power supply pin VDD_2 also outputs a pulse signal due to the output of the pulse signal from the shipping outlet 210_2, the pulse counting unit 420_2 counts the pulses, and when the pulse counting unit 420_2 receives the pulse signal within the first predetermined time period When the number of received pulses is greater than or equal to the first predetermined number, the output signal of the pulse counting unit 420_2 changes from low level to high level, wherein the first predetermined time period and the first predetermined number are preset by the system on chip 100_2, The first predetermined time period is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, etc., and the first predetermined number is, for example, 3, 4, 5, etc., which can prevent false triggering. In this embodiment, the output end of the pulse counting unit 420_2 is respectively connected with the overcharge voltage protection unit 110_2, the overdischarge voltage protection unit 190_2, the discharge overcurrent protection unit 130_2, the reference voltage generation unit 140_2, the frequency generation unit 150_2, and the control unit 160_2 When the units whose power supply needs to be stopped are electrically connected, when the pulse counting unit 420_2 outputs a high level, the power supply to the units of the system on chip 100_2 other than the wake-up unit 170_2 can be controlled to be stopped. In addition, in other embodiments of the present application, the output terminal of the pulse counting unit 420_2 outputs a high level under normal conditions, and at this time, the pulse counting unit 420_2 outputs a low level for controlling to stop the system on chip 100_2 except the wake-up unit 170_2 power supply to external units. In this embodiment, the pulse counting unit 420_2 is provided separately from the control unit 160_2. In addition, in other embodiments of the present application, the pulse counting unit 420_2 may also be integrated into the control unit 160_2. In addition, in other embodiments of the present application, the pulse counting unit 420_2 may be used to control to stop the power supply to some units of the system-on-chip 100_2.

2. Please refer to FIG. 12. Generally speaking, when the battery 300_2 is deeply discharged, the conventional SoC 100_2 or the battery protection circuit detects the battery 300_2 through the over-discharge voltage protection unit 190_2. Deep discharge, specifically, by detecting whether the voltage at the power supply pin VDD_2 is lower than a preset threshold voltage to determine whether it is deeply discharged, if it is lower than the preset preset voltage, the overdischarge voltage protection unit 190_2 determines that the battery 300_2 is in deep discharge state, the over-discharge voltage protection unit 190_2 sends a signal to the control unit 160_2, the control unit 160_2 passively controls the first switch unit 180_2 to be disconnected, and passively controls the system-on-chip 100_2 except the charging detection unit or the battery protection circuit is stopped from power supply, using In order to protect the battery 300_2 and prevent the battery 300_2 from being damaged due to over-discharge, until the system on chip 100_2 or the battery protection circuit restores power after the charging detection unit detects the charging signal, the first switch unit 180_2 is turned off to restore power to the system circuit 200_2. In an embodiment of the present application, the original circuit and functions of the over-discharge voltage protection unit 190_2 in the prior art are fully utilized to actively control the disconnection of the first switch unit 180_2 and actively control the system-on-chip except the charging detection unit The power supply of 100_2 is stopped, which can reduce the cost while increasing the power retention time of the battery 300_2. Specifically, please refer to FIG. 15 to FIG. 16 , the shipping output terminal 210_2 of the system circuit 200_2 is electrically connected to the power supply pin VDD_2 via the second resistor R2_2 , and the second resistor R2_2 and the first resistor R1_2 have the same resistance value, and the general state The disembarkation transportation outlet 210_2 is in a high resistance state. Specifically, in this embodiment, the system circuit 200_2 includes a second switch unit 220_2, and the input terminal of the second switch unit 220_2 is connected to a first level, where the first level is 0, that is, grounded, However, the first level may not be 0, as long as the voltage at the power supply pin VDD_2 is lower than the preset threshold voltage when the second switch unit 220_2 is turned on. The output end of the second switch is electrically connected to one end of the second resistor R2_2, the other end of the second resistor R2_2 is electrically connected to the power supply pin VDD_2, and the control end of the second switch unit 220_2 is controlled by the hardware of the system circuit 200_2 Or software control. Under normal conditions, the second switch unit 220_2 is disconnected, and the shipping outlet 210_2 is in a high-impedance state. When the SoC 500_2 needs to enter the shipping mode, the user can control the second switch through software or hardware. The unit 220_2 is turned off, and the branch formed by the power supply pin VDD_2, the second resistor R2_2, and the second switch unit 220_2 is turned on. Since the second resistor R2_2 and the first resistor R1_2 have the same resistance value, the second resistor R2_2 and the first resistor R1_2 have the same resistance value. A resistor R1_2 divides the battery voltage, so that the voltage signal received at the power supply pin VDD_2 decreases. In this embodiment, the voltage is reduced to half of the battery voltage. Generally, half of the battery voltage will be lower than the preset threshold set by deep discharge. Generally speaking, the power supply voltage of the battery 300_2 is in the range of 2.8V-4.2V, the threshold voltage of deep discharge is generally 2.8V, and half of the battery voltage range is 1.4V-2.1V, which is lower than the threshold voltage of deep discharge. Therefore, when the second switch unit 220_2 is turned on, the over-discharge voltage protection unit 190_2 detects that the voltage of the power supply pin VDD_2 is lower than the threshold voltage. At this time, the over-discharge voltage protection unit 190_2 controls the first switch unit 180_2 to turn off, and controls Other units of the system-on-chip 500_2 except the charge detection unit are powered off. In this embodiment, the second switch unit 220_2 is an NMOS transistor. However, the present application is not limited thereto, and in other embodiments of the present application, the second switch unit 220_2 may also be a PMOS transistor. Generally speaking, the SoC 500_2 has two protection modes for deep discharge: over-discharge recoverable mode and over-discharge non-recoverable mode, which can be set by the user or manufacturer as required. When the SoC 500_2 is in the over-discharge recoverable mode, the When the discharge voltage protection unit 190_2 detects that the voltage of the power supply pin VDD_2 is lower than the preset threshold voltage (eg, false detection), the first switch unit 180_2 is turned off, and the power supply of the SoC 500_2 except the charging detection unit is stopped. , when the voltage of the power supply pin VDD_2 increases above the preset threshold voltage, the system-on-chip 500_2 is automatically restored to power supply by the unit whose power supply is stopped, and the first switch unit 180_2 is turned on; when the system-on-chip 500_2 is in the over-discharge non-recoverable mode , when the over-discharge voltage protection unit 190_2 detects that the voltage of the power supply pin VDD_2 is lower than the preset threshold voltage, the first switch unit 180_2 is turned off, and the power supply of the SoC 500_2 except the charging detection unit is stopped. Here In this mode, even when the voltage at the power supply pin VDD_2 increases above the preset threshold voltage, the first switch unit 180_2 remains disconnected, and the SoC 500_2 other than the charging detection unit continues to be powered off. In this case , only when the charging detection module detects the charging signal, the power supply unit of the system-on-chip 500_2 whose power supply is stopped will resume power supply, and the first switch unit 180_2 will be turned on. In this embodiment, the system-on-chip 500_2 works in the over-discharge non-recoverable mode. At this time, in the shipping mode, the second switch unit 220_2 is disconnected because it is not powered, and the first switch unit 180_2 remains disconnected, except for charging The power supply of the system-on-chip 500_2 other than the detection unit continues to be stopped, which is conducive to maintaining the power of the battery 300_2.

3. On the basis of method 1, in an embodiment of the present application, the original circuit and function of the over-discharge voltage protection unit 190_2 of the prior art are fully utilized to realize the active control of the first switch unit 180_2 to be disconnected, and the active control The power supply of the system on chip 100_2 except the charging detection unit is stopped, which can reduce the cost. Specifically, referring to FIG. 11 , FIG. 17 and FIG. 18 , the overdischarge voltage protection unit 190_2 includes a comparator 191_2 , and the comparator 191_2 has one non-inverting terminal and two inverting terminals, and the two inverting terminals are the first The reverse terminal and the second reverse terminal, the non-inverting terminal of the comparator 191_2 is connected to a reference voltage, and the first reverse terminal of the comparator 191_2 is electrically connected to the output voltage detection point of the battery 300_2 for detecting whether the battery 300_2 is deeply discharged. Here are electrically connected to the voltage supply pins. In this embodiment, the system-on-chip 100_2 further includes a third switch unit 440_2 and a third resistor R3_2, the control terminal of the third switch unit 440_2 is electrically connected to the output terminal of the pulse counting unit 420_2, and the input terminal of the third switch unit 440_2 is grounded , the output end of the third switch unit 440_2 is electrically connected to one end of the third resistor R3_2, the other end of the third resistor R3_2 is connected to a high level, and the output end of the third switch unit 440_2 is also connected to the comparator of the overdischarge voltage protection unit 190_2 The second reverse terminal of 191_2 is electrically connected, wherein the low level priority of the first reverse terminal and the second reverse terminal is higher, that is, when one of the first reverse terminal or the second reverse terminal is low At this time, the inverting terminal of the comparator 191_2 is at a low level. In this embodiment, when the pulse counting unit 420_2 outputs a high level, the third switch unit 440_2 is turned on, at this time, the second reverse terminal of the comparator 191_2 is grounded, and at this time, the reverse terminal of the comparator 191_2 is at a low level, As a result, the output of the comparator 191_2 changes from a low level to a high level, thereby controlling the first switch unit 180_2 to be turned off, and controlling the power supply of the system on chip 100_2 except the charging detection unit to be stopped. In this embodiment, the third switch unit 440_2 is an NMOS transistor. However, the present application is not limited to this. In other embodiments of the present application, the third switch unit 440_2 may also be a PMOS transistor. At this time, the pulse counting unit 420_2 outputs a low level to turn on the third switch unit 440_2. In this embodiment, the system-on-chip 100_2 works in an over-discharge irrecoverable mode.

In this embodiment, please refer to FIG. 11 and FIG. 13 in combination, the system-on-chip 100_2 further includes a system ground pin VM_2, the system ground pin VM_2 is used for electrical connection with the system circuit 200_2, and the system ground pin VM_2 is also used for Charge. In this embodiment, a first switch unit 180_2 is disposed between the system ground pin VM_2 and the power supply ground pin GND_2.

Third Embodiment

The third embodiment is based on the first embodiment, and the battery protection circuit 100_3 does not include a wake-up unit. In this embodiment, please refer to FIG. 19 , the battery protection circuit 100_3 includes a power supply terminal VDD_3 , a power ground terminal GND_3 , an overcharge voltage protection unit 110_3 , an overdischarge voltage protection unit 190_3 , a discharge overcurrent protection unit 130_3 , and a reference voltage generation The unit 140_3, the frequency generating unit 150_3, the control unit 160_3, the charging detection unit, and the first switching unit 180_3.

In this embodiment, the charging detection unit is used to detect whether the electronic device is connected to the power source through the charger to charge the battery 300_3. When the electronic device is connected to the power source through the charger, the charging detection unit detects the charging signal to charge the battery 300_3 is charged; if the battery 300_3 is protected by the over-discharge voltage protection unit 190_3, and the charging detection unit detects a charging signal at this time, the over-discharge voltage protection for the battery 300_3 is exited, that is, the system circuit 200_3 is powered and the battery The protection circuit 100_3 provides normal power supply.

In this embodiment, the structure and working principle of the first switch unit 180_3 are the same as those in the first embodiment, and are not repeated here.

In this embodiment, the battery protection circuit 100_3 further includes a shipping input terminal CTL_3, and the shipping input terminal CTL_3 is a newly added terminal of the battery protection circuit 100_3. When the shipping input terminal CTL_3 receives the first signal, the battery protection circuit 100_3 enters the ship In the shipping mode, at least some units of the battery protection circuit 100_3 are powered off. Therefore, the power consumption of the battery is reduced, the current consumption of the electronic device can be reduced, and the power retention time of the battery can be increased. When the user gets the electronic device, the user only needs to operate the wake-up unit to make the battery protection circuit exit the shipping mode, and the electronic device is turned on. That is, it can be used normally, which improves the user experience. In this embodiment, the generation of the first signal may be implemented by software or by hardware. When implemented by hardware, it may be implemented by, for example, a power button or a sound button of an electronic device, for example, by using a long The first signal is generated by pressing the power button.

In order to further reduce the current consumption, in the present embodiment, the first switch unit 180_3 is turned off to stop the battery 300_3 from supplying power to the system circuit 200_3 in the shipping mode. In the shipping mode, the first switch unit is turned off, so that the battery cannot supply power to the system circuit, which can greatly save the power of the battery.

In this embodiment, the battery protection circuit 100_3 further includes a wake-up unit 170_3, which is continuously powered by the battery 300_3 in the shipping mode, and is used to make the battery protection circuit 100_3 exit the shipping mode. In this embodiment, the wake-up unit 170_3 is a charging detection circuit, and the charging detection circuit is a circuit originally existing in the battery protection circuit 100_3, so the design can save costs. In this embodiment, when the electronic device is being charged, the charging detection circuit detects the charging signal, and the battery protection circuit 100_3 automatically exits the shipping mode. Since the power of the battery 300_3 can be maintained for a long time, the electronic device can be powered on normally. . In addition, in other embodiments of the present application, the wake-up unit 170_3 may not be a charging detection circuit, but may also be other newly added hardware circuits specially used to make the battery protection circuit 100_3 exit the shipping mode. Those skilled in the art Circuit design can be performed on specific requirements. In addition, in other embodiments of the present application, the wake-up unit 170_3 may also be a control unit 160_3.

In this embodiment, when the electronic device needs to be transported or stored for a long time, the battery protection circuit 100_3 of the electronic device can enter the shipping mode. In the shipping mode, the first switch unit 180_3 is turned off, thereby The battery 300_3 cannot supply power to the system circuit 200_3, which can greatly save the power of the battery 300_3. Moreover, in the shipping mode, at least some units of the battery protection circuit 100_3 are powered off, so the battery 300_3 only needs to provide the wake-up circuit of the battery protection circuit 100_3, etc. A few circuit units continue to supply power, so that the power consumption of the battery 300_3 is further reduced, which can reduce the current consumption of the electronic device, and the current consumption can be as low as several nA/h, so that the battery 300_3 can be maintained. In a relatively small case, the battery 300_3 can maintain the power of the battery 300_3 for half a year to a year in the shipping mode. When the user gets the electronic device, the user only needs to operate the wake-up unit 170_3 to make the battery protection circuit 100_3 exit the shipping mode and turn on the electronic device. That is, it can be used normally, the user experience is improved, and the user is prevented from mistakenly thinking that the electronic device is faulty.

In this embodiment, at least some units of the battery protection circuit 100_3 are powered off during the shipping mode. In this embodiment, at least one of the overcharge voltage protection unit 110_3 , the overdischarge voltage protection unit 190_3 , the discharge overcurrent protection unit 130_3 , the control unit 160_3 , the reference voltage generation unit 140_3 and the frequency generation unit 150_3 of the battery protection circuit 100_3 Power supply is stopped, for example, in the shipping mode, one of the overcharge voltage protection unit 110_3, the overdischarge voltage protection unit 190_3, the discharge overcurrent protection unit 130_3, the control unit 160_3, the reference voltage generation unit 140_3 and the frequency generation unit 150_3 is Power supply is stopped, or two of the overcharge voltage protection unit 110_3, the overdischarge voltage protection unit 190_3, the discharge overcurrent protection unit 130_3, the control unit 160_3, the reference voltage generation unit 140_3 and the frequency generation unit 150_3 are stopped to supply power in the shipping mode , or in the shipping mode, three of the overcharge voltage protection unit 110_3, the overdischarge voltage protection unit 190_3, the discharge overcurrent protection unit 130_3, the control unit 160_3, the reference voltage generation unit 140_3 and the frequency generation unit 150_3 are powered off, ... , or in the shipping mode, the overcharge voltage protection unit 110_3, the overdischarge voltage protection unit 190_3, the discharge overcurrent protection unit 130_3, the control unit 160_3, the reference voltage generation unit 140_3 and the frequency generation unit 150_3 are all powered off, at this time, you can The power consumption of the battery 300_3 is further reduced. In addition, in other embodiments of the present application, the battery protection circuit 100_3 further includes a temperature protection unit 410_3, a charging overcurrent protection unit 120_3, etc. In the shipping mode, the temperature protection unit 410_3 and the charging overcurrent protection unit 120_3 may not be powered , can also be powered, which is also the scope of the protection of the present invention. In this embodiment, when the battery protection circuit 100_3 enters the shipping mode, the power supply of the battery protection circuit 100_3 except the wake-up unit 170_3 is all stopped, that is, the battery protection circuit 100_3 is used to make the battery protection circuit 100_3 exit the shipping Except that the wake-up unit 170_3 required by the mode is powered, other circuit units of the battery protection circuit 100_3 are not powered, which can further save the power of the battery 300_3, reduce the power consumption of the battery 300_3, and further improve the power retention time of the battery 300_3 , especially the power retention time of the small-capacity battery 300_3 can be improved.

In this embodiment, when the shipping input terminal CTL_3 receives the first signal, the battery protection circuit 100_3 is triggered to generate the shipping control signal to enter the shipping mode. However, the present application is not limited thereto. In other embodiments of the present application, when the shipping input terminal CTL_3 receives the first signal, the battery protection circuit 100_3 can directly enter the shipping mode.

In this embodiment, when the shipping input terminal CTL_3 receives the first signal, there are three ways to trigger the battery protection circuit 100_3 to generate the shipping control signal, which will be described below. Of course, when the shipping input terminal CTL_3 receives the first signal, the manner in which the battery protection circuit 100_3 is triggered to generate the shipping control signal is not limited to the following three. In other embodiments of the present application, those skilled in the art can also set other conventional circuit to trigger the battery protection circuit 100_3 to generate a shipping control signal.

1. In an embodiment of the present application, please refer to FIG. 19 and FIG. 20 , the first signal includes a pulse signal, and the battery protection circuit 100_3 further includes a pulse counting unit 420_3 and a third resistor R3_3 . Here, the shipping input terminal CTL_3 is at a low level by default. In this embodiment, the shipping input terminal CTL_3 is grounded through the third resistor R3_3 to achieve a low level, and the pulse counting unit 420_3 outputs a low level signal under normal conditions. , the shipping input terminal CTL_3 is electrically connected to the pulse counting unit 420_3. When the shipping input terminal CTL_3 receives the first signal, the pulse counting unit 420_3 counts the pulses, and the pulse counting unit 420_3 triggers counting with a rising edge. or equal to the first predetermined number, the output signal of the pulse counting unit 420_3 changes from low level to high level, and the high level at this time is the shipping control signal, wherein the first predetermined time period and the first predetermined number are The battery protection circuit 100_3 is pre-set, the first predetermined time period is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, etc., and the first predetermined number is, for example, 3, 4, 5, etc., this design can prevent false triggering . In this embodiment, the output end of the pulse counting unit 420_3 is connected to the overcharge voltage protection unit 110_3, the overdischarge voltage protection unit 190_3, the discharge overcurrent protection unit 130_3, the reference voltage generation unit 140_3, the frequency generation unit 150_3, and the control unit 160_3 respectively. The units whose power supply needs to be stopped are electrically connected to stop the power supply of the units other than the wake-up unit 170_3 of the battery protection circuit 100_3. In addition, in other embodiments of the present application, the output terminal of the pulse counting unit 420_3 outputs a high level under normal conditions, and at this time, a low level is a shipping control signal. In this embodiment, the pulse counting unit 420_3 is provided separately from the control unit 160_3. In addition, in other embodiments of the present application, the pulse counting unit 420_3 may also be integrated into the control unit 160_3.

2. In another embodiment of the present application, please refer to FIG. 22 and FIG. 23, the first signal includes a continuous high level or a continuous low level signal, and the battery protection circuit 500_3 further includes a first timing unit 430_3, a third Resistor R3_3. Here, the shipping input terminal CTL_3 is at a low level by default. In this embodiment, the shipping input terminal CTL_3 is grounded through the third resistor R3_3 to achieve a low level. The first timing unit 430_3 outputs a low level under normal conditions. signal, the shipping input terminal CTL_3 is electrically connected to the first timing unit 430_3. When the first signal received by the shipping input terminal CTL_3 is a high level signal, that is, when the signal received by the shipping input terminal CTL_3 changes from a low level to a high level, the first timing unit 430_3 triggers the timing, and the first timing The unit 430_3 triggers timing with a rising edge. When the duration of the high-level signal received by the first timing unit 430_3 is greater than or equal to the second predetermined time period T1, the output signal of the first timing unit 430_3 changes from a low level to a high level, The high-level signal at this time is the shipping control signal, wherein the second predetermined time period T1 is preset by the battery protection circuit 500_3, and the second predetermined time period T1 is, for example, 10 seconds, 5 seconds, 3 seconds, 1 Seconds and other time periods, this design can prevent false triggering. In this embodiment, the output end of the first timing unit 430_3 is respectively connected with the overcharge voltage protection unit 110_3, the overdischarge voltage protection unit 190_3, the discharge overcurrent protection unit 130_3, the reference voltage generation unit 140_3, the frequency generation unit 150_3, and the control unit The units whose power supply needs to be stopped, such as 160_3, are electrically connected to stop the power supply of the units other than the wake-up unit 170_3 of the battery protection circuit 500_3. In addition, in other embodiments of the present application, the output end of the first timing unit 430_3 outputs a high-level signal under normal conditions, and at this time, the low-level signal is a shipping control signal. In this embodiment, the first timing unit 430_3 is provided separately from the control unit 160_3. In addition, in other embodiments of the present application, the first timing unit 430_3 may also be integrated into the control unit 160_3.

3. Generally speaking, the conventional battery protection circuit 600_3, when the battery 300_3 is deeply discharged, the conventional battery protection circuit 600_3 or the battery protection circuit detects the deep discharge of the battery 300_3 through the over-discharge voltage protection unit 190_3, and the over-discharge voltage protection The unit 190_3 sends a signal to the control unit 160_3, the control unit 160_3 passively controls the first switch unit 180_3 to be turned off, and passively controls the battery protection circuit 600_3 except the charging detection unit or the battery protection circuit is stopped to supply power for protecting the battery 300_3, To prevent the battery 300_3 from being damaged due to over-discharge, until the battery protection circuit 600_3 restores power supply after the charging detection unit detects the charging signal, the first switch unit 180_3 is turned off to restore the power supply to the system circuit 200_3 . In yet another embodiment of the present application, the original circuit and functions of the over-discharge voltage protection unit 190_3 in the prior art are fully utilized to actively control the first switch unit 180_3 to be disconnected, and actively control the batteries other than the charging detection unit. The power supply of the protection circuit 600_3 is stopped, which can reduce the cost. Specifically, please refer to FIG. 24 to FIG. 26 , the over-discharge voltage protection unit 190_3 includes a comparator 191_3 and a second timing unit 192_3. The comparator 191_3 has a same-direction terminal and two reverse terminals, and the two reverse terminals are respectively are the first reverse terminal and the second reverse terminal, the output terminal of the comparator 191_3 is electrically connected to the second timer, the non-inverting terminal of the comparator 191_3 is connected to a reference voltage, and the first reverse terminal of the comparator 191_3 is electrically connected to the battery The output voltage detection point of 300_3 is used to detect whether the battery 300_3 is deeply discharged. The first signal includes a continuous high level signal, the battery protection circuit 600_3 further includes a second switch unit 440_3 and a first resistor R1_3, the control terminal of the second switch unit 440_3 is electrically connected to the shipping input terminal CTL_3, and the second switch unit 440_3 The input end of the second switch unit 440_3 is electrically connected to one end of the first resistor R1_3, the other end of the first resistor R1_3 is connected to a high level, and the output end of the second switch unit 440_3 is also connected to the over-discharge voltage protection unit. The second reverse terminal of the comparator 191_3 of 190_3 is electrically connected, wherein the low level priority of the first reverse terminal and the second reverse terminal is higher, that is, when the first reverse terminal or the second reverse terminal When one of them is a low level, the reverse terminal of the comparator 191_3 is a low level at this time. In this embodiment, when the shipping input terminal CTL_3 receives the first signal, the second switch unit 440_3 is turned on, at this time, the second reverse terminal of the comparator 191_3 is grounded, and at this time, the reverse terminal of the comparator 191_3 is low Therefore, the comparator 191_3 outputs a high level. When the duration of the high level received by the second timing unit 192_3 is greater than or equal to the third predetermined time period T2, a shipping control signal is triggered, and the shipping control signal is high level signal. Furthermore, by using the existing over-discharge voltage protection unit 190_3, the first switch unit 180_3 is controlled to be turned off, and the battery protection circuit 600_3 other than the charging detection unit is controlled to be stopped from supplying power. The third predetermined time period T2 is preset by the battery protection circuit 600_3, and the third predetermined time period T2 is, for example, 10 seconds, 5 seconds, 3 seconds, etc., which can prevent false triggering. In this embodiment, the second switch unit 440_3 is an NMOS transistor. However, the present application is not limited thereto. In other embodiments of the present application, the second switch unit 440_3 may also be a PMOS transistor, and at this time, the first signal includes a continuous low-level signal.

In this embodiment, please refer to FIG. 19 , the battery protection circuit 100_3 further includes a system ground terminal VM_3 , the system ground terminal VM_3 is used for electrical connection with the system circuit 200_3 , and the system ground terminal VM_3 is also used for charging. In this embodiment, a first switch unit 180_3 is disposed between the system ground VM_3 and the power ground terminal GND_3.

In this embodiment, the battery protection circuit 100_3 is formed on the same chip, that is, the battery protection circuit 100_3 is formed as a whole system on a chip. The system on chip (SOC) is a technology commonly used in the field of integrated circuits. Combining multiple integrated circuits with specific functions on a chip to form a system or product, which includes the completed hardware system and the embedded software it carries. SoCs have obvious advantages in performance, cost, power consumption, reliability, as well as life cycle and usage range. In addition, in other embodiments of the present application, the units of the battery protection circuit 100_3 except the first switch unit 180_3 are all implemented on the same chip, that is, the entire unit of the battery protection circuit 100_3 except the first switch unit 180_3 Made into a system-on-chip. In addition, in other embodiments of the present application, the second resistor R2_3 and the capacitor C in FIG. 21 can also be implemented in a system-on-chip.

In another embodiment of the present application, a Bluetooth headset is provided, including:

In the above-mentioned battery protection circuit 100_3, the battery protection circuit can be implemented on the same chip, or the units of the battery protection circuit except the first switch unit are implemented on the same chip;

system circuit 200_3;

Battery, its capacity is 10mAH-80mAH;

The battery protection circuit 100_3 is electrically connected to the system circuit 200_3. When the system circuit 200_3 outputs a first signal to the battery protection circuit 100_3, the battery protection circuit 100_3 enters the shipping mode, and the first switch unit 180_3 is turned off in the shipping mode. On to stop the battery 300_3 supplying power to the system circuit 200_3. Specifically, the battery protection circuit 100_3 is electrically connected to the system circuit 200_3 through the shipping input terminal CTL_3. When the shipping input terminal CTL_3 receives the first signal, the battery protection circuit 100_3 enters the shipping mode, and in the shipping mode, the battery protection circuit 100_3 enters the shipping mode through the control unit 160_3. The first switch unit 180_3 is controlled to be turned off to stop the battery 300_3 from supplying power to the system circuit 200_3. In this embodiment, the generation of the first signal can be implemented by software or by hardware. When implemented by hardware, it can be implemented by, for example, the power button and the sound button of the Bluetooth headset. Long press the power button to generate the first signal. In addition, in other embodiments of the present application, the battery protection circuit 100_3 may also be electrically connected to the system circuit 200_3 by sharing other terminals, for example, inputting the first signal through the power supply terminal VDD_3. In addition, in other embodiments of the present application, the battery protection circuit 100_3 may also be electrically connected to the system circuit 200_3 through other lines, for example, the first signal is input through the power supply terminal VDD_3.

In the shipping mode, at least some units of the battery protection circuit 100_3 are also powered off, so that the battery 300_3 only needs to continue to supply power to a few circuit units such as the wake-up unit 170_3 of the battery protection circuit 100_3, so that the power consumption of the battery 300_3 is further reduced. Reduce the current consumption of the Bluetooth headset, the current consumption can be as low as a few nA/h, which can improve the power retention time of the battery 300_3, even if the capacity of the Bluetooth headset battery 300_3 itself is relatively small, the power of the battery 300_3 in the shipping mode It can be kept for half a year to a year.

Fourth Embodiment

The fourth embodiment is based on the first embodiment, and a new control pin CTR_4 is added to the SoC 100_4, the control pin CTR_4 is electrically connected to the control unit 160_4 inside the SoC 100_4, and the control pin CTR_4 is used for connecting with the first embodiment. A switch unit 180_4 is electrically connected, and the control unit 160_4 controls the on-off of the first switch unit 180_4 through the control pin CTR_4. In this embodiment, the number of control pins CTR_4 is one. However, the present application is not limited thereto, and in other embodiments of the present application, the number of control pins CTR_4 may be multiple.

In this embodiment, the first switch unit 180_4 includes a switch tube and a substrate control circuit, the switch tube is a MOS tube, and the control end of the switch tube is electrically connected to the system-on-chip 100_4, specifically the control unit of the system-on-chip 100_4 mentioned later 160_4 is electrically connected, and the substrate control circuit is electrically connected to the control unit 160_4 of the system-on-chip 100_4, and the substrate control circuit is used to realize the correct bias of the substrate of the switch tube. However, the present application is not limited thereto. In other embodiments of the present application, the first switch unit 180_4 may further include a charge switch and a discharge switch, wherein the charge switch and the discharge switch are both MOS transistors, and the charge switch and the discharge switch are respectively connected to the control The unit 160_4 is electrically connected. In addition, in other embodiments of the present application, the first switch unit 180_4 may also be implemented in other forms, for example, including only one switch tube. In this embodiment, the first switch unit 180_4 is used to control the battery 300_4 to supply power to the system circuit 200_4, specifically, the battery 300_4, the system circuit 200_4, and the first switch unit 180_4 form a loop to supply power to the system-on-chip 100_4. Specifically, the control terminal of the first switch unit 180_4 is electrically connected to the control unit 160_4, the input terminal of the first switch unit 180_4 is used for electrical connection with the battery 300_4, for example, the negative terminal of the battery 300_4 is electrically connected. The output terminal is used for electrical connection with the system circuit 200_4, so that the battery 300_4, the system circuit 200_4, and the first switch unit 180_4 form a power supply loop. powered by. In this embodiment, the first switch unit 180_4 is implemented outside the system-on-chip 100_4, but in other embodiments of the present application, the first switch unit 180_4 may also be implemented on the system-on-chip 100_4.

In this embodiment, please refer to FIG. 27-FIG. 29 in combination, the system-on-chip 100_4 includes a power supply pin VDD_4, a power supply ground pin GND_4, an overcharge voltage protection unit 110_4, an overdischarge voltage protection unit 190_4, and a discharge and overcurrent protection unit 130_4, a reference voltage generating unit 140_4, a frequency generating unit 150_4, a control unit 160_4, a wake-up unit 170_4, and a control pin CTR_4.

In this implementation, when the shipping pin CTL_4 on the SoC 100_4 receives the first signal, the SoC 100_4 enters the shipping mode, and in the shipping mode, the output of the SoC 100_4 is used to turn off the first switch unit 180_4 The control signal of 1 is supplied to the control pin CTR_4 to make the battery 300_4 stop supplying power to the system circuit 200_4, and at least some units of the system-on-chip 100_4 are stopped from supplying power. In this embodiment, the generation of the first signal may be implemented by software or by hardware. When implemented by hardware, it may be implemented by, for example, the power button of the electronic device, for example, by long pressing the power button to generate the first signal.

In this embodiment, the wake-up unit 170_4 is continuously powered by the battery 300_4 in the shipping mode, and the wake-up unit 170_4 is used to make the system on chip 100_4 exit the shipping mode. In this embodiment, since the wake-up unit 170_4 is a charging detection circuit, and the charging detection circuit is a circuit originally existing in the system-on-chip 100_4, such a design can save costs. In this embodiment, when the electronic device is charged, the charging detection circuit detects the charging signal, and the system-on-chip 100_4 automatically exits the shipping mode. Since the power of the battery 300_4 can be maintained for a long time, the electronic device can be powered on normally. In addition, in other embodiments of the present application, the wake-up unit 170_4 may not be a charging detection circuit, but may also be other newly added hardware circuits specially used to make the system-on-chip 100_4 exit the shipping mode. Those skilled in the art may Specific requirements for circuit design.

In this embodiment, when the electronic device needs to be transported or stored for a long time, the SoC 100_4 of the electronic device can enter the shipping mode. In the shipping mode, the control unit 160_4 of the SoC 100_4 controls the The pin CTR_4 controls the first switch unit 180_4 to be disconnected, so that the battery 300_4 cannot supply power to the system circuit 200_4, which can greatly save the power of the battery 300_4. Moreover, in the shipping mode, at least some units of the system on chip 100_4 are powered off, so that the battery 300_4 Only a few circuit units such as the wake-up unit 170_4 of the system-on-chip 100_4 need to continue to supply power, so that the power consumption of the battery 300_4 is further reduced, and the current consumption of the electronic device can be reduced, and the current consumption can be as low as several nA/h, so that the battery 300_4 can be improved Even if the capacity of the battery 300_4 itself is relatively small, the power of the battery 300_4 can be maintained for half a year to a year in the shipping mode. When the user gets the electronic device, the user only needs to operate the wake-up unit 170_4 to make the on-chip When the system 100_4 exits the shipping mode, the electronic device can be used normally after it is turned on, which improves the user experience and prevents the user from mistakenly thinking that the electronic device is faulty.

In this embodiment, at least some units of the system on chip 100_4 are powered off during the shipping mode. In this embodiment, at least one of the overcharge voltage protection unit 110_4 , the overdischarge voltage protection unit 190_4 , the discharge overcurrent protection unit 130_4 , the control unit 160_4 , the reference voltage generation unit 140_4 and the frequency generation unit 150_4 of the system on chip 100_4 is Stop power supply, for example, one of the overcharge voltage protection unit 110_4, the overdischarge voltage protection unit 190_4, the discharge overcurrent protection unit 130_4, the control unit 160_4, the reference voltage generation unit 140_4 and the frequency generation unit 150_4 is stopped in the shipping mode power supply, or two of the overcharge voltage protection unit 110_4, the overdischarge voltage protection unit 190_4, the discharge overcurrent protection unit 130_4, the control unit 160_4, the reference voltage generation unit 140_4 and the frequency generation unit 150_4 are powered off in the shipping mode, Or in the shipping mode, three of the overcharge voltage protection unit 110_4 , the overdischarge voltage protection unit 190_4 , the discharge overcurrent protection unit 130_4 , the control unit 160_4 , the reference voltage generation unit 140_4 and the frequency generation unit 150_4 are powered off, . . . Or in the shipping mode, the overcharge voltage protection unit 110_4 , the overdischarge voltage protection unit 190_4 , the discharge overcurrent protection unit 130_4 , the control unit 160_4 , the reference voltage generation unit 140_4 and the frequency generation unit 150_4 are all powered off. Reduce the power consumption of the battery 300_4. In addition, in other embodiments of the present application, the system-on-chip 100_4 further includes a temperature protection unit 410_4, a charging overcurrent protection unit 120_4, etc. In the shipping mode, the temperature protection unit 410_4 and the charging overcurrent protection unit 120_4 may not be powered, It can also be powered, which is also the scope of the protection of the present invention. In this embodiment, when the system on chip 100_4 enters the shipping mode, the circuits of the system on chip 100_4 except the wake-up unit 170_4 are all powered off, that is, the circuits of the system on chip 100_4 except for the circuits required for the system on chip 100_4 to exit the shipping mode Except that the wake-up unit 170_4 is powered, other circuit units of the system-on-chip 100_4 are not powered, which can further save the power of the battery 300_4, reduce the power consumption of the battery 300_4, and further improve the power retention time of the battery 300_4. The charge retention time of the battery 300_4 of the capacity.

In this embodiment, when the shipping pin CTL_4 receives the first signal, the SoC 100_4 is triggered to generate a shipping control signal to enter the shipping mode. However, the present application is not limited thereto. In other embodiments of the present application, the system on chip 100_4 can directly enter the shipping mode when the shipping pin CTL_4 receives the first signal.

In this embodiment, when the shipping pin CTL_4 receives the first signal, there are three ways to trigger the system-on-chip 100_4 to generate the shipping control signal, which will be described below. Of course, when the shipping pin CTL_4 receives the first signal, the manner of triggering the SoC 100_4 to generate the shipping control signal is not limited to the following three. In other embodiments of the present application, those skilled in the art can also set other conventional circuits to trigger the system-on-chip 100_4 to generate a shipping control signal.

1. In an embodiment of the present application, please refer to FIG. 30 and FIG. 31 , the first signal includes a pulse signal, and the system-on-chip 100_4 further includes a pulse counting unit 420_4 and a third resistor R3_4 . Here, the shipping pin CTL_4 is at a low level by default. In this embodiment, the shipping pin CTL_4 is grounded to a low level through the third resistor R3_4, and the pulse counting unit 420_4 outputs a low level signal under normal conditions. , the shipping pin CTL_4 is electrically connected to the pulse counting unit 420_4. When the shipping pin CTL_4 receives the first signal, the pulse counting unit 420_4 counts the pulses, and the pulse counting unit 420_4 triggers counting with a rising edge. or equal to the first predetermined number, the output signal of the pulse counting unit 420_4 changes from low level to high level, and the high level at this time is the shipping control signal, wherein the first predetermined time period and the first predetermined number are The system-on-chip 100_4 is preset, the first predetermined time period is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, etc., and the first predetermined number is, for example, 3, 4, 5, etc. This design can prevent false triggering. In this embodiment, the output end of the pulse counting unit 420_4 is connected to the overcharge voltage protection unit 110_4, the overdischarge voltage protection unit 190_4, the discharge overcurrent protection unit 130_4, the reference voltage generation unit 140_4, the frequency generation unit 150_4, and the control unit 160_4 respectively. The units whose power supply needs to be stopped are electrically connected to stop the power supply of the units of the system-on-chip 100_4 except the wake-up unit 170_4. In addition, in other embodiments of the present application, the output terminal of the pulse counting unit 420_4 outputs a high level under normal conditions, and at this time, a low level is a shipping control signal. In this embodiment, the pulse counting unit 420_4 is provided separately from the control unit 160_4. In addition, in other embodiments of the present application, the pulse counting unit 420_4 may also be integrated into the control unit 160_4.

2. In an embodiment of the present application, please refer to FIG. 32 and FIG. 33 , the first signal includes a continuous high-level signal or a continuous low-level signal, and the system-on-chip 100_4 further includes a first timing unit 430_4 and a third resistor R3_4 . Here, the shipping pin CTL_4 is at a low level by default. In this embodiment, the shipping pin CTL_4 is grounded through the third resistor R3_4 to achieve a low level, and the first timing unit 430_4 outputs a low level under normal conditions. signal, the shipping pin CTL_4 is electrically connected to the first timing unit 430_4. When the first signal received by the shipping pin CTL_4 is a high level signal, that is, when the signal received by the shipping pin CTL_4 changes from a low level to a high level, the first timing unit 430_4 triggers the timing, and the first timing The unit 430_4 triggers timing with a rising edge. When the duration of the high-level signal received by the first timing unit 430_4 is greater than or equal to the second predetermined time period T1, the output signal of the first timing unit 430_4 changes from a low level to a high level, The high-level signal at this time is the shipping control signal, wherein the second predetermined time period T1 is preset by the SoC 100_4, and the second predetermined time period T1 is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second Waiting time period, this design can prevent false triggering. In this embodiment, the output end of the first timing unit 430_4 is respectively connected with the overcharge voltage protection unit 110_4 , the overdischarge voltage protection unit 190_4 , the discharge overcurrent protection unit 130_4 , the reference voltage generation unit 140_4 , the frequency generation unit 150_4 , and the control unit The units whose power supply needs to be stopped, such as 160_4, are electrically connected to stop the power supply of the units other than the wake-up unit 170_4 of the system on chip 100_4. In addition, in other embodiments of the present application, the output end of the first timing unit 430_4 outputs a high-level signal under normal conditions, and at this time, the low-level signal is a shipping control signal. In this embodiment, the first timing unit 430_4 is provided separately from the control unit 160_4. In addition, in other embodiments of the present application, the first timing unit 430_4 may also be integrated into the control unit 160_4.

3. Please refer to FIG. 29. Generally speaking, the conventional SoC 100_4 or battery 300_4 protection circuit, when the battery 300_4 is deeply discharged, the conventional SoC 100_4 or battery 300_4 protection circuit detects through the over-discharge voltage protection unit 190_4. When the battery 300_4 is deeply discharged, the over-discharge voltage protection unit 190_4 sends a signal to the control unit 160_4, and the control unit 160_4 passively controls the first switch unit 180_4 to disconnect through the control pin CTR_4, and passively controls the system-on-chip 100_4 except the charge detection unit or The battery 300_4 protection circuit is stopped to supply power to protect the battery 300_4 and prevent the battery 300_4 from being damaged due to over-discharge, until the system on chip 100_4 or the battery 300_4 protection circuit resumes power supply after the charging detection unit detects the charging signal, and the first switch unit 180_4 is turned off to Power is restored to the system circuit 200_4. In an embodiment of the present application, the original circuit and functions of the over-discharge voltage protection unit 190_4 in the prior art are fully utilized, and the control pin CTR_4 is used to actively control the first switch unit 180_4 to be disconnected, and to actively control the charge removal detection unit. The power supply of the other system-on-chip 100_4 is stopped, which can reduce the cost. Specifically, please refer to FIG. 34 to FIG. 36 , the over-discharge voltage protection unit 190_4 includes a comparator 191_4 and a second timing unit 192_4 . The comparator 191_4 has a same-direction terminal and two reverse terminals, and the two reverse terminals are respectively are the first reverse terminal and the second reverse terminal, the output terminal of the comparator 191_4 is electrically connected to the second timer, the non-inverting terminal of the comparator 191_4 is connected to a reference voltage, and the first reverse terminal of the comparator 191_4 is electrically connected to the battery The output voltage detection point of 300_4 is used to detect whether the battery 300_4 is deeply discharged. The first signal includes a continuous high level signal, the system on chip 100_4 further includes a second switch unit 440_4 and a first resistor R1_4, the control end of the second switch unit 440_4 is electrically connected to the shipping pin CTL_4, and the second switch unit 440_4 The input end is grounded, the output end of the second switch unit 440_4 is electrically connected to one end of the first resistor R1_4, the other end of the first resistor R1_4 is connected to a high level, and the output end of the second switch unit 440_4 is also connected to the overdischarge voltage protection unit 190_4 The second reverse terminal of the comparator 191_4 is electrically connected, wherein the low level priority of the first reverse terminal and the second reverse terminal is higher, that is, when either the first reverse terminal or the second reverse terminal When the first is a low level, the reverse terminal of the comparator 191_4 is a low level at this time. In this embodiment, when the shipping pin CTL_4 receives the first signal, the second switch unit 440_4 is turned on, the second reverse terminal of the comparator 191_4 is grounded, and the reverse terminal of the comparator 191_4 is low. Therefore, the comparator 191_4 outputs a high level. When the duration of the high level received by the second timing unit 192_4 is greater than or equal to the third predetermined time period T2, a shipping control signal is triggered, and the shipping control signal is high level signal. Furthermore, by using the existing over-discharge voltage protection unit 190_4, the first switch unit 180_4 is controlled to be turned off through the control pin CTR_4, and the power supply of the system-on-chip 100_4 other than the charging detection unit is controlled to be stopped. The third predetermined time period T2 is preset by the SoC 100_4, and the third predetermined time period T2 is, for example, 10 seconds, 5 seconds, 3 seconds, etc., which can prevent false triggering. In this embodiment, the second switch unit 440_4 is an NMOS transistor. However, the present application is not limited thereto. In other embodiments of the present application, the second switch unit 440_4 may also be a PMOS transistor, and at this time, the first signal includes a continuous low-level signal.

In this embodiment, please refer to FIG. 27 and FIG. 29 in combination, the system-on-chip 100_4 further includes a system ground pin VM_4, the system ground pin VM_4 is used for electrical connection with the system circuit 200_4, and the system ground pin VM_4 is also used for Charge.

Fifth Embodiment

The fifth embodiment is based on the second embodiment, and a new control pin CTR_5 is added to the SoC 100_5. Referring to FIG. 37 and FIG. 38, the control pin CTR_5 is electrically connected to the control unit 160_5 inside the SoC 100_5, and the control pin CTR_5 is electrically connected to the control unit 160_5. The pin CTR_5 is used for electrical connection with the first switch unit 180_5, and the control unit 160_5 controls the on-off of the first switch unit 180_5 through the control pin CTR_5. In this embodiment, the number of control pins CTR_5 is one. However, the present application is not limited thereto, and in other embodiments of the present application, the number of control pins CTR_5 may be multiple.

In this embodiment, the first switch unit 180_5 includes a switch tube and a substrate control circuit, the switch tube is a MOS tube, and the control end of the switch tube is electrically connected to the system-on-chip 100_5, specifically the control unit of the system-on-chip 100_5 mentioned later 160_5 is electrically connected, and the substrate control circuit is electrically connected to the control unit 160_5 of the system-on-chip 100_5, and the substrate control circuit is used to realize the correct bias of the substrate of the switch tube. However, the present application is not limited thereto. In other embodiments of the present application, the first switch unit 180_5 may further include a charge switch and a discharge switch, wherein the charge switch and the discharge switch are both MOS transistors, and the charge switch and the discharge switch are respectively connected to the control The unit 160_5 is electrically connected. In addition, in other embodiments of the present application, the first switch unit 180_5 may also be implemented in other forms, for example, including only one switch tube. In this embodiment, the first switch unit 180_5 is used to control the battery 300_5 to supply power to the system circuit 200_5 , specifically, the battery 300_5 , the system circuit 200_5 , and the first switch unit 180_5 form a loop to supply power to the system-on-chip 100_5 . Specifically, the control terminal of the first switch unit 180_5 is electrically connected to the control unit 160_5, the input terminal of the first switch unit 180_5 is used for electrical connection with the battery 300_5, for example, the negative terminal of the battery 300_5 is electrically connected, and the input terminal of the first switch unit 180_5 is electrically connected to The output terminal is used for electrical connection with the system circuit 200_5, so that the battery 300_5, the system circuit 200_5, and the first switch unit 180_5 form a power supply loop. powered by. In this embodiment, the first switch unit 180_5 is implemented outside the system-on-chip 100_5, but in other embodiments of the present application, the first switch unit 180_5 may also be implemented on the system-on-chip 100_5.

In this embodiment, please refer to FIG. 37 and FIG. 39 in combination, the system-on-chip 100_5 includes a power supply pin VDD_5, a power supply ground pin GND_5, an overcharge voltage protection unit 110_5, an overdischarge voltage protection unit 190_5, and a discharge and overcurrent protection unit 130_5, a reference voltage generating unit 140_5, a frequency generating unit 150_5, a control unit 160_5, a wake-up unit 170_5, and a control pin CTR_5.

In this implementation, please continue to refer to FIG. 37 and FIG. 39 , the power supply pin VDD_5 is also electrically connected to the shipping output terminal 210_5 of the system circuit 200_5 , so that the output of the battery 300_5 power is divided into two from the power supply pin VDD_5 Branch, one branch enters the system-on-chip 100_5 through the power supply pin VDD_5, and one branch enters the system circuit 200_5 through the shipping outlet 210_5. When the control system circuit 200_5 is controlled inside the system circuit 200_5, the signal of the shipping outlet 210_5 changes. At this time, the voltage signal of the power supply pin VDD_5 changes accordingly. At this time, the system-on-chip 100_5 is in the shipping mode. In the shipping mode, the system-on-chip 100_5 outputs a control signal for turning off the first switch unit 180_5 to control the The pin CTR_5 is used to stop the battery 300_5 from supplying power to the system circuit 200_5, and at least some units of the system on chip 100_5 are stopped from supplying power. In this embodiment, controlling the inside of the system circuit 200_5 to change the signal of the shipping outlet 210_5 can be implemented either by software or by hardware. For example, it is realized by the power button or the sound button. For example, the signal on the shipping outlet 210_5 can be changed by long pressing the power button.

In this embodiment, the wake-up unit 170_5 is continuously powered by the battery 300_5 in the shipping mode, and the wake-up unit 170_5 is used to make the system-on-chip 100_5 exit the shipping mode. In the present embodiment, since the wake-up unit 170_5 is a charging detection circuit, and the charging detection circuit is an existing circuit of the system-on-chip 100_5, such a design can save costs. In this embodiment, when the electronic device is charged, the charging detection circuit detects the charging signal, and the system-on-chip 100_5 automatically exits the shipping mode. Since the power of the battery 300_5 can be maintained for a long time, the electronic device can be normally turned on for use. In addition, in other embodiments of the present application, the wake-up unit 170_5 may not be a charging detection circuit, but may also be other newly added hardware circuits specially used to make the system-on-chip 100_5 exit the shipping mode. Those skilled in the art may Design the circuit according to specific requirements.

In this embodiment, when the electronic device needs to be transported or stored for a long time, the SoC 100_5 of the electronic device can enter the shipping mode. In the shipping mode, the control unit 160_5 of the SoC 100_5 controls the pin CTR_5 controls the first switch unit 180_5 to be turned off, which can greatly save the power of the battery 300_5. Moreover, in the shipping mode, at least some units of the system on chip 100_5 are powered off, so that the battery 300_5 only needs to provide a few wake-up circuits for the system on chip 100_5. The circuit unit continues to supply power, so that the power consumption of the battery 300_5 is further reduced, which can reduce the current consumption of the electronic device. The current consumption can be as low as several nA/h, so that the power retention time of the battery 300_5 can be improved, even if the capacity of the battery 300_5 itself is compared In small cases, the power of the battery 300_5 can also be maintained for half a year to a year in the shipping mode. After the user gets the electronic device, the user only needs to wake up the unit 170_5 to make the SoC 100_5 exit the shipping mode and turn on the electronic device. That is, it can be used normally, which improves the user's experience and prevents the user from mistakenly thinking that the quality of the electronic device itself is a problem.

In this embodiment, at least some units of the system on chip 100_5 are powered off during the shipping mode. In this embodiment, at least one of the overcharge voltage protection unit 110_5 , the overdischarge voltage protection unit 190_5 , the discharge overcurrent protection unit 130_5 , the control unit 160_5 , the reference voltage generation unit 140_5 and the frequency generation unit 150_5 of the system on chip 100_5 is Stop power supply, for example, one of the overcharge voltage protection unit 110_5, the overdischarge voltage protection unit 190_5, the discharge overcurrent protection unit 130_5, the control unit 160_5, the reference voltage generation unit 140_5 and the frequency generation unit 150_5 is stopped in the shipping mode power supply, or two of the overcharge voltage protection unit 110_5, the overdischarge voltage protection unit 190_5, the discharge overcurrent protection unit 130_5, the control unit 160_5, the reference voltage generation unit 140_5 and the frequency generation unit 150_5 are powered off in the shipping mode, Or in the shipping mode, three of the overcharge voltage protection unit 110_5, the overdischarge voltage protection unit 190_5, the discharge overcurrent protection unit 130_5, the control unit 160_5, the reference voltage generation unit 140_5 and the frequency generation unit 150_5 are powered off, ..., Or in the shipping mode, the overcharge voltage protection unit 110_5 , the overdischarge voltage protection unit 190_5 , the discharge overcurrent protection unit 130_5 , the control unit 160_5 , the reference voltage generation unit 140_5 and the frequency generation unit 150_5 are all powered off. Reduce the consumption of battery 300_5 power. In addition, in other embodiments of the present application, the system-on-chip 100_5 further includes a temperature protection unit 410_5, a charging overcurrent protection unit 120_5, etc. In the shipping mode, the temperature protection unit 410_5 and the charging overcurrent protection unit 120_5 may not be powered, It can also be powered, which is also the scope of protection of this application. In this embodiment, when the system on chip 100_5 enters the shipping mode, the power supply of the circuit units of the system on chip 100_5 except the wake-up unit 170_5 is all stopped, that is, the system on chip 100_5 is not required to exit the shipping mode except for the system on chip 100_5 Except that the wake-up unit 170_5 is powered, other circuit units of the system-on-chip 100_5 are not powered, which can further save the power of the battery 300_5, reduce the power consumption of the battery 300_5, and further improve the power retention time of the battery 300_5. The power retention time of the small-capacity battery 300_5.

In this embodiment, there are the following ways to realize the change of the signal of the shipping output terminal 210_5 of the system circuit 200_5 to cause the voltage signal received by the power supply pin VDD_5 to change, which will be described separately below. Of course, the way to realize the change of the signal of the shipping output terminal 210_5 of the system circuit 200_5 to cause the change of the voltage signal received by the power supply pin VDD_5 is not limited to the following. Personnel can also set other conventional circuits to realize the change of the signal of the shipping output terminal 210_5 of the system circuit 200_5 to cause the voltage signal received by the power supply pin VDD_5 to change.

1. In an embodiment of the present application, please refer to FIG. 37 , FIG. 39 and FIG. 40 , when the number of pulses received by the power supply pin VDD_5 within a predetermined period of time is greater than or equal to the first predetermined number, the system-on-chip 100_5 Enter shipping mode. Specifically, the shipping outlet 210_5 is electrically connected to the power supply pin VDD_5 via a second resistor R2_5. The second resistor R2_5 and the first resistor R1_5 have the same resistance value. Under normal conditions, the shipping outlet 210_5 is in a high resistance state. It is considered that the shipping output terminal 210_5 is controlled to be disconnected by a switch, and the voltage signal received by the power supply pin VDD_5 is only affected by the battery 300_5, and is not affected by the shipping output terminal 210_5 of the SoC 100_5. When the ship transportation outlet 210_5 is controlled by the system circuit 200_5 to output a pulse signal, for example, the switch is closed at this time, the high level of the pulse signal is, for example, the battery voltage, and the low level of the pulse signal is, for example, 0V. When the shipping output terminal 210_5 is at a high level, the voltage at the power supply pin VDD_5 is the battery voltage. When the shipping output terminal 210_5 is at 0V, the first resistor R1_5 and the second resistor R2_5 divide the battery voltage, and the power supply leads The voltage at the pin VDD_5 is lower than the battery voltage, which is half the battery voltage in this embodiment, so the voltage at the power supply pin VDD_5 is also a pulse voltage, and the high level of the pulse voltage at the power supply pin VDD_5 is the battery voltage voltage, the low level is half the battery voltage. In this embodiment, the system-on-chip 100_5 further includes a pulse counting unit 420_5. The pulse counting unit 420_5 outputs a low level signal under normal conditions, and the power supply pin VDD_5 is electrically connected to the pulse counting unit 420_5. When the power supply pin VDD_5 also outputs a pulse signal due to the output of the pulse signal from the shipping outlet 210_5, the pulse counting unit 420_5 counts the pulses. When the pulse counting unit 420_5 receives the pulse signal within the first predetermined period When the number of received pulses is greater than or equal to the first predetermined number, the output signal of the pulse counting unit 420_5 changes from low level to high level, wherein the first predetermined time period and the first predetermined number are preset by the system on chip 100_5, The first predetermined time period is, for example, 10 seconds, 5 seconds, 3 seconds, 1 second, etc., and the first predetermined number is, for example, 3, 4, 5, etc., such a design can prevent false triggering. In this embodiment, the output end of the pulse counting unit 420_5 is connected to the overcharge voltage protection unit 110_5 , the overdischarge voltage protection unit 190_5 , the discharge overcurrent protection unit 130_5 , the reference voltage generation unit 140_5 , the frequency generation unit 150_5 , and the control unit 160_5 respectively. When the units whose power supply needs to be stopped are electrically connected, when the pulse counting unit 420_5 outputs a high level, the power supply to the units of the system on chip 100_5 other than the wake-up unit 170_5 can be controlled to be stopped. In addition, in other embodiments of the present application, the output terminal of the pulse counting unit 420_5 outputs a high level under normal conditions, and at this time, the pulse counting unit 420_5 outputs a low level for controlling to stop the system on chip 100_5 except the wake-up unit 170_5. power supply to external units. In this embodiment, the pulse counting unit 420_5 is provided separately from the control unit 160_5. In addition, in other embodiments of the present application, the pulse counting unit 420_5 may also be integrated into the control unit 160_5. In addition, in other embodiments of the present application, the pulse counting unit 420_5 may be used to control to stop the power supply to some units of the system-on-chip 100_5.

2. Please refer to FIG. 38. Generally speaking, when the battery 300_5 is deeply discharged, the conventional SoC 100_5 or the battery protection circuit detects the battery 300_5 through the over-discharge voltage protection unit 190_5. Deep discharge, specifically, by detecting whether the voltage at the power supply pin VDD_5 is lower than a preset threshold voltage to determine whether it is deeply discharged, if it is lower than the preset preset voltage, the over-discharge voltage protection unit 190_5 determines that the battery 300_5 is in deep discharge state, the over-discharge voltage protection unit 190_5 sends a signal to the control unit 160_5, the control unit 160_5 passively controls the first switch unit 180_5 to turn off through the control pin CTR_5, and passively controls the system-on-chip 100_5 or the battery protection circuit except the charge detection unit The power supply is stopped to protect the battery 300_5 and prevent the battery 300_5 from being damaged due to over-discharge. After the charging detection unit detects the charging signal, the on-chip system 100_5 or the battery protection circuit restores power supply, and the first switch unit 180_5 is turned off to restore the power supply to the system circuit 200_5. powered by. In an embodiment of the present application, the original circuit and functions of the over-discharge voltage protection unit 190_5 in the prior art are fully utilized to actively control the first switch unit 180_5 to be disconnected through the control pin CTR_5, and actively control the charge removal detection unit The power supply of the other system-on-chip 100_5 is stopped, which can reduce the cost while improving the power retention time of the battery 300_5. Specifically, please refer to FIG. 41-FIG. 42. The shipping output terminal 210_5 of the system circuit 200_5 is electrically connected to the power supply pin VDD_5 via the second resistor R2_5. The second resistor R2_5 and the first resistor R1_5 have the same resistance value. The disembarkation transportation outlet 210_5 is in a high resistance state. Specifically, in this embodiment, the system circuit 200_5 includes a second switch unit 220_5, and the input terminal of the second switch unit 220_5 is connected to a first level, where the first level is 0, that is, grounded, However, the first level may not be 0, as long as the voltage at the power supply pin VDD_5 is lower than the preset threshold voltage when the second switch unit 220_5 is turned on. The output end of the second switch is electrically connected to one end of the second resistor R2_5, the other end of the second resistor R2_5 is electrically connected to the power supply pin VDD_5, and the control end of the second switch unit 220_5 is controlled by the hardware of the system circuit 200_5 Or software control, under normal conditions, the second switch unit 220_5 is disconnected, and the shipping outlet 210_5 is in a high-impedance state. When the SoC 500_5 needs to enter the shipping mode, the user can control the second switch through software or hardware. The unit 220_5 is turned off. At this time, the branch formed by the power supply pin VDD_5, the second resistor R2_5, and the second switch unit 220_5 is turned on. Since the second resistor R2_5 and the first resistor R1_5 have the same resistance value, the second resistor R2_5 and the first resistor R2_5 have the same resistance value. A resistor R1_5 divides the battery voltage, so that the voltage signal received at the power supply pin VDD_5 is reduced. In this embodiment, it is reduced to half the battery voltage. Generally, half the battery voltage will be lower than the preset threshold set by deep discharge. Generally speaking, the power supply voltage of the battery 300_5 is in the range of 2.8V-4.2V, the threshold voltage of deep discharge is generally 2.8V, and half of the battery voltage range is 1.4V-2.1V, which is lower than the threshold voltage of deep discharge. Therefore, when the second switch unit 220_5 is turned on, the over-discharge voltage protection unit 190_5 detects that the voltage of the power supply pin VDD_5 is lower than the threshold voltage. At this time, the over-discharge voltage protection unit 190_5 controls the first switch unit 180_5 through the control pin CTR_5 Disconnected, and control the other units of the system-on-chip 500_5 except the charge detection unit to stop power supply. In this embodiment, the second switch unit 220_5 is an NMOS transistor. However, the present application is not limited thereto, and in other embodiments of the present application, the second switch unit 220_5 may also be a PMOS transistor. Generally speaking, the SoC 500_5 has two protection modes for deep discharge: over-discharge recoverable mode and over-discharge non-recoverable mode, which can be set by users or manufacturers as needed. When the SoC 500_5 is in the over-discharge recoverable mode, the When the discharge voltage protection unit 190_5 detects that the voltage of the power supply pin VDD_5 is lower than the preset threshold voltage (eg, false detection), it controls the first switch unit 180_5 to be disconnected through the control pin CTR_5, and the on-chip other than the charge detection unit The power supply of the system 500_5 is stopped. When the voltage of the power supply pin VDD_5 increases to above the preset threshold voltage, the power supply of the system on chip 500_5 is automatically restored by the unit whose power supply is stopped, and the first switch unit 180_5 is turned on; when the system on chip 500_5 is in In the over-discharge non-recoverable mode, when the over-discharge voltage protection unit 190_5 detects that the voltage of the power supply pin VDD_5 is lower than the preset threshold voltage, it controls the first switch unit 180_5 to turn off through the control pin CTR_5, and other than the charging detection unit All other SoCs 500_5 are powered off. In this mode, even if the voltage at the power supply pin VDD_5 increases to above the preset threshold voltage, the first switch unit 180_5 remains disconnected, except for the charge detection unit. The power supply of the system on chip 500_5 continues to be stopped. In this case, only when the charging detection module detects the charging signal, the power supply of the unit of the system on chip 500_5 whose power supply is stopped is restored, and the first switch unit 180_5 is turned on. In this embodiment, the system-on-chip 500_5 works in the over-discharge non-recoverable mode. At this time, in the shipping mode, the second switch unit 220_5 is disconnected because it is not powered, and the first switch unit 180_5 remains disconnected, except for charging The system-on-chip 500_5 other than the detection unit continues to be powered off, which is beneficial for maintaining the power of the battery 300_5.

3. On the basis of method 1, in an embodiment of the present application, the original circuit and functions of the over-discharge voltage protection unit 190_5 of the prior art are fully utilized to realize the active control of the first switch unit 180_5 through the control pin CTR_5. It is turned on, and the power supply of the system-on-chip 100_5 except the charging detection unit is actively controlled to be stopped, which can reduce the cost. Specifically, referring to FIG. 37 , FIG. 43 and FIG. 44 , the over-discharge voltage protection unit 190_5 includes a comparator 191_5 , and the comparator 191_5 has a same-direction terminal and two reverse terminals, and the two reverse terminals are the first The reverse terminal and the second reverse terminal, the non-inverting terminal of the comparator 191_5 is connected to a reference voltage, and the first reverse terminal of the comparator 191_5 is electrically connected to the output voltage detection point of the battery 300_5 for detecting whether the battery 300_5 is deeply discharged. are electrically connected to the voltage supply pins. In this embodiment, the system-on-chip 100_5 further includes a third switch unit 440_5 and a third resistor R3_5, the control terminal of the third switch unit 440_5 is electrically connected to the output terminal of the pulse counting unit 420_5, and the input terminal of the third switch unit 440_5 is grounded , the output end of the third switch unit 440_5 is electrically connected to one end of the third resistor R3_5, the other end of the third resistor R3_5 is connected to a high level, and the output end of the third switch unit 440_5 is also connected to the comparator of the overdischarge voltage protection unit 190_5 The second reverse terminal of 191_5 is electrically connected, wherein the low level priority of the first reverse terminal and the second reverse terminal is higher, that is, when one of the first reverse terminal or the second reverse terminal is low When the level is low, the reverse terminal of the comparator 191_5 is at a low level. In this embodiment, when the pulse counting unit 420_5 outputs a high level, the third switch unit 440_5 is turned on, at this time, the second reverse terminal of the comparator 191_5 is grounded, and at this time, the reverse terminal of the comparator 191_5 is at a low level, Therefore, the output of the comparator 191_5 changes from low level to high level, thereby controlling the first switch unit 180_5 to be disconnected through the control pin CTR_5, and controlling the power supply of the system on chip 100_5 except the charging detection unit to be stopped. In this embodiment, the third switch unit 440_5 is an NMOS transistor. However, the present application is not limited thereto. In other embodiments of the present application, the third switch unit 440_5 may also be a PMOS transistor. At this time, the pulse counting unit 420_5 outputs a low level to turn on the third switch unit 440_5. In this embodiment, the system-on-chip 100_5 works in an over-discharge irrecoverable mode.

In this embodiment, please refer to FIG. 37 and FIG. 39 in combination, the system-on-chip 100_5 further includes a system ground pin VM_5, the system ground pin VM_5 is used for electrical connection with the system circuit 200_5, and the system ground pin VM_5 is also used for Charge.

Sixth Embodiment

In the sixth embodiment, on the basis of the second embodiment, a first test pad and a second test pad are added to the battery protection circuit 100_6. Please refer to FIG. 45 and FIG. 46. The power supply terminal VDD_6 passes through the second resistor. R2_6 is electrically connected to the first test pad A, so that when the first test pad A and the second test pad B are short-circuited, the output of the battery 300_6 is divided into two branches from the power supply terminal VDD_6, one branch Entering the battery protection circuit 100_6 through the power supply terminal VDD_6, a branch passes through the power supply terminal VDD_6 and the second resistor R2_6, causing the voltage signal of the power supply terminal VDD_6 to change accordingly. When the voltage of the power supply terminal VDD_6 is lower than the over-discharge protection voltage and the time exceeds the over-discharge delay time, the battery protection circuit 100_6 enters the sleep mode, and the first switch unit 180_6 is turned off to stop the battery 300_6 in the sleep mode. Power is supplied to the system circuit 200_6, and at least some cells of the battery protection circuit 100_6 are powered off.

In this embodiment, please refer to FIG. 45 and FIG. 46 in combination, the battery protection circuit 100_6 includes a power supply terminal VDD_6, a power ground terminal GND_6, an overcharge voltage protection unit 110_6, an overdischarge voltage protection unit 190_6, and a discharge overcurrent protection unit 130_6 , a reference voltage generation unit 140_6, a frequency generation unit 150_6, a control unit 160_6, a wake-up unit 170_6, and a first switch unit 180_6.

In this embodiment, the first switch unit 180_6 includes a switch tube and a substrate control circuit, the switch tube is a MOS tube, the control end of the switch tube is electrically connected to the control unit 160_6, the substrate control circuit is electrically connected to the control unit 160_6, and the substrate is electrically connected to the control unit 160_6. The bottom control circuit is used to realize the correct bias of the substrate of the switch tube. However, the present application is not limited thereto. In other embodiments of the present application, the first switch unit 180_6 may also include a charge switch and a discharge switch, wherein the charge switch and the discharge switch are both MOS transistors, and the charge switch and the discharge switch are respectively connected to The control unit 160_6 is electrically connected. In addition, in other embodiments of the present application, the first switch unit 180_6 may also be implemented in other forms, for example, including only one switch tube. In this embodiment, the first switch unit 180_6 is used to control the battery 300_6 to supply power to the system circuit 200_6, specifically, a loop is formed by the battery 300_6, the system circuit 200_6, and the first switch unit 180_6 of the battery protection circuit 100_6 to supply power to the battery protection circuit 100_6. Specifically, the control terminal of the first switch unit 180_6 is electrically connected to the control unit 160_6, and the input terminal of the first switch unit 180_6 is used to electrically connect to the battery 300_6, for example, to the power ground terminal GND_6 of the battery protection circuit 100_6. The output end of a switch unit 180_6 is used for electrical connection with the system circuit 200_6, so that the battery 300_6, the battery protection circuit 100_6, and the first switch unit 180_6 form a power supply loop. Whether the battery 300_6 supplies power to the system circuit 200_6 can be controlled.

In this embodiment, the wake-up unit 170_6 is continuously powered by the battery 300_6 in the sleep mode, and the wake-up unit 170_6 is used to make the battery protection circuit 100_6 exit the sleep mode. In the present embodiment, since the wake-up unit 170_6 is a charging detection circuit, and the charging detection circuit is an original circuit of the battery protection circuit 100_6, this design can save costs. In this embodiment, when the electronic device is being charged, the charging detection circuit detects the charging signal, and the battery protection circuit 100_6 automatically exits the sleep mode. Since the battery 300_6 can be maintained for a long time, the electronic device can be powered on normally. In addition, in other embodiments of the present application, the wake-up unit 170_6 may not be a charging detection circuit, but may also be another newly added hardware circuit specially used to make the battery protection circuit 100_6 exit the sleep mode. Those skilled in the art may Design the circuit according to specific requirements.

In this embodiment, when the electronic device needs to be transported or stored for a long time, the battery protection circuit 100_6 of the electronic device can enter the sleep mode. In the sleep mode, the first switch unit 180_6 is turned off, so that the battery 300_6 cannot Supplying power to the system circuit 200_6 can save a lot of power of the battery 300_6. Moreover, in the sleep mode, at least some units of the battery protection circuit 100_6 are powered off, so that the battery 300_6 only needs to continue to supply a few circuit units such as the wake-up circuit of the battery protection circuit 100_6. power supply, so that the power consumption of the battery 300_6 is further reduced, which can reduce the current consumption of the electronic device, and the current consumption can be as low as several nA/h, so that the power retention time of the battery 300_6 can be improved, even if the capacity of the battery 300_6 itself is relatively small. , the power of the battery 300_6 can also be maintained for half a year to a year in the sleep mode. After the user gets the electronic device, the user only needs to wake up the unit 170_6 to make the battery protection circuit 100_6 exit the sleep mode, and the electronic device can be used normally after powering on. , which improves the user experience and prevents users from mistaking the quality of the electronic device itself.

In this embodiment, in the sleep mode, at least some units of the battery protection circuit 100_6 are powered off. In this embodiment, at least one of the overcharge voltage protection unit 110_6 , the overdischarge voltage protection unit 190_6 , the discharge overcurrent protection unit 130_6 , the control unit 160_6 , the reference voltage generation unit 140_6 and the frequency generation unit 150_6 of the battery protection circuit 100_6 Power supply is stopped, for example, one of the overcharge voltage protection unit 110_6, the overdischarge voltage protection unit 190_6, the discharge overcurrent protection unit 130_6, the control unit 160_6, the reference voltage generation unit 140_6 and the frequency generation unit 150_6 is stopped in the sleep mode power supply, or two of the overcharge voltage protection unit 110_6, the overdischarge voltage protection unit 190_6, the discharge overcurrent protection unit 130_6, the control unit 160_6, the reference voltage generation unit 140_6 and the frequency generation unit 150_6 are powered off during the sleep mode, or In the sleep mode, three of the overcharge voltage protection unit 110_6, the overdischarge voltage protection unit 190_6, the discharge overcurrent protection unit 130_6, the control unit 160_6, the reference voltage generation unit 140_6 and the frequency generation unit 150_6 are powered off, . . . , or at In the sleep mode, the overcharge voltage protection unit 110_6 , the overdischarge voltage protection unit 190_6 , the discharge overcurrent protection unit 130_6 , the control unit 160_6 , the reference voltage generation unit 140_6 and the frequency generation unit 150_6 are all powered off, and the battery 300_6 can be further reduced at this time. power consumption. In addition, in other embodiments of the present application, the battery protection circuit 100_6 further includes a temperature protection unit 410_6, a charging overcurrent protection unit 120_6, etc. In the sleep mode, the temperature protection unit 410_6 and the charging overcurrent protection unit 120_6 may not be powered, It can also be powered, which is also the scope of protection of this application. In this embodiment, when the battery protection circuit 100_6 enters the sleep mode, the circuit units of the battery protection circuit 100_6 except the wake-up unit 170_6 are all stopped from supplying power, that is, the battery protection circuit 100_6 is used to make the battery protection circuit 100_6 exit the sleep mode. Except that the required wake-up unit 170_6 is powered, other circuit units of the battery protection circuit 100_6 are not powered, so that the power of the battery 300_6 can be further saved, the power consumption of the battery 300_6 can be reduced, and the power retention time of the battery 300_6 can be further improved. In particular, the power retention time of the small-capacity battery 300_6 can be improved.

In this embodiment, there are several ways to realize that the voltage of the power supply terminal VDD_6 is lower than the over-discharge protection voltage, which will be described below. Of course, the methods of changing the voltage of the power supply terminal VDD_6 by adding test solder joints are not limited to the following methods. Those skilled in the art can also set other conventional circuits to realize the operation of the test solder joints to cause the power supply terminal VDD_6 to receive The received voltage signal changes.

1. Please refer to FIG. 45 and FIG. 46. Generally speaking, in the conventional battery protection circuit 100_6, when the battery 300_6 is deeply discharged, the conventional battery protection circuit 100_6 detects the deep discharge of the battery 300_6 through the over-discharge voltage protection unit 190_6. Specifically, In order to determine whether the deep discharge is carried out by detecting whether the voltage at the power supply terminal VDD_6 is lower than the preset threshold voltage, if it is lower than the preset preset voltage, the overdischarge voltage protection unit 190_6 determines that the battery 300_6 is in a deep discharge state, and the overdischarge voltage The protection unit 190_6 sends a signal to the control unit 160_6, the control unit 160_6 passively controls the first switch unit 180_6 to be disconnected, and passively controls the battery protection circuit 100_6 except the charging detection unit to stop power supply, for protecting the battery 300_6 and preventing the battery 300_6 Due to over-discharge damage, until the battery protection circuit 100_6 restores power after the charging detection unit detects the charging signal, the first switch unit 180_6 is turned off to restore power to the system circuit 200_6.

In an embodiment of the present application, the original circuit and functions of the over-discharge voltage protection unit 190_6 in the prior art are fully utilized to actively control the disconnection of the first switch unit 180_6 and actively control the battery protection except the charging detection unit. The power supply of the circuit 100_6 is stopped, which can reduce the cost while increasing the power retention time of the battery 300_6. Referring to Figure 45, a first test soldering point A and a second testing soldering point B are added to the battery protection circuit. A second resistance is set between the first test pad A and the power supply terminal to realize indirect electrical connection, the second test pad B is electrically grounded, and the first test pad A and the second test pad B are used to electrically connect to the test unit. connect. In this embodiment, the test unit is the test unit is the wire. When the first test pad A and the second test pad B are directly connected with wires, the first test pad A and the second test pad B are conductive, so that the voltage signal received by the power supply terminal is lower than the preset threshold voltage, so that the battery protection circuit enters a sleep mode, in which the first switch unit is turned off to stop the battery supplying power to the system circuit and at least part of the battery protection circuit is stopped from supplying power. Specifically, in FIG. 45 , the power output of the battery 300_6 is divided into two branches from the power supply terminal VDD_6, one branch enters the battery protection circuit 100_6 through the power supply terminal VDD_6, and the other branch passes through the power supply terminal VDD_6, The second resistor R2_6. When the first test pad A and the second test pad B are short-circuited, the branch formed by the power supply terminal VDD_6, the second resistor R2_6 and the circuit is turned on. Since the second resistor R2_6 and the first resistor R1_6 have the same resistance value, Therefore, the second resistor R2_6 and the first resistor R1_6 divide the voltage of the battery, so that the voltage signal received at the power supply terminal VDD_6 decreases, when the voltage of the power supply terminal VDD_6 is lower than the over-discharge protection voltage, and the time exceeds the over-discharge delay time After time, the battery protection circuit 100_6 is in a sleep mode, and the first switch unit 180_6 is turned off in the sleep mode to stop the battery 300_6 from supplying power to the system circuit 200_6, and at least some units of the battery protection circuit 100_6 are stopped from supplying power. In this embodiment, the battery voltage is reduced to half. Generally, half of the battery voltage will be lower than the preset threshold voltage set by the deep discharge. Generally speaking, the power supply voltage of the battery 300_6 is in the range of 2.8V-4.2V, and the deep discharge threshold The voltage is generally 2.8V, while half the battery voltage range is 1.4V-2.1V, which is below the threshold voltage for deep discharge. Therefore, when the first test pad A and the second test pad B are turned on, secondly, the over-discharge voltage protection unit 190_6 detects that the voltage of the power supply terminal VDD_6 is lower than the threshold voltage. At this time, the over-discharge voltage protection unit 190_6 controls the A switch unit 180_6 is turned off, and controls other units of the circuit protection system 100_6 except the charge detection unit to stop supplying power. Generally speaking, the circuit protection system 100_6 has two protection modes for deep discharge: an overdischarge recoverable mode and an overdischarge non-recoverable mode, which can be set by the user or the manufacturer as required. When the circuit protection system 100_6 is in the overdischarge recoverable mode , when the over-discharge voltage protection unit 190_6 detects that the voltage of the power supply terminal VDD_6 is lower than the preset threshold voltage (eg, false detection), the first switch unit 180_6 is turned off, and the circuit protection system 100_6 except the charging detection unit is blocked Stop the power supply, when the voltage of the power supply terminal VDD_6 increases to above the preset threshold voltage, the circuit protection system 100_6 is automatically restored to power supply by the unit whose power supply is stopped, and the first switch unit 180_6 is turned on; when the circuit protection system 100_6 is in the over-discharge cannot In the recovery mode, when the over-discharge voltage protection unit 190_6 detects that the voltage of the power supply terminal VDD_6 is lower than the preset threshold voltage, the first switch unit 180_6 is turned off, and the power supply of the circuit protection system 100_6 except the charging detection unit is stopped. , in this mode, even when the voltage at the power supply terminal VDD_6 increases above the preset threshold voltage, the first switch unit 180_6 remains disconnected, and the circuit protection system 100_6 except the charging detection unit continues to be powered off. In this case, only when the charging detection module detects the charging signal, the unit whose power supply of the circuit protection system 100_6 is stopped will resume power supply, and the first switch unit 180_6 will be turned on. In this embodiment, the circuit protection system 100_6 works in the over-discharge non-recoverable mode. At this time, the circuit protection system 100_6 other than the charging detection unit continues to be stopped from supplying power, which is conducive to maintaining the power of the battery 300_6 .

2. On the basis of the method of 1, in another embodiment of the present application, the original circuit and function of the over-discharge voltage protection unit 190_6 of the prior art are fully utilized to realize the active control of the first switch unit 180_6 to disconnect, and Actively controlling the battery protection circuit 100_6 other than the charging detection unit to stop supplying power can reduce the cost while improving the battery 300_6 power retention time. Please refer to FIG. 47 . Add the first test welding point A and the second test welding point B on the battery protection circuit. The first test pad A and the power supply terminal of the power supply are directly electrically connected, a second resistance is set between the second test pad and the ground, and the first test pad A and the second test pad B are used to electrically connect to the test unit. connect. In this embodiment, the test unit is the test unit is the wire. When the first test pad A and the second test pad B are directly connected with wires, the first test pad A and the second test pad B are turned on, so that the voltage signal received by the power supply terminal is lower than the preset threshold voltage to make the battery protection circuit enter a sleep mode, in which the first switch unit is turned off to stop the battery supplying power to the system circuit and at least part of the battery protection circuit is stopped from supplying power. Specifically, in FIG. 45 , the power output of the battery 300_6 is divided into two branches from the power supply terminal VDD_6, one branch enters the battery protection circuit 100_6 through the power supply terminal VDD_6, and the other branch passes through the power supply terminal VDD_6, The second resistor R2_6. When the first test pad A and the second test pad B are short-circuited, the branch formed by the power supply terminal VDD_6, the second resistor R2_6 and the circuit is turned on. Since the second resistor R2_6 and the first resistor R1_6 have the same resistance value, Therefore, the second resistor R2_6 and the first resistor R1_6 divide the voltage of the battery, so that the voltage signal received at the power supply terminal VDD_6 decreases. When the voltage of the power supply terminal VDD_6 is lower than the over-discharge protection voltage, and the time exceeds the over-discharge delay time After time, the battery protection circuit 100_6 is in a sleep mode, and the first switch unit 180_6 is turned off in the sleep mode to stop the battery 300_6 from supplying power to the system circuit 200_6, and at least some units of the battery protection circuit 100_6 are stopped from supplying power. In this embodiment, the battery voltage is reduced to half. Generally, half of the battery voltage will be lower than the preset threshold voltage set by the deep discharge. Generally speaking, the power supply voltage of the battery 300_6 is in the range of 2.8V-4.2V, and the deep discharge threshold The voltage is generally 2.8V, while half the battery voltage range is 1.4V-2.1V, which is below the threshold voltage for deep discharge. Therefore, when the first test pad A and the second test pad B are turned on, secondly, the over-discharge voltage protection unit 190_6 detects that the voltage of the power supply terminal VDD_6 is lower than the threshold voltage, and at this time, the over-discharge voltage protection unit 190_6 controls the A switch unit 180_6 is turned off, and controls other units of the circuit protection system 100_6 except the charge detection unit to stop supplying power.

3. On the basis of the method of 1, in another embodiment of the present application, the original circuit and function of the over-discharge voltage protection unit 190_6 of the prior art are fully utilized to realize the active control of the first switch unit 180_6 to be disconnected, and Actively controlling the battery protection circuit 100_6 other than the charging detection unit to stop supplying power can reduce the cost while increasing the power retention time of the battery 300_6. Please refer to FIG. 48 . Add the first test welding point A and the second test welding point B on the battery protection circuit. The first test pad A and the power supply terminal are directly electrically connected, the second test pad B is electrically grounded, and the first test pad A and the second test pad B are used for electrical connection with the test unit. In this embodiment, the test unit is a wire and a second resistor, and a second resistor is set between the first test solder point A and the second test point B. When the first test pad A and the second test pad B are electrically connected through the second resistor, the first test pad A, the second test pad B and the second resistor are turned on, causing the power supply end to receive the signal. The voltage signal is lower than a preset threshold voltage, so that the battery protection circuit enters a sleep mode, the first switch unit is turned off in the sleep mode to stop the battery supplying power to the system circuit, and at least part of the battery protection circuit is blocked. Power off. Specifically, in FIG. 45 , the power output of the battery 300_6 is divided into two branches from the power supply terminal VDD_6, one branch enters the battery protection circuit 100_6 through the power supply terminal VDD_6, and the other branch passes through the power supply terminal VDD_6, The second resistor R2_6. When the first test pad A and the second test pad B are short-circuited, the branch formed by the power supply terminal VDD_6, the second resistor R2_6 and the circuit is turned on. Since the second resistor R2_6 and the first resistor R1_6 have the same resistance value, Therefore, the second resistor R2_6 and the first resistor R1_6 divide the voltage of the battery, so that the voltage signal received at the power supply terminal VDD_6 decreases. When the voltage of the power supply terminal VDD_6 is lower than the over-discharge protection voltage, and the time exceeds the over-discharge delay time After time, the battery protection circuit 100_6 is in a sleep mode, and the first switch unit 180_6 is turned off in the sleep mode to stop the battery 300_6 from supplying power to the system circuit 200_6, and at least some units of the battery protection circuit 100_6 are stopped from supplying power. In this embodiment, the battery voltage is reduced to half. Generally, half of the battery voltage will be lower than the preset threshold voltage set by the deep discharge. Generally speaking, the power supply voltage of the battery 300_6 is in the range of 2.8V-4.2V, and the deep discharge threshold The voltage is generally 2.8V, while half the battery voltage range is 1.4V-2.1V, which is below the threshold voltage for deep discharge. Therefore, when the first test pad A and the second test pad B are turned on, secondly, the over-discharge voltage protection unit 190_6 detects that the voltage of the power supply terminal VDD_6 is lower than the threshold voltage, and at this time, the over-discharge voltage protection unit 190_6 controls the A switch unit 180_6 is turned off, and controls other units of the circuit protection system 100_6 except the charge detection unit to stop supplying power.

In this embodiment, referring to FIG. 45 and FIG. 46 in combination, the circuit protection system 100_6 further includes a system ground terminal VM_6, which is used for electrical connection with the system circuit 200_6, and is also used for charging. In this embodiment, a first switch unit 180_6 is disposed between the system ground terminal VM_6 and the power ground terminal GND_6.

In this embodiment, the battery protection circuit 100_6 is implemented on the same chip, that is, the battery protection circuit 100_6 is formed as a whole system on a chip. The system on chip (SOC) is a technology commonly used in the field of integrated circuits. The purpose is to Combining multiple integrated circuits with specific functions on a chip to form a system or product, which includes the completed hardware system and the embedded software it carries. SoCs have obvious advantages in performance, cost, power consumption, reliability, as well as life cycle and usage range. In addition, in other embodiments of the present application, the units of the battery protection circuit 100_6 except the first switch unit 180_6 are all implemented on the same chip, that is, the entire unit of the battery protection circuit 100_6 except the first switch unit 180_6 Made into a system-on-chip. In addition, in other embodiments of the present application, the second resistor R2_6 and the capacitor C in FIG. 46 can also be implemented in a system-on-chip.

In another embodiment of the present application, a testing subsystem is provided, including:

The battery protection circuit as described above;

A test unit, both ends of which are used for electrical connection with the first test pad and the second test pad, when the two ends of the test unit are electrically connected with the first test pad and the second test pad The first test pad and the second test pad are turned on, so that the voltage signal received by the power supply end of the battery protection circuit is lower than a preset threshold voltage, so that the battery protection circuit enters a sleep mode, In the sleep mode, the first switch unit is turned off to stop the battery from supplying power to the system circuit, and at least part of the battery protection circuit is stopped from supplying power.

In an embodiment of the present application, the test unit is a wire, and a second resistor is provided between the first test pad and the power supply terminal.

In an embodiment of the present application, the test unit is a wire, and a second resistance is provided between the second test pad and the ground.

In an embodiment of the present application, the test unit is a wire and a second resistor, and the second resistor is set between the first test pad and the second test point.

In another embodiment of the present application, a testing system is provided, comprising:

Battery,

In the above test subsystem, wherein the power supply terminal and the power ground terminal of the battery protection circuit in the test subsystem are respectively electrically connected to the battery.

The capacity of the above-mentioned battery can be 10mAH-80mAH, such as 10mAH, 20mAH, 30mAH, 40mAH, 50mAH, 60mAH, 70mAH, 80mAH.

Seventh Embodiment

In the above-mentioned embodiment, a method for setting a shipping mode of an electronic device is also provided, including:

Send the shipping mode feedback command to the upper computer;

The shipping mode feedback command is a valid response command for successfully entering the shipping mode or an invalid response command for failing to enter the shipping mode.

Please refer to FIG. 49 . FIG. 49 is a schematic flowchart of the first embodiment of the method for setting the shipping mode of the electronic device of the present invention. The shipping mode setting method of the electronic device of this embodiment includes the following steps:

S11: Receive the shipping instruction sent by the host computer to enter the shipping mode.

The electronic device may be a Bluetooth headset, a mobile phone, a tablet computer, or the like. In this embodiment, it is preferred that the electronic device and the host computer are connected through a serial port, and the shipping instruction is sent through the serial port. The shipping instruction can be in the form of code, pulse or level, which is not limited in this application, and in other embodiments It can also be other forms of private protocols.

S12: Send a shipping mode feedback command to the upper computer, wherein the shipping mode feedback command is a valid response command for successfully entering the shipping mode or an invalid response command for failing to enter the shipping mode.

Among them, regardless of whether the electronic device successfully enters the shipping mode, the electronic device will actively issue a clear instruction to the upper computer, so as to prevent the electronic device from being sold from the factory without entering the shipping mode.

Please refer to FIG. 50 . FIG. 50 is a schematic flowchart of a second embodiment of a method for setting a shipping mode of an electronic device according to the present invention. The shipping mode setting method of the electronic device of this embodiment includes the following steps:

S21: The main control module receives the shipping instruction sent by the upper computer to enter the shipping mode.

The electronic equipment includes a main control module and a battery protection module electrically connected to the main control module. The main control module includes a processor and its peripheral circuits. The battery protection module is used to control the power supply of the battery. When the battery is not connected to the main control module and other system circuits When the module is supplying power, it enters the shipping mode. In some embodiments, the shipping mode can also be more thorough, such as protecting the battery protection module for unnecessary power-consuming units (such as overcharge voltage protection units, overdischarge voltage protection units). , discharge overcurrent protection unit, control unit, reference voltage generating unit and frequency generating unit) also do not supply power, and only reserve the part of the wake-up unit for exiting the shipping mode to supply power.

S22: The battery protection module receives the shipping instruction sent by the main control module.

Wherein, the shipping instruction can be in the form of code, pulse or level.

S23: Whether the shipping confirmation signal sent by the battery protection module is received within the preset time.

Wherein, if the main control module receives it, then step S24 is performed, and if it is not received, then step S25 is performed. In this embodiment, the preset time may be set to 0.5-1s.

S24: The main control module sends a valid response command to the upper computer.

Among them, after the main control module sends a valid response command, the electronic device enters the shipping mode.

S25: The main control module sends a failure response command to the upper computer.

Among them, the factory side can send the next shipping instruction through the host computer until the electronic device enters the shipping mode.

Please refer to FIG. 51 . FIG. 51 is a schematic flowchart of a third embodiment of a method for setting a shipping mode of an electronic device according to the present invention. The overall process of this embodiment is the same as that of the previous embodiment, the difference is that the electronic device of the present application is a tws (True Wireless Stereo) earphone, the electronic device is a tws earphone, and the tws earphone includes an earphone body and an earphone compartment for accommodating the earphone body, The main control module and the battery protection module are arranged in the earphone body. Compared with the general electronic equipment, the tws headset has a more complex structure and a longer signal transmission chain. If the shipping mode is not set in the shipping mode, it is not easy to find the problem.

The shipping mode setting method of the electronic device of this embodiment includes the following steps:

S31: The earphone compartment receives the shipping instruction sent by the host computer to enter the shipping mode.

Among them, the earphone compartment can be connected with the upper computer through the serial port, so as to transmit the shipping instructions.

S32: The main control module receives the shipping instruction sent by the headset compartment.

Wherein, the main control module is preferably connected with the earphone compartment by means of Bluetooth.

S33: The battery protection module receives the shipping instruction sent by the main control module.

S34: Whether the shipping confirmation signal sent by the battery protection module is received within the preset time.

Wherein, if the main control module receives it, execute steps S35-S37; if not, execute steps S38-S39.

S35: The main control module sends a valid response command to the earphone compartment.

S36: The headset compartment sends a valid response command to the upper computer.

S37: Enter the shipping mode.

S38: The main control module sends a failure response command to the earphone compartment.

S39: The earphone compartment sends an invalid response command to the upper computer.

The shipping mode setting method of this embodiment has the following beneficial effects:

1. Form an active response mechanism between the host computer and the tws headset. Compared with the timer mode adopted by the Chinese patent CN111400080A, this embodiment only performs signal interaction between the host computer and the tws headset, which is accurate and timely, while CN111400080A is the host computer. The interaction between the , tws headset and the timer has a large delay and a high cost. And CN111400080A will produce inaccurate results, if the headset is broken, it will also be considered to enter shipping mode.

2. It forms a multi-level cascaded closed-loop signal loop of the host computer-earphone compartment-main control module-battery protection module, which can achieve the effect of active return and passive monitoring, and quickly locate the specific location of the error, thereby solving the problem.

Please refer to FIG. 52. FIG. 52 is a schematic diagram of a frame of an embodiment of an electronic device of the present invention. The electronic device 50 includes a memory 51 and a processor 52 coupled to each other, and the processor 52 is configured to execute program instructions stored in the memory 51, so as to implement the steps of any of the foregoing shipping mode setting method embodiments. In a specific implementation scenario, the terminal device 50 may be a Bluetooth headset, a mobile phone, a tablet computer, or the like.

Specifically, the processor 52 is used to control itself and the memory 51 to implement the steps of any of the above-mentioned shipping mode setting method embodiments. The processor 52 may also be referred to as a CPU (Central Processing Unit, central processing unit). The processor 52 may be an integrated circuit chip with signal processing capability. The processor 52 can also be a general-purpose processor, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field-Programmable Gate Array, FPGA) or other Programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like. In addition, the processor 52 may be jointly implemented by an integrated circuit chip.

Please refer to FIG. 53 , which is a schematic diagram of a framework of an embodiment of a computer-readable storage medium of the present invention. The computer-readable storage medium 60 stores program instructions 601 that can be executed by the processor, and the program instructions 601 are used to implement the steps of any one of the foregoing shipping mode setting method embodiments.

In some embodiments, the functions or modules included in the apparatuses provided in the embodiments of the present disclosure may be used to execute the methods described in the above method embodiments. For specific implementation, reference may be made to the descriptions of the above method embodiments. For brevity, here No longer.

The above descriptions of the various embodiments tend to emphasize the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, details are not repeated herein.

In the several embodiments provided in this application, it should be understood that the disclosed method and apparatus may be implemented in other manners. For example, the device implementations described above are only illustrative. For example, the division of modules or units is only a logical function division. In actual implementation, there may be other divisions. For example, units or components may be combined or integrated. to another system, or some features can be ignored, or not implemented. On the other hand, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, indirect coupling or communication connection of devices or units, which may be in electrical, mechanical or other forms.

In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware, or may be implemented in the form of software functional units.

The integrated unit, if implemented as a software functional unit and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the present application can be embodied in the form of software products in essence, or the parts that contribute to the prior art, or all or part of the technical solutions, and the computer software products are stored in a storage medium , including several instructions to make a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to execute all or part of the steps of the methods of the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, Read-Only Memory (ROM, Read-Only Memory), Random Access Memory (RAM, Random Access Memory), magnetic disk or optical disk and other media that can store program codes .

Please refer to FIG. 54 . FIG. 54 is a circuit diagram of an electronic device according to an embodiment of the present invention. In this embodiment, the electronic device may be a Bluetooth headset, a mobile phone, a tablet computer, or the like. Here, the tws earphone is taken as an example, and only the main control module and battery protection module are shown, and the earphone compartment is omitted. The electronic device includes a main control module 10 and a battery protection module 20, the electronic device includes a main control module 10 and a battery protection module 20 electrically connected to the main control module 10, the main control module 10 includes a processor and its peripheral circuits, and the battery protection module 20 It is used to control the power supply of the battery 30. When the battery does not supply power to the system circuit modules such as the main control module 10, it enters the shipping mode. In some embodiments, the shipping mode can also be more thorough, such as for the battery protection module. 20 Non-essential power-consuming units (such as overcharge voltage protection unit, overdischarge voltage protection unit, discharge overcurrent protection unit, control unit, reference voltage generation unit and frequency generation unit) do not supply power, and are only reserved for exiting shipping mode The wake-up unit part is powered.

The main control module 10 is provided with an input and output pin GPIO, the battery protection module 20 is provided with a power supply pin VDD_7, a power ground pin GND_7 and a shipping pin CTL_7, the power supply pin VDD_7 and the power supply ground pin GND_7 are respectively connected with the battery. The positive and negative poles of 30 are electrically connected, and the shipping pin CTL_7 is electrically connected to the input and output pins GPIO. When the main control module 10 receives the shipping command from the host computer to enter the shipping mode, the shipping command is guided by the input and output. The pin is transmitted to the shipping pin, and the main control module 10 sends the shipping mode feedback command to the upper computer according to whether it receives the shipping confirmation signal fed back from the shipping pin; wherein, the shipping mode feedback command is to enter the shipping mode A successful valid acknowledgment command or a failed acknowledgment command that fails to enter shipping mode. The specific circuit for entering the shipping mode is in the prior art and will not be repeated here. The electronic device in this embodiment can actively feed back to the upper computer whether to enter the shipping mode, so as to avoid the electronic device from being left out of the factory without actually entering the shipping mode, thereby improving user experience.

Please refer to FIG. 55. FIG. 55 is a circuit diagram of another embodiment of the electronic device of the present invention. The difference between this embodiment and the previous embodiment is that the pins are not shared, and the sending of shipping instructions and the receiving of shipping confirmation signals pass through different pins respectively. Specifically, the input and output pins of the main control module 10_2 include a first input and output pin GPIO-1 and a second input and output pin GPIO-2, the battery protection module 20_2 is also provided with a feedback pin ANS, and the shipping instruction is set by The first input and output pin GPIO-1 is transmitted to the shipping pin CTL_7, and the feedback command is sent to the second input and output pin GPIO-2 by the feedback pin ANS.

It should be understood that references herein to "a plurality" means two or more. Other embodiments of the present application will readily occur to those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses or adaptations of this application that follow the general principles of this application and include common knowledge or conventional techniques in the technical field not disclosed in this application . The specification and examples are to be regarded as exemplary only, with the true scope and spirit of the application being indicated by the following claims.

It should be noted that, each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. For the same and similar parts of each embodiment, refer to each other. Can. As for the apparatus embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and reference may be made to the partial description of the method embodiment for related parts.

The above disclosures are only the preferred embodiments of the present application, and of course, the scope of the rights of the present application cannot be limited by this. Therefore, equivalent changes made according to the claims of the present application are still within the scope of the present application.

Claims

A system-on-chip is characterized by comprising: a power supply pin, a power ground pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, and a control unit , a wake-up unit, and a first switch unit, wherein the power supply pin and the power ground pin are respectively used for electrical connection with the battery, and the first switch unit is used to control the battery to supply power to the system circuit;

Wherein, the system-on-chip further includes a shipping pin, when the shipping pin receives a first signal, the system-on-chip enters a shipping mode, and in the shipping mode, the first switch unit is turned off to stop the battery Power is supplied to the system circuit and at least some units of the system-on-chip are powered off, and the wake-up unit is powered when in the shipping mode, and the wake-up unit is used to exit the system-on-chip from the shipping mode.
The system-on-chip of claim 1, wherein when the shipping pin receives the first signal, the system-on-chip is triggered to generate a shipping control signal to enter the shipping mode.
The system-on-chip according to claim 2, wherein the first signal is an encoded signal that the system-on-chip and the system circuit perform a protocol on.
The system-on-chip of claim 3, wherein the first signal comprises a pulse signal, the system-on-chip further comprises a pulse counting unit, the pulse counting unit is electrically connected to the shipping pin, and when the pulse The counting unit triggers to generate a shipping control signal when the number of pulses received within the first predetermined time period is greater than or equal to the first predetermined number.
The system on chip according to claim 3, wherein the first signal comprises a continuous high level signal or a continuous low level signal, the system on chip further comprises a first timing unit, the first timing The unit is electrically connected to the shipping pin, and when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to the second predetermined time period, the shipping control signal is triggered to be generated.
The system-on-chip of claim 3, wherein the over-discharge voltage protection unit comprises a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, and the first signal For a continuous high-level signal or a continuous low-level signal, the system-on-chip further includes a second switch unit and a first resistor, and the control end of the second switch unit is electrically connected to the shipping pin, so The input end of the second switch unit is grounded, the output end of the second switch unit is electrically connected to one end of the first resistor, the other end of the first resistor is connected to a high level, and the output end of the second switch unit It is also electrically connected to the reverse end of the comparator of the over-discharge voltage protection unit, and the output end of the comparator is electrically connected to the second timing unit. When the shipping pin is connected to the first signal, the first The two switch units are turned on, and when the duration of the high level received by the second timing unit is greater than or equal to the third predetermined time period, the shipping control signal is triggered to be generated.
The system-on-chip according to any one of claims 1-6, wherein the wake-up unit is a charge detection unit.
The system-on-chip of claim 7, wherein when the charging detection unit detects a charging signal, the system-on-chip exits the shipping mode.
The system-on-chip according to any one of claims 1-6, wherein the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit At least one of them is powered off.
The system-on-a-chip of claim 9, wherein when the system-on-chip enters the shipping mode, all circuits of the system-on-chip except the wake-up unit are powered off.
The system-on-chip according to any one of claims 1-6, wherein the first switch unit comprises a MOS transistor.
A battery assembly, characterized in that, comprising:

Battery;

The system-on-chip according to any one of claims 1-11, wherein a power supply pin and a power ground pin of the system-on-chip are respectively electrically connected to the battery.
The battery assembly of claim 12, wherein the capacity of the battery is 10mAH-80mAH.
An electronic device, comprising:

The battery pack of claim 12 or 13;

a system circuit, wherein the battery supplies power to the system circuit via the system-on-chip control.
The electronic device of claim 14, wherein the electronic device is a Bluetooth headset.
A system-on-chip is characterized by comprising: a power supply pin, a power ground pin, an overdischarge voltage protection unit, a control unit, a wake-up unit, and a first switch unit, wherein the power supply pin and the power ground lead The feet are respectively used for electrical connection with the battery, and the first switch unit is used for controlling the battery to supply power to the system circuit;

Wherein, the power supply pin is also used for electrical connection with the shipping outlet of the system circuit. When the voltage signal received by the power supply pin changes due to the change of the shipping output signal, the system-on-chip Entering a shipping mode, in which the first switch unit is turned off to stop the battery from supplying power to the system circuit and at least part of the system-on-chip units are powered off, and in the shipping mode the wake-up unit is powered , the wake-up unit is used to make the system-on-chip exit the shipping mode.
17. The system-on-chip of claim 16, wherein the system-on-chip enters the shipping mode when the number of pulses received by the power supply pin within a predetermined period of time is greater than or equal to the first predetermined number.
The system-on-chip of claim 17, wherein the system-on-chip further comprises a pulse counting unit, the pulse counting unit is electrically connected to the power supply pin, and when the pulse counting unit confirms the power supply pin The system-on-chip enters the shipping mode when the number of pulses received within a predetermined time period is greater than or equal to a first predetermined number.
The system-on-chip according to claim 18, wherein the over-discharge voltage protection unit comprises a comparator, the system-on-chip further comprises a third switch unit and a third resistor, and the control terminal of the third switch unit is connected to The output end of the pulse counting unit is electrically connected, the input end of the third switch unit is grounded, the output end of the third switch unit is electrically connected to one end of the third resistor, and the other end of the third resistor is connected to high The output terminal of the third switch unit is also electrically connected to the reverse terminal of the comparator. When the pulse counting unit confirms that the number of pulses received by the power supply pin within a predetermined period of time is greater than or equal to the first A control signal is output to turn on the third switch unit when a predetermined number is reached, the output signal of the comparator is changed to control the SoC to enter the shipping mode, and in the shipping mode, the system on chip is excluded from the wake-up unit. All other units are powered off.
The system-on-chip according to claim 16, characterized in that, when the voltage signal received by the power supply pin is lower than the preset threshold voltage due to the voltage division of the branch where the ship's outgoing end is located, the system-on-chip enters the Shipping mode.
The system-on-chip of claim 20, wherein the over-discharge voltage protection unit is electrically connected to the power supply pin, and when the voltage signal of the power supply pin is lower than a threshold voltage, the discharge protection unit controls The system-on-chip enters the shipping mode, in which the first switch unit is turned off and the power supply of all units of the system-on-chip except the wake-up unit is stopped.
The system-on-chip according to any one of claims 16-21, wherein the wake-up unit is a charge detection unit.
The system-on-chip of claim 22, wherein when the charging detection unit detects a charging signal, the system-on-chip exits the shipping mode.
The system-on-chip according to any one of claims 16-18 and 20, wherein the system-on-chip further comprises an overcharge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, and a frequency generation unit. In the operation mode, at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit is powered off.
The system-on-chip of claim 24, wherein in the shipping mode, all units of the system-on-chip except the wake-up unit are powered off.
The system-on-chip according to any one of claims 16-21, wherein the first switch unit comprises a MOS transistor.
A battery assembly, characterized in that, comprising:

Battery;

The system-on-chip according to any one of claims 16-26, wherein a power supply pin and a power ground pin of the system-on-chip are respectively electrically connected to the battery.
The battery assembly of claim 27, wherein the battery has a capacity of 10mAH-80mAH.
An electronic device, comprising:

The battery pack of claim 27 or 28;

a system circuit, wherein the battery supplies power to the system circuit via the system-on-chip control.
The electronic device of claim 29, wherein the electronic device is a Bluetooth headset.
The electronic device according to claim 29 or 30, wherein the shipping outlet of the system circuit is electrically connected to a power supply pin of the system-on-chip via a second resistor, and the shipping outlet is at the output The time other than the signal that puts the system-on-chip into shipping mode is high impedance.
A battery protection circuit is characterized by comprising: a power supply terminal, a power ground terminal, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, a first switch unit, wherein the power supply terminal and the power ground terminal are respectively used for electrical connection with the battery, and the first switch unit is used to control the battery to supply power to the system circuit;

Wherein, the battery protection circuit further includes a shipping input terminal, when the shipping input terminal receives the first signal, the battery protection circuit enters the shipping mode, and at least some units of the battery protection circuit are stopped in the shipping mode powered by.
33. The battery protection circuit of claim 32, wherein the first switch unit is turned off in the shipping mode to stop the battery from supplying power to the system circuit.
The battery protection circuit according to claim 32, wherein the battery protection circuit further comprises a wake-up unit, the wake-up unit is powered in the shipping mode, and the wake-up unit is configured to exit the battery protection circuit Shipping mode.
The battery protection circuit according to any one of claims 32-34, wherein when the shipping input terminal receives the first signal, the battery protection circuit is triggered to generate a shipping control signal to enter the shipping mode.
The battery protection circuit of claim 35, wherein the first signal is an encoded signal that the battery protection circuit and the system circuit perform an agreement on.
The battery protection circuit of claim 36, wherein the first signal comprises a pulse signal, the battery protection circuit further comprises a pulse counting unit, the pulse counting unit is electrically connected to the shipping input, When the number of pulses received by the pulse counting unit within the first predetermined time period is greater than or equal to the first predetermined number, it is triggered to generate the shipping control signal.
The battery protection circuit of claim 36, wherein the first signal comprises a continuous high-level signal or a continuous low-level signal, the battery protection circuit further comprises a first timing unit, the first A timing unit is electrically connected to the shipping input end, and when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to a second predetermined time period, a shipping control signal is triggered to be generated.
The battery protection circuit of claim 36, wherein the over-discharge voltage protection unit comprises a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, and the first The signal is a continuous high-level signal or a continuous low-level signal, the battery protection circuit further includes a second switch unit and a first resistor, and the control end of the second switch unit is electrically connected to the shipping pin , the input end of the second switch unit is grounded, the output end of the second switch unit is electrically connected to one end of the first resistor, the other end of the first resistor is connected to a high level, and the output end of the second switch unit is electrically connected to one end of the first resistor. The output terminal is also electrically connected to the reverse terminal of the comparator of the over-discharge voltage protection unit, and the output terminal of the comparator is electrically connected to the second timing unit. When the shipping pin is connected to the first signal, the The second switch unit is turned on, and when the duration of the high level received by the second timing unit is greater than or equal to a third predetermined time period, the shipping control signal is triggered to be generated.
The battery protection circuit according to any one of claims 32-34, wherein the wake-up unit is a charge detection unit.
The battery protection circuit of claim 40, wherein when the charging detection unit detects a charging signal, the battery protection circuit exits the shipping mode.
The battery protection circuit according to any one of claims 32 to 34, wherein the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit At least one of the units is powered off.
The battery protection circuit of claim 42, wherein when the battery protection circuit enters the shipping mode, all circuits of the battery protection circuit except the wake-up unit are stopped to supply power.
The battery protection circuit according to any one of claims 32-34, wherein the first switch unit comprises a MOS transistor.
The battery protection circuit according to any one of claims 32 to 34, wherein the battery protection circuit is implemented on the same chip, or the battery protection circuit is implemented in all units except the first switch unit. on the same chip.
A battery assembly, characterized in that, comprising:

Battery;

The battery protection circuit according to any one of claims 32-45, wherein a power supply terminal and a power ground terminal of the battery protection circuit are respectively electrically connected to the battery.
The battery assembly of claim 46, wherein the battery has a capacity of 10mAH-80mAH.
An electronic device, comprising:

The battery pack of claim 46 or 47;

A system circuit, wherein the battery is controlled to supply power to the system circuit via the battery protection circuit.
A system-on-chip is characterized by comprising: a power supply pin, a power ground pin, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, and a control unit , a wake-up unit, and a control pin, wherein the power supply pin and the power ground pin are respectively used for electrical connection with the battery, the control pin is used to control the first switch unit, and the first switch unit is used for Control the battery to supply power to the system circuit;

Wherein, the system-on-chip further includes a shipping pin, when the shipping pin receives the first signal, the system-on-chip enters the shipping mode, and the system-on-chip output is used to turn off the first switch in the shipping mode The control signal of the unit is given to the control pin to make the battery stop supplying power to the system circuit and at least part of the system-on-chip units are stopped, and the wake-up unit is powered in the shipping mode, and the wake-up unit is used to make the The SoC exits shipping mode.
The system-on-chip of claim 49, wherein when the shipping pin receives the first signal, the system-on-chip is triggered to generate a shipping control signal to enter the shipping mode.
The system-on-a-chip of claim 50, wherein the first signal is an encoded signal that the system-on-chip and the system circuit perform a protocol on.
The system-on-chip of claim 51, wherein the first signal comprises a pulse signal, the system-on-chip further comprises a pulse counting unit, the pulse counting unit is electrically connected to the shipping pin, and when the pulse The counting unit triggers to generate a shipping control signal when the number of pulses received within the first predetermined time period is greater than or equal to the first predetermined number.
The system on chip of claim 51, wherein the first signal comprises a continuous high level signal or a continuous low level signal, the system on chip further comprises a first timing unit, the first timing The unit is electrically connected to the shipping pin, and when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to the second predetermined time period, the shipping control signal is triggered to be generated.
The system-on-a-chip of claim 51, wherein the over-discharge voltage protection unit comprises a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, and the first signal For a continuous high-level signal or a continuous low-level signal, the system-on-chip further includes a second switch unit and a first resistor, and the control end of the second switch unit is electrically connected to the shipping pin, so The input end of the second switch unit is grounded, the output end of the second switch unit is electrically connected to one end of the first resistor, the other end of the first resistor is connected to a high level, and the output end of the second switch unit It is also electrically connected to the reverse end of the comparator of the over-discharge voltage protection unit, and the output end of the comparator is electrically connected to the second timing unit. When the shipping pin is connected to the first signal, the first The two switch units are turned on, and when the duration of the high level received by the second timing unit is greater than or equal to the third predetermined time period, the shipping control signal is triggered to be generated.
The system-on-chip according to any one of claims 49-54, wherein the wake-up unit is a charge detection unit.
The system on chip of claim 55, wherein when the charging detection unit detects a charging signal, the system on chip exits the shipping mode.
The system-on-chip according to any one of claims 49-54, wherein the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit At least one of them is powered off.
The system-on-a-chip of claim 57, wherein when the system-on-chip enters the shipping mode, all circuits of the system-on-chip except the wake-up unit are powered off.
The system-on-chip according to any one of claims 49-54, wherein the first switch unit comprises a MOS transistor.
A battery assembly, characterized in that, comprising:

Battery;

The system-on-chip according to any one of claims 49-59, wherein a power supply pin and a power ground pin of the system-on-chip are respectively electrically connected to the battery;

The first switch unit is electrically connected to the control pin of the system-on-chip, the input end of the first switch unit is electrically connected to the battery, and the output end of the first switch unit is used for electrical connection with the system circuit.
The battery assembly of claim 60, wherein the battery has a capacity of 10mAH-80mAH.
An electronic device, comprising:

The battery pack of claim 60 or 61;

a system circuit, wherein the battery supplies power to the system circuit via the system-on-chip control.
The electronic device of claim 62, wherein the electronic device is a Bluetooth headset.
A system-on-chip, characterized in that it includes: a power supply pin, a power ground pin, an overdischarge voltage protection unit, a control unit, a wake-up unit, and a control pin, wherein the power supply pin and the power supply ground pin They are respectively used for electrical connection with the battery, the control pins are used to control the first switch unit, and the first switch unit is used to control the battery to supply power to the system circuit;

Wherein, the power supply pin is also used for electrical connection with the shipping outlet of the system circuit. When the voltage signal received by the power supply pin changes due to the change of the shipping output signal, the system-on-chip Entering the shipping mode, in the shipping mode, the system-on-chip outputs a control signal for turning off the first switch unit to the control pin, so that the battery stops supplying power to the system circuit and at least some units of the system-on-chip are powered off, And in the shipping mode, the wake-up unit is powered, and the wake-up unit is used to make the system on chip exit the shipping mode.
64. The system-on-chip of claim 64, wherein the system-on-chip enters the shipping mode when the number of pulses received by the power supply pin within a predetermined period of time is greater than or equal to the first predetermined number.
The system-on-chip of claim 65, wherein the system-on-chip further comprises a pulse counting unit, the pulse counting unit is electrically connected to the power supply pin, and when the pulse counting unit confirms the power supply pin The system-on-chip enters the shipping mode when the number of pulses received within a predetermined time period is greater than or equal to a first predetermined number.
The system-on-chip of claim 66, wherein the over-discharge voltage protection unit comprises a comparator, the system-on-chip further comprises a third switch unit and a third resistor, and the control terminal of the third switch unit is connected to The output end of the pulse counting unit is electrically connected, the input end of the third switch unit is grounded, the output end of the third switch unit is electrically connected to one end of the third resistor, and the other end of the third resistor is connected to high The output terminal of the third switch unit is also electrically connected to the reverse terminal of the comparator. When the pulse counting unit confirms that the number of pulses received by the power supply pin within a predetermined period of time is greater than or equal to the first A control signal is output to turn on the third switch unit when a predetermined number is reached, the output signal of the comparator is changed to control the SoC to enter the shipping mode, and in the shipping mode, the system on chip is excluded from the wake-up unit. All other units are powered off.
The system-on-chip according to claim 64, characterized in that, when the voltage signal received by the power supply pin is lower than the preset threshold voltage due to the voltage division of the branch where the shipping outlet is located, the system-on-chip enters the Shipping mode.
The system-on-a-chip of claim 68, wherein the over-discharge voltage protection unit is electrically connected to the power supply pin, and when the voltage signal of the power supply pin is lower than a threshold voltage, the discharge protection unit controls the The system-on-chip enters the shipping mode, in which the first switch unit is turned off and the power supply of all units of the system-on-chip except the wake-up unit is stopped.
The system-on-chip according to any one of claims 64-69, wherein the wake-up unit is a charge detection unit.
The system on chip of claim 70, wherein when the charging detection unit detects a charging signal, the system on chip exits the shipping mode.
The system-on-chip according to any one of claims 64-66 and 68, wherein the system-on-chip further comprises an overcharge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, and a frequency generation unit. In the operation mode, at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit is powered off.
The system-on-a-chip of claim 72, wherein in the shipping mode, all units of the system-on-chip except the wake-up unit are powered off.
The system-on-chip according to any one of claims 64-69, wherein the first switch unit comprises a MOS transistor.
A battery assembly, characterized in that, comprising:

Battery;

The system-on-chip according to any one of claims 64-74, wherein a power supply pin and a power ground pin of the system-on-chip are respectively electrically connected to the battery;

The first switch unit is electrically connected to the control pin of the system-on-chip, the input end of the first switch unit is electrically connected to the battery, and the output end of the first switch unit is used for electrical connection with the system circuit.
The battery assembly of claim 75, wherein the battery has a capacity of 10mAH-80mAH.
An electronic device, comprising:

The battery pack of claim 75 or 76;

a system circuit, wherein the battery supplies power to the system circuit via the system-on-chip control.
The electronic device of claim 77, wherein the electronic device is a Bluetooth headset.
The electronic device according to claim 77 or 78, characterized in that the shipping outlet of the system circuit is electrically connected to a power supply pin of the system-on-chip via a second resistor, and the shipping outlet is at the output The time other than the signal that puts the system-on-chip into shipping mode is high impedance.
A battery protection circuit is characterized by comprising: a power supply terminal, a power supply ground terminal, an overdischarge voltage protection unit, a control unit, a first resistor, a first switch unit, a first test pad and a second test pad, The power supply terminal and the power ground terminal are respectively used for electrical connection with the battery, the over-discharge voltage protection unit is electrically connected with the control unit, the input terminal of the first resistor is electrically connected with the battery, and the first resistor is electrically connected to the battery. The output end of the power supply is electrically connected to the power supply end, and the first switch unit is used to control the battery to supply power to the system circuit;

Wherein, the first test pad is electrically connected to the power supply terminal, the second test pad is electrically grounded, and the first test pad and the second test pad are used for electrical connection with the test unit. When the test pad and the second test pad are used for electrical connection with the test unit, the first test pad and the second test pad are turned on, so that the voltage signal received by the power supply terminal is lower than the preset threshold voltage , so that the battery protection circuit enters a sleep mode, in which the first switch unit is turned off to stop the battery supplying power to the system circuit, and at least part of the battery protection circuit is stopped from supplying power.
The battery protection circuit according to claim 80, wherein the battery protection circuit further comprises a wake-up unit, the wake-up unit is powered in the sleep mode, and the wake-up unit is used to make the battery protection circuit exit the sleep mode model.
The battery protection circuit of claim 80, wherein the first test pad is directly electrically connected to the power supply terminal; or a second resistor is provided between the first test pad and the power supply terminal to be indirectly electrically connected.
The battery protection circuit of claim 80, wherein the second test pad is directly grounded; or a second resistor is indirectly electrically connected between the second test pad and the ground.
The battery protection circuit of claim 80, wherein the overdischarge voltage protection unit is electrically connected to the power supply terminal, and the discharge protection unit controls battery protection when the voltage signal of the power supply terminal is lower than a threshold voltage The circuit enters a sleep mode, in which the first switch unit is turned off, and at least part of the battery protection circuit is stopped from supplying power.
The battery protection circuit of claim 81, wherein the wake-up unit is a charge detection unit. When the charging detection unit detects the charging signal, the battery protection circuit exits the sleep mode.
The battery protection circuit of claim 80, wherein the battery protection circuit further comprises an overcharge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit and a frequency generation unit, wherein in the sleep mode, the At least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit is powered off.
The battery protection circuit according to claim 81, wherein when the battery protection circuit enters the sleep mode, all circuits of the battery protection circuit except the wake-up unit are stopped to supply power.
The battery protection circuit according to claim 80 or 81, wherein the first switch unit comprises a MOS transistor.
The battery protection circuit according to claim 80 or 81, characterized in that, the battery protection circuit is implemented on the same chip, or, the units of the battery protection circuit except the first switch unit are implemented on the same chip on the chip.
A battery assembly, characterized in that, comprising:

Battery;

The battery protection circuit according to any one of claims 80 to 89, wherein a power supply terminal and a power ground terminal of the battery protection circuit are respectively electrically connected to the battery.
The battery assembly of claim 90, wherein the battery has a capacity of 10mAH-80mAH.
A test subsystem, characterized in that it includes:

The battery protection circuit according to any one of claims 80-89;

The two ends of the test unit are used for electrical connection with the first test pad and the second test pad, when the two ends of the test unit are electrically connected with the first test pad and the second test pad. The first test pad and the second test pad are turned on, so that the voltage signal received by the power supply end of the battery protection circuit is lower than a preset threshold voltage, so that the battery protection circuit enters a sleep mode, In the sleep mode, the first switch unit is turned off to stop the battery from supplying power to the system circuit, and at least part of the battery protection circuit is stopped from supplying power.
The test subsystem of claim 92, wherein the test unit is a wire, and a second resistance is provided between the first test pad and the power supply terminal.
The test subsystem of claim 92, wherein the test unit is a wire, and a second resistance is provided between the second test pad and the ground.
The test subsystem of claim 92, wherein the test unit is a wire and a second resistor, and the second resistor is provided between the first test pad and the second test point.
A test system, characterized in that it includes:

Battery,

The test subsystem according to any one of claims 92-95, wherein the power supply terminal and the power ground terminal of the battery protection circuit in the test subsystem are electrically connected to the battery, respectively.
The test system of claim 96, wherein the battery has a capacity of 10mAH-80mAH.
An electronic device, comprising:

The battery pack of claim 90 or 91;

A system circuit, wherein the battery is controlled to supply power to the system circuit via the battery protection circuit.
A Bluetooth headset, comprising:

system circuit;

Battery, its capacity is 10mAH-80mAH;

A battery protection circuit, comprising: a power supply terminal, a power ground terminal, an overcharge voltage protection unit, an overdischarge voltage protection unit, a discharge overcurrent protection unit, a reference voltage generation unit, a frequency generation unit, a control unit, and a first switch unit, Wherein, the power supply terminal and the power ground terminal are respectively electrically connected to the battery, and the first switch unit is used to control the battery to supply power to the system circuit;

The system circuit is electrically connected to the battery protection circuit, the battery protection circuit enters a shipping mode when the system circuit outputs a first signal to the battery protection circuit, and the first switch unit is disconnected in the shipping mode to stop the battery supplying power to the system circuits.
The bluetooth headset of claim 99, wherein the battery protection circuit comprises a shipping input, the shipping input is electrically connected to the system circuit, and the system circuit outputs the first output through the shipping input. a signal.
The bluetooth headset according to claim 99, wherein the battery protection circuit further comprises a wake-up unit, at least part of the battery protection circuit is powered off in the shipping mode, and the wake-up is in the shipping mode The unit is powered and the wake-up unit is used to bring the battery protection circuit out of shipping mode.
The Bluetooth headset of claim 101, wherein the wake-up unit is a charging detection unit.
The Bluetooth headset of claim 102, wherein when the charging detection unit detects a charging signal, the battery protection circuit exits the shipping mode.
The Bluetooth headset according to claim 101, wherein at least one of the overcharge voltage protection unit, the overdischarge voltage protection unit, the discharge overcurrent protection unit, the control unit, the reference voltage generation unit and the frequency generation unit is Power off.
The Bluetooth headset of claim 104, wherein when the battery protection circuit enters the shipping mode, all circuits of the battery protection circuit except the wake-up unit are stopped to supply power.
The Bluetooth headset according to any one of claims 99-105, wherein when the battery protection circuit receives the first signal, the battery protection circuit is triggered to generate a shipping control signal to enter the shipping mode.
The bluetooth headset of claim 106, wherein the first signal is an encoded signal that is negotiated between the battery protection circuit and the system circuit.
The Bluetooth headset of claim 107, wherein the first signal comprises a pulse signal, the battery protection circuit further comprises a pulse counting unit, the pulse counting unit is electrically connected to the shipping input, when The pulse counting unit triggers to generate a shipping control signal when the number of pulses received within the first predetermined time period is greater than or equal to the first predetermined number.
The Bluetooth headset of claim 107, wherein the first signal comprises a continuous high level signal or a continuous low level signal, the battery protection circuit further comprises a first timing unit, the first The timing unit is electrically connected to the shipping input end, and when the duration of the high-level signal or the low-level signal received by the first timing unit is greater than or equal to the second predetermined time period, the shipping control signal is triggered to be generated.
The Bluetooth headset of claim 107, wherein the over-discharge voltage protection unit comprises a comparator and a second timing unit, an output end of the comparator is electrically connected to the second timer, and the first signal is a continuous high-level signal or a continuous low-level signal, the battery protection circuit further includes a second switch unit and a first resistor, and the control end of the second switch unit is electrically connected to the shipping pin, The input end of the second switch unit is grounded, the output end of the second switch unit is electrically connected to one end of the first resistor, the other end of the first resistor is connected to a high level, and the output of the second switch unit The terminal is also electrically connected to the reverse terminal of the comparator of the over-discharge voltage protection unit, and the output terminal of the comparator is electrically connected to the second timing unit. When the shipping pin is connected to the first signal, the The second switch unit is turned on, and when the duration of the high level received by the second timing unit is greater than or equal to the third predetermined time period, the shipping control signal is triggered to be generated.
The Bluetooth headset according to any one of claims 99-105, wherein the first switch unit comprises a MOS transistor.
The bluetooth headset according to any one of claims 99 to 105, wherein the battery protection circuit is implemented on the same chip, or the battery protection circuit except the first switch unit is implemented on the same chip. on the same chip.
A method for setting a shipping mode of an electronic device, wherein the method comprises:

Receive the shipping instruction sent by the host computer to enter the shipping mode;

Send a shipping mode feedback command to the host computer;

Wherein, the shipping mode feedback command is a valid response command for successfully entering the shipping mode or an invalid response command for failing to enter the shipping mode.
The method for setting a shipping mode according to claim 113, wherein the electronic device comprises a main control module and a battery protection module electrically connected to the main control module,

The step of receiving the shipping instruction to enter the shipping mode sent by the host computer specifically includes:

The main control module receives the shipping instruction to enter the shipping mode sent by the host computer;

The battery protection module receives the shipping instruction sent by the main control module;

The step of sending the shipping mode feedback command to the host computer specifically includes:

If the shipping confirmation signal sent by the battery protection module is received within a preset time, the main control module sends the valid response command to the upper computer;

If the shipping confirmation signal sent by the battery protection module is not received within a preset time, the main control module sends the failure response command to the upper computer.
The method for setting a shipping mode according to claim 114, wherein the electronic device is a tws earphone, the tws earphone comprises an earphone body and an earphone compartment for accommodating the earphone body, the main control module and the the battery protection module is arranged in the earphone body;

The step of the main control module receiving the shipping instruction to enter the shipping mode sent by the host computer specifically includes:

The earphone compartment receives the shipping instruction to enter the shipping mode sent by the host computer;

The main control module receives the shipping instruction sent by the headset compartment;

The step of the main control module sending the effective response command to the host computer specifically includes:

The main control module sends the effective response command to the headset compartment;

The headset compartment sends the effective response command to the host computer;

The step of the main control module sending the failure response command to the host computer specifically includes:

The main control module sends the failure response command to the earphone compartment;

The earphone compartment sends the failure response command to the upper computer.
The method for setting a shipping mode according to claim 115, wherein the step of sending the effective response command to the host computer by the headset compartment further comprises:

Enter shipping mode.
The shipping mode setting method according to claim 115, wherein the shipping command, the shipping mode feedback command and the shipping confirmation signal are respectively in the form of code, pulse or level.
An electronic device, characterized in that, the electronic device comprises a processor and a memory coupled to each other, the processor is configured to execute program instructions stored in the memory, so as to implement any one of claims 113-117 method of setting the shipping mode.
A computer-readable storage medium having program instructions stored thereon, characterized in that, when the program instructions are executed by a processor, the method for setting a shipping mode described in any one of claims 113-117 is implemented.
An electronic device, characterized in that the electronic device includes a main control module and a battery protection module, the main control module is provided with input and output pins, the battery protection module is provided with shipping pins, and when the main control module is provided with input and output pins, the battery protection module is provided with shipping pins. When the control module receives the shipping instruction from the host computer to enter the shipping mode, the shipping instruction is transmitted from the input and output pins to the shipping pins, and the main control module receives The shipping confirmation signal fed back by the shipping pin sends a shipping mode feedback instruction to the host computer; wherein, the shipping mode feedback instruction is an effective response instruction that successfully enters the shipping mode or fails to enter the shipping mode. Failback command.
The electronic device according to claim 120, wherein the input and output pins include a first input and output pin and a second input and output pin, the battery protection module is further provided with a feedback pin, and the ship The shipping command is transmitted from the first I/O pin to the shipping pin, and the feedback instruction is sent from the feedback pin to the second I/O pin.
The electronic device according to claim 120 or 121, wherein the electronic device is a tws earphone.